Order this document by TL071C/D
These low noise JFET input operational amplifiers combine two
state–of–the–art analog technologies on a single monolithic integrated
circuit. Each internally compensated operational amplifier has well matched
high voltage JFET input device for low input offset voltage. The BIFET
technology provides wide bandwidths and fast slew rates with low input bias
currents, input offset currents, and supply currents. Moreover, the devices
exhibit low noise and low harmonic distortion, making them ideal for use in
high fidelity audio amplifier applications.
These devices are available in single, dual and quad operational
amplifiers which are pin–compatible with the industry standard MC1741,
MC1458, and the MC3403/LM324 bipolar products.
•
•
•
•
•
•
•
Low Input Noise Voltage: 18 nV/ ǸHz
LOW NOISE, JFET INPUT
OPERATIONAL AMPLIFIERS
SEMICONDUCTOR
TECHNICAL DATA
8
1
8
Typ
1
P SUFFIX
PLASTIC PACKAGE
CASE 626
Low Harmonic Distortion: 0.01% Typ
Low Input Bias and Offset Currents
High Input Impedance: 1012 Ω Typ
High Slew Rate: 13 V/µs Typ
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
PIN CONNECTIONS
Wide Gain Bandwidth: 4.0 MHz Typ
Low Supply Current: 1.4 mA per Amp
Offset Null
1
Inv + Input
2
Noninvt Input
3
VEE
4
+
8
NC
7
6
VCC
Output
5
Offset Null
TL071 (Top View)
Output A
1
8
2
Inputs A
3
VEE
7
–
+
–
+
4
VCC
Output B
6
Inputs B
5
TL072 (Top View)
N SUFFIX
PLASTIC PACKAGE
CASE 646
(TL074 Only)
14
1
PIN CONNECTIONS
Output 1
ORDERING INFORMATION
Op Amp
Function
Device
Operating
Temperature Range
TL071ACD, CD
Single
TL071ACP, CP
Inputs 1
Plastic DIP
14
2
13
3
Package
SO–8
TA = 0° to +70°C
1
VCC
TL072ACD, CD
TL072ACP, CP
Quad
TL074ACN, CN
SO–8
TA = 0° to +70°C
TA = 0° to +70°C
4
–
+
11
10
+
+
–
2
3
–
7
Inputs 4
12
5
Inputs 2
Output 2
1
4
6
Dual
–
+
Output 4
VEE
Inputs 3
9
8
Output 3
Plastic DIP
TL074 (Top View)
Plastic DIP
 Motorola, Inc. 1995
MOTOROLA ANALOG IC DEVICE DATA
1
TL071C,AC TL072C,AC TL074C,AC
MAXIMUM RATINGS
Symbol
Value
Unit
Supply Voltage
Rating
VCC
VEE
+18
–18
V
Differential Input Voltage
VID
±30
V
VIDR
±15
V
tSC
Continuous
PD
1/θJA
680
10
mW
mW/°C
TA
0 to +70
°C
Tstg
–65 to +150
°C
Input Voltage Range (Note 1)
Output Short Circuit Duration (Note 2)
Power Dissipation
Plastic Package (N, P)
Derate above TA = +47°C
Operating Ambient Temperature Range
Storage Temperature Range
NOTES: 1. The magnitude of the input voltage must not exceed the magnitude of the supply voltage or 15 V,
whichever is less.
2. The output may be shorted to ground or either supply. Temperature and/or supply voltages must
be limited to ensure that power dissipation ratings are not exceeded.
ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = Thigh to Tlow [Note 3])
Characteristics
Symbol
Input Offset Voltage (RS ≤ 10 k, VCM = 0)
TL071C, TL072C
TL074C
TL07_AC
VIO
Input Offset Current (VCM = 0) (Note 4)
TL07_C
TL07_AC
IIO
Input Bias Current (VCM = 0) (Note 4)
TL07_C
TL07_AC
IIB
Large–Signal Voltage Gain (VO = ±10 V, RL ≥ 2.0 k)
TL07_C
TL07_AC
Min
Typ
Max
—
—
—
—
—
—
13
13
7.5
—
—
—
—
2.0
2.0
—
—
—
—
7.0
7.0
15
25
—
—
—
—
24
20
—
—
—
—
mV
nA
nA
AVOL
Output Voltage Swing (Peak–to–Peak)
(RL ≥ 10 k)
(RL ≥ 2.0 k)
Unit
V/mV
VO
V
NOTES: 3. Tlow = 0°C for TL071C,AC
Thigh = +70°C for TL071C,AC
0°C for TL072C,AC
+70°C for TL072C,AC
0°C for TL074C,AC
+70°C for TL074C,AC
4. Input Bias currents of JFET input op amps approximately double for every 10°C rise in junction temperature as shown in Figure 3. To maintain
junction temperature as close to ambient temperature as possible, pulse techniques must be used during testing.
Figure 1. Unity Gain Voltage Follower
Figure 2. Inverting Gain of 10 Amplifier
10 k
1.0 k
–
VO
+
Vin
–
VO
+
Vin
RL = 2.0 k
2
CL = 100 pF
RL
CL = 100 pF
MOTOROLA ANALOG IC DEVICE DATA
TL071C,AC TL072C,AC TL074C,AC
ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 25°C, unless otherwise noted.)
Characteristics
Min
Typ
Max
—
—
—
3.0
3.0
3.0
10
10
6.0

10

—
—
5.0
5.0
50
50
—
—
30
30
200
200

1012

±10
±11
+15, –12
+15, –12
—
—
25
50
150
150
—
—
24
28

70
80
100
100
—
—
70
80
100
100
—
—
ID

1.4
2.5
mA
Unity Gain Bandwidth
BW

4.0

MHz
Slew Rate (See Figure 1)
Vin = 10 V, RL = 2.0 k, CL = 100 pF
SR

13

v/µs
tr

0.1

µs
Overshoot (Vin = 20 mV, RL = 2.0 k, CL = 100 pF)
OS

10

%
Equivalent Input Noise Voltage
RS = 100 Ω, f = 1000 Hz
en

18

nV/ √ Hz
Equivalent Input Noise Current
RS = 100 Ω, f = 1000 Hz
in

0.01

pA/ √ Hz
THD

0.01

%
CS

120

dB
Input Offset Voltage (RS ≤ 10 k, VCM = 0)
TL071C, TL072C
TL074C
TL07_AC
Average Temperature Coefficient of Input Offset Voltage
RS = 50 Ω, TA = Tlow to Thigh (Note 3)
Symbol
VIO
∆VIO/∆T
Input Offset Current (VCM = 0) (Note 4)
TL07_C
TL07_AC
IIO
Input Bias Current (VCM = 0) (Note 4)
TL07_C
TL07_AC
IIB
Input Resistance
ri
Common Mode Input Voltage Range
TL07_C
TL07_AC
VICR
Large–Signal Voltage Gain (VO = ±10 V, RL ≥ 2.0 k)
TL07_C
TL07_AC
AVOL
Output Voltage Swing (Peak–to–Peak)
(RL = 10 k)
VO
Common Mode Rejection Ratio (RS ≤ 10 k)
TL07_C
TL07_AC
CMRR
Supply Voltage Rejection Ratio (RS ≤ 10 k)
TL07_C
TL07_AC
PSRR
Supply Current (Each Amplifier)
Rise Time (See Figure 1)
Total Harmonic Distortion
VO (RMS) = 10 V, RS ≤ 1.0 k, RL ≥ 2.0 k, f = 1000 Hz
Channel Separation
AV = 100
Unit
mV
µV/°C
pA
pA
Ω
V
V/mV
V
dB
dB
NOTES: 3. Tlow = 0°C for TL071C,AC
Thigh = +70°C for TL071C,AC
0°C for TL072C,AC
+70°C for TL072C,AC
0°C for TL074C,AC
+70°C for TL074C,AC
4. Input Bias currents of JFET input op amps approximately double for every 10°C rise in junction temperature as shown in Figure 3. To maintain
junction temperature as close to ambient temperature as possible, pulse techniques must be used during testing.
MOTOROLA ANALOG IC DEVICE DATA
3
TL071C,AC TL072C,AC TL074C,AC
Figure 3. Input Bias Current
versus Temperature
Figure 4. Output Voltage Swing
versus Frequency
10
VO, OUTPUT VOLTAGE SWING (Vpp )
I IB , INPUT BIAS CURRENT (nA)
100
VCC/VEE = ±15 V
1.0
0.1
0.01
–75
–50
–25
0
25
50
75
100
30
VCC/VEE = ±15 V
±10 V
20
15
±5.0 V
10
5.0
0
100
125
RL = 2.0 k
TA = 25°C
See Figure 2
25
1.0 k
10 k
100 k
1.0 M
TA, AMBIENT TEMPERATURE (°C)
f, FREQUENCY (Hz)
Figure 5. Output Voltage Swing
versus Load Resistance
Figure 6. Output Voltage Swing
versus Supply Voltage
10 M
30
VO, OUTPUT VOLTAGE SWING (Vpp )
VO, OUTPUT VOLTAGE SWING (Vpp )
40
VCC/VEE = ±15 V
TA = 25°C
See Figure 2
20
10
5.0
0
0.1
0.2
0.4
0.7
1.0
2.0
4.0
7.0
RL = 2.0 k
TA = 25°C
30
20
10
0
10
RL = 10 k
RL = 2.0 k
20
15
10
5.0
–25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
4
20
Figure 8. Supply Current per Amplifier
versus Temperature
VCC/VEE = ±15 V
See Figure 2
–50
15
Figure 7. Output Voltage Swing
versus Temperature
25
0
10
VCC, |VEE| , SUPPLY VOLTAGE (±V)
I D , SUPPLY DRAIN CURRENT (mA)
VO, OUTPUT VOLTAGE SWING (Vpp )
30
5.0
RL, LOAD RESISTANCE (kΩ)
2.0
35
0
100
125
1.8
VCC/VEE = ±15 V
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
–50
–25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
MOTOROLA ANALOG IC DEVICE DATA
TL071C,AC TL072C,AC TL074C,AC
Figure 9. Large Signal Voltage Gain and
Phase Shift versus Frequency
Figure 10. Large Signal Voltage Gain
versus Temperature
106
105
104
0°
Gain
103
45°
102
90°
Phase Shift
101
1
135°
1.0
10
100
1.0 k
10 k
100 k
1.0 M
V VOL , VOLTAGE GAIN (V/mV)
VCC/VEE = ±15 V
RL = 2.0 k
TA = 25°C
PHASE SHIFT (DEGREES)
VVOL, OPEN LOOP GAIN
1000
100
10
1.0
180°
10 M
VCC/VEE = ±15 V
VO = ±10 V
RL = 2.0 k
–50
f, FREQUENCY (Hz)
NORMALIZED SLEW RATE
1.15
1.10
1.05
1.00
0.95
0.90
0.85
–25
0
25
0
25
50
75
100
125
Figure 12. Equivalent Input Noise Voltage
versus Frequency
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
e en , EQUIVALENT INPUT NOISE VOLTAGE ( nV/ √ Hz )
Figure 11. Normalized Slew Rate
versus Temperature
–50
–25
TA, AMBIENT TEMPERATURE (°C)
VCC/VEE = ±15 Vdc
AV = 10
RS = 100 Ω
TA = 25°C
60
50
40
30
20
10
0
0.01
0.05 0.1
0.5 1.0
5.0 10
50 100
f, FREQUENCY (Hz)
THD, TOTAL HARMONIC DISTORTION (%)
Figure 13. Total Harmonic Distortion
versus Frequency
1.0
0.5
0.1
VCC/VEE = ±15 V
AV = 1.0
VO = 6.0 V (RMS)
TA = 25°C
0.05
0.01
0.005
0.001
0.1
0.5
1.0
5.0
10
50
100
f, FREQUENCY (Hz)
MOTOROLA ANALOG IC DEVICE DATA
5
TL071C,AC TL072C,AC TL074C,AC
Representative Schematic Diagram
(Each Amplifier)
Bias Circuitry
Common to All
Amplifiers
Output
VCC
Q4
Q3
Q2
Q5
Q1
Q6
–
Inputs
+
J1
J2
2.0 k
Q17
Q20
Q15
Q19
J3
Q23
10 pF
24
Q14
Q21
Q12
Q13
Q10
Offset
Null
(TL071
only)
Q22
Q24
Q16
Q9
Q11
Q8
Q7
Q25
Q18
1.5 k
1.5 k
VEE
Figure 14. Audio Tone Control Amplifier
Input
10 k
10 k
100 k
0.033 µF
0.033 µF
10 k
VCC
–
TL071
0.033 µF
Output
+
3.3 k
0.033 µF
68 k
100 k
VEE
Turn–Over Frequency = 1.0 kHz
Bass Boost/Cut — ±20 dB at 20 Hz
Treble Boost/Cut — ±19 dB at 20 kHz
Figure 15. High Q Notch Filter
R
R
Input
–
TL071
+
C1
fo = 1 = 350 Hz
2πRC
R1
R = 2R1 = 1.5 M
C
6
C
C = C1 = 300 pF
2
MOTOROLA ANALOG IC DEVICE DATA
TL071C,AC TL072C,AC TL074C,AC
OUTLINE DIMENSIONS
8
P SUFFIX
PLASTIC PACKAGE
CASE 626–05
ISSUE K
5
–B–
1
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
4
F
DIM
A
B
C
D
F
G
H
J
K
L
M
N
–A–
NOTE 2
L
C
J
–T–
N
SEATING
PLANE
D
M
K
MILLIMETERS
MIN
MAX
9.40
10.16
6.10
6.60
3.94
4.45
0.38
0.51
1.02
1.78
2.54 BSC
0.76
1.27
0.20
0.30
2.92
3.43
7.62 BSC
–––
10_
0.76
1.01
INCHES
MIN
MAX
0.370
0.400
0.240
0.260
0.155
0.175
0.015
0.020
0.040
0.070
0.100 BSC
0.030
0.050
0.008
0.012
0.115
0.135
0.300 BSC
–––
10_
0.030
0.040
G
H
0.13 (0.005)
T A
M
M
B
M
D SUFFIX
PLASTIC PACKAGE
CASE 751–05
(SO–8)
ISSUE N
–A–
8
5
–B–
1
4X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
P
0.25 (0.010)
4
M
B
M
G
R
C
–T–
8X
K
D
0.25 (0.010)
14
M
T B
SEATING
PLANE
A
S
X 45 _
M_
J
S
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
ISSUE L
8
B
1
7
A
F
L
C
J
N
H
G
D
F
SEATING
PLANE
MOTOROLA ANALOG IC DEVICE DATA
K
M
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.18
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.189
0.196
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.007
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
DIM
A
B
C
D
F
G
H
J
K
L
M
N
INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.015
0.115
0.135
0.300 BSC
0_
10_
0.015
0.039
MILLIMETERS
MIN
MAX
18.16
19.56
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.62 BSC
0_
10_
0.39
1.01
7
TL071C,AC TL072C,AC TL074C,AC
OUTLINE DIMENSIONS
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does
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associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
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CODELINE TO BE PLACED HERE
*TL071/D*
TL071/D
MOTOROLA ANALOG IC DEVICE
DATA