OTA--output buffer
OTA
Radivoje Đurić, 2015, Analogna Integrisana Kola
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•According to the types of loads, the driving capability of the output stages differs. For switched
capacitor
p
circuits which have high
g impedance
p
capacitive
p
loads, class A output
p stage
g is a g
good
choice
•For other applications, especially when the amplifier needs to drive off chip low resistive or
high capacitive load, like earphone, class B or class AB output stage has to be utilized to have
a large driving capability,
capability and at the same time,
time a small quiescent current to save power
especially in battery operated equipment.
•The output stage usually consumes most of the power of the amplifier in such cases. For low
voltage designs, a rail-to-rail output swing is desirable to efficiently utilize the power supply
voltage.
•Common-drain voltage follower output stage (Fig. (a)) is rarely used in low voltage design
due to its small output voltage swing as a result of stacking of VGS,P and VGS,N . Instead, we
have to use common source class AB configurations (Fig.
(Fig (b)).
(b))
Radivoje Đurić, 2015, Analogna Integrisana Kola
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CMOS inverter-Common Source Output Stages
•For a low-resistor load, a low output impedance is required. The source follower
i the
is
th only
l simple
i l transistor
t
i t stage
t
which
hi h provides
id this
thi output
t t resistance.
i t
H
However,
its DC current handling is not sufficient.
•For higher output voltages, we would need higher biasing currents as well. This
would lead to an excessive power consumption.
consumption
•We now need a transistor circuit which can deliver large currents only when
needed, but with a low quiescent biasing current to lower the power consumption
as much as possible.
possible
Simple CMOS class-AB amplifier:
•The main disadvantage of
this circuit is that its two VGS’s
are between supply voltage
and
ground.
As
a
consequence the quiescent
consequence,
current depends on the supply
voltage.
Radivoje Đurić, 2015, Analogna Integrisana Kola
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Large Output Current Buffer-Common Source class AB
•In the case where the load consists of a large capacitor, the ability to sink and source a large
current is much more important than reducing the output resistance.
resistance Consequently,
Consequently the
common-source, push-pull is ideal if the quiescent current can be controlled.
•If W4/L4 = W9/L9 and W3/L3 = W8/L8, then the quiescent currents in M1 and M2 can be
determined by the following relationship:
W / L 1
W / L 2
I1  I 2  I b
 Ib
W / L 7
W / L 10
•When Vin is increased, M6 turns off M2 and turns on M1 to source current.
•Similarly, when Vin is decreased, M5 turns off M1 and turns on M2 to sink current.
Radivoje Đurić, 2015, Analogna Integrisana Kola
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CMOS amplifier with a class AB input stage
Using the square-law model for MOS devices in the
saturation region,
region the drain currents are given by
Applying Kirchhoff’s voltage law on the left and right
sides of the transconductor, we have
•The
Th transfer
t
f characteristic
h
t i ti off the
th differential
diff
ti l stage
t
i plotted
is
l tt d in
i the
th nextt figure.
fi
•The corresponding transconductance is
•The transistors remain in the saturation region provided that
Radivoje Đurić, 2015, Analogna Integrisana Kola
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•Due to the biasing condition realized by source
followers T5−T8, a current can flow through the
input stage even for zero differential input.
•Given an increase in the voltage on the positive
input and a corresponding decrease on the negative
input, the drain currents of T1 and T4, and the ones
of T2 and T3 increase and decrease from their initial
values, as a result of a rise and reduction of their
gate-source voltages, respectively.
•That is, the current in one side of the differential stage increases monotonically with the
applied voltage and is limited by the power supply level, while the one in the other side
decreases until a transistor turns off.
•The input currents are then directed to the output branches by current mirrors
mirrors.
• The cascode transistors, T17−T20, are used to increase the amplifier gain.
•The conflicting requirements of high output current during the slewing period and large output
swing during the settling are met by dynamically biasing the gates of cascode transistors so
that the common-source transistors T13−T16 remain in the saturation region.
•The common-mode feedback is realized by controlling the bias current of T29 and T30.
•Transistors T31 and T32 are connected to the bias voltage, VB, in order to deliver constant
currents
currents.
Radivoje Đurić, 2015, Analogna Integrisana Kola
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•Cross-coupled transistor based Fully Differential Op amp
Radivoje Đurić, 2015, Analogna Integrisana Kola
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Complementary Common Source Output Stage
•Independent loop is used to set each floating voltage required for the biasing of the output
transistor.
•In the class AB output stage implementation shown in Figure (b), the common-source
connected output transistors, T1 and T2, are driven by in-phase input signals.
•The quiescent current flowing through the output transistors is determined by two
independent translinear loops.
loops
•Let the transistors of the same channel type be designed with identical threshold voltages
and mobility parameters.
•Using Kirchhoff’s voltage law for the loop including T1,T4, T7, and T8, we obtain
Radivoje Đurić, 2015, Analogna Integrisana Kola
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•Based on the square law characteristic of transistors, the current I1 can be written as
•Considering the loop formed by T2, T3, T5, and T6, the voltage equation is of the form
•It can then be shown that
•To proceed further, we assume that
•When the output current I0 is set to zero, each of the currents I1 and I2 is reduced to the
quiescent current, IQ, flowing through the transistors T1 and T2. Hence,
•The
The maximum value of the current I1 is obtained when T4 is forced to operate in the cutoff
region, that is, VSG4 ≤ −VTp , and the overall current 2IB1 flows through T3. As a result,
Radivoje Đurić, 2015, Analogna Integrisana Kola
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•The current I2 is reduced to the minimum value given by
•Similarly, when the current I1 becomes equal to its minimum value, due to the fact that T3 is
forced to operate in the cutoff region, that is, VGS3 ≤ VTn, the overall current 2IB1 flows through
T4. The current I2 is then set to its maximum value.
Frequency
q
y compensation
p
by
y using
g Cgs, Cgd and Cgb
•Similar
to
conventional
two-stage
operational
amplifiers, Miller compensation capacitors are used to
stabilize the operation of the op amp in closed loop
operation The compensation capacitor is placed across
operation.
the complementary output gain stage, and the dominant
pole frequency of the overall amplifier will then be
g mi
p 
g m 0 RL Cc
where gmi is the input device transconductance, MA3 or
MA4, and gm0 is the output device transconductance
MA1 or MA2.
MA2
Radivoje Đurić, 2015, Analogna Integrisana Kola
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Rail to rail operational amplifier schematic:
Radivoje Đurić, 2015, Analogna Integrisana Kola
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Low voltage class AB output stage
•In general, the minimum supply voltage is limited by the output stage, which uses transistors
operating
p
g with sufficientlyy high
g g
gate-source voltages
g in order to drive high
g output
p currents.
•To reduce the minimum value of the supply voltage to the sum of one gate source voltage and
two saturation voltages, the gate voltages of the output transistors T1 and T2 are set by the
folded mesh loop consisting of T3 − T6, which, together with the minimum current selector
realized
li d by
b T7 − T10,
T10 also
l
regulates
l t
th minimum
the
i i
currentt flowing
fl i
th
through
h the
th output
t t
transistors.
Radivoje Đurić, 2015, Analogna Integrisana Kola
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•The transistors T12, T4, T6, and T11 form a translinear loop, which defines the current IREF.
Applying Kirchhoff’s voltage law around this loop gives
Hence,
When Kn4 = Kn6 , the expression of the current IREF is reduced to
Radivoje Đurić, 2015, Analogna Integrisana Kola
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•For the loop including transistors T1, T10, and T9, Kirchhoff’s voltage law equation can be
written as
•Because
B
VGS2 = VGS7 , we have
h
ID7 = I2 = ID8 . Using
U i the
th fact
f t that
th t
we obtain
•Assuming that I1=I2=IQ and Kp1=Kp8, it can be deduced that
where IQ is the quiescent current flowing through the output transistors.
•During normal operation, the transistor T9 operates in the linear region, where its drain
currentt is
i a function
f
ti off both
b th the
th source-gate
t voltage
lt
sett by
b the
th transistor
t
i t T8 and
d the
th sourcedrain voltage adjusted via the transistor T10.
Radivoje Đurić, 2015, Analogna Integrisana Kola
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•The source-drain voltage of the transistor T9, or the source voltage of the transistor T10, can
then be maintained sufficiently low such that the variations in the current I1 can be tracked by
th transistor
the
t
i t T10.
T10
•The transistor T7, which operates with the same gate-source voltage as the transistor T2, is
used to detect the current I2.
•The
The minimum selector circuit T7 − T10 then evaluates the magnitudes of the currents I1 and
I2 to help set a minimum current flowing through each of the output transistors as a function of
the current IREF.
•However, as the drain current of the transistor T1 increases such that its source-gate voltage
b
becomes
sufficiently
ffi i tl high
hi h to
t provide
id enough
h headroom
h d
f the
for
th operation
ti off T9 in
i the
th saturation
t ti
region, the transistors T8 − T10 realize a cascoded current mirror.
•When the current I2 reaches its minimum value, IQ/2, the maximum value of the current I1
is 2IQ.
•With VSD9 = VSG9 − VTp and VSG9 = VSG10 , VSG1 = 2VSG9 and the drain current of T9 is equal to
IQ/2.
•Because VSG8 = VSG9 , the bias current of the transistor T7 is also set to IQ/2. On the other
h d an increase
hand,
i
i the
in
th currentt I2 produces
d
an augmentation
t ti off the
th currentt flowing
fl i through
th
h T7
and T8, and a decrease in the current I1 leading to a reduction in the source-gate voltage of
the transistor T1.
•The source-gate
g
voltage
g of the transistor T1 can then be reduced until the source-drain
voltage of the transistor T9 becomes negligible. Hence, VSG1 ≃ VSG10 and the current I1 takes
the minimum value IQ/2, while the current I2 is maximum.
•It should be noted that the stability can be affected by poles associated with the folded mesh
l
loop,
th currentt mirror
the
i
T8 − T9 and
d cascode
d transistor
t
i t T10.
T10
Radivoje Đurić, 2015, Analogna Integrisana Kola
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Low-voltage compact op-amp with PMOS input stage and folded mesh with simple minimum
selector (PMOS).
Radivoje Đurić, 2015, Analogna Integrisana Kola
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Use of the BJT in Buffered Op Amps
Substrate BJTs
•Illustration of an NPN substrate BJT available in a p-well CMOS technology:
Comments:
C
t
• gm of the BJT is larger than the FET so that the output resistance w/o feedback is
lower
• Collector current will be flowing in the substrate
• Current is required to drive the BJT
• Only an NPN or a PNP bipolar transistor is available
Radivoje Đurić, 2015, Analogna Integrisana Kola
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A Lateral Bipolar Transistor
n-well CMOS technology:
•It is desirable to have the lateral collector current much larger
g than the vertical collector
current.
• Triple well technology allows the current of the vertical collector to avoid flowing in the
substrate.
• Lateral
L t l BJT generally
ll h
has good
d matching.
t hi
A Field-Aided Lateral BJT: Use minimum channel length to enhance beta, ßF≈50 to 100
depending on the process
Radivoje Đurić, 2015, Analogna Integrisana Kola
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Two-Stage Op Amp with a Class-A BJT Output Buffer Stage
•Purpose of the M8-M9 source follower:
1) Reduce
Red ce the output
o tp t resistance
(includes whatever is seen from the
base to ground divided by 1+βF).
2)) Reduces the output
p load at the drains
of M6 and M7
Two-Stage Folded Casode Op Amp with a Class-A BJT Output Buffer Stage
Radivoje Đurić, 2015, Analogna Integrisana Kola
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TSMC180: npn 5x5
 F  f  IC 
Radivoje Đurić, 2015, Analogna Integrisana Kola
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TSMC130: npn 5x5
 F  f  IC 
Radivoje Đurić, 2015, Analogna Integrisana Kola
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TSMC90: npn 5x5
 F  f  IC 
Radivoje Đurić, 2015, Analogna Integrisana Kola
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TSMC130: pnp 2x2
 F  f  IC 
Radivoje Đurić, 2015, Analogna Integrisana Kola
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