IEEE TRANSACTIONS ON TERAHERTZ SCIENCE AND TECHNOLOGY, VOL. 5, NO. 3, MAY 2015
427
Silicon Integrated 280 GHz Imaging Chipset With
4 4 SiGe Receiver Array and CMOS Source
Kaushik Sengupta, Member, IEEE, Dongjin Seo, Lita Yang, and Ali Hajimiri, Fellow, IEEE
Abstract—In this paper, we report an integrated silicon-based
active imaging chipset with a detector array in 0.13 m SiGe
process and a CMOS-based source array operating in the 240–290
GHz range. The chipset operates at room-temperature with no
external RF or optical sources, high-resistivity silicon lenses
(HRSi) or waveguides or any custom fabrication options, such
as high-resistivity substrates or substrate thinning. The receiver
chip consists of a 2-D array of 16 pixels, measuring 2.5 mm
2.5 mm with integrated antennas. An electromagnetic-active
circuit co-design approach is carried out to ensure high-efficiency
interface with detectors operating above cut-off frequencies with
good impedance matching, near-optimal noise performance, while
simultaneously suppressing the dominant surface-wave modes in
a lensless lossy bulk silicon substrate. The array performance is
characterized in the WR-3 band between 220–320 GHz. At the
designed frequency of 260 GHz, the NEP of all pixels stays between 7.9 pW
Hz–8.8 pW
Hz. The imaging chipset consists
of this 2D detector array chip and a CMOS-based source array
chip measuring 0.8 mm 0.8 mm. The entire system dissipates
less than 180 mW of DC power, representing a truly integrated
solution.
Index Terms—Beam-forming, BiCMOS, imaging, near-field,
on-chip antenna, radiation, substrate modes, terahertz (THz).
I. INTRODUCTION
T
HE Terahertz frequency range holds great promise in
a wide range of applications ranging from noninvasive
imaging, sensing to security screening for concealed weapons
and contraband detection, global environmental monitoring,
nondestructive quality control and ultra-fast wireless communication [1]–[8]. In recent years, we have seen significant research
and development towards miniaturized THz technology, but
there is still a lack of an integrated continuous-wave (CW)
Manuscript received July 31, 2014; revised November 26, 2014 and January
27, 2015; accepted March 03, 2015. Date of publication April 10, 2015; date of
current version April 29, 2015.
K. Sengupta was with the California Institute of Technology, Pasadena, CA
91125 USA. He is now with the Department of Electrical Engineering, Princeton
University, Princeton, NJ 08544 USA (e-mail: kaushiks@princeton.edu).
D. Seo was with the California Institute of Technology, Pasadena, CA 91125
USA. He is now with the Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA 94720 USA (e-mail:
djseo@eecs.berkeley.edu).
L. Yang was with the California Institute of Technology, Pasadena, CA 91125
USA. She is now with the Department of Electrical Engineering, Stanford University, Stanford, CA 08544 USA (e-mail: yanglita@stanford.edu).
A. Hajimiri is with the Department of Electrical Engineering, California Institute of Technology, Pasadena, CA 91125 USA (e-mail: hajimiri@caltech.edu).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TTHZ.2015.2414826
imaging technology, dissipating low DC power for portable
applications and operable at room-temperature. Terahertz detector technology has been demonstrated in integrated Schottky
diodes and heterodyne mixing with quantum cascade lasers
[11], micro-bolometers [12], nanowires [13] but they either
require cryogenic cooling or rely on thermal effects which
have low sensitivity with slow response time and are less
amenable to large scale integration. In more recent years, III-V
and silicon-based integrated room-temperature detectors and
signal-generators have been demonstrated to detect waves at
THz frequencies [7], [14], [15], [20]–[30]. However, while
silicon-based imagers have been demonstrated, realization of
a true integrated all-silicon THz imaging system without any
external RF pumping or offchip lens or waveguide has been
very challenging. In this paper, we report an integrated active
silicon-based imager powered with a CMOS source. This can
enable large scaling of focal-plane arrays without the need for
individual lenses attached to the pixels. In this paper, while
no lens has been used for antenna mode correction, we have
used TPX lenses to demonstrate imaging possibilities with a
mechanically scanned focused beam.
The receiver chip, fabricated in a 0.13 m silicon-germanium based BiCMOS technology (IBM 8HP), embeds 16 pixels
laid out in a 4 4 array, as shown in Fig. 1. The substrate is
250 m thick with bulk conductivity
cm and is
not thinned. Each pixel contains the entire chain of THz detection comprising of integrated antennas to intercept the incident
THz field, detectors and baseband signal processing. The chip
operates at room temperature, dissipates less than 6 mW/pixel
of DC power and measures 2.5 mm 2.5 mm in size. The receiver has an electronically controllable gain of 24 dB, that results in more than 70 dB (10 pW–100 W) of dynamic range
for an integration time of 1 second [9]. The measured sensitivity
of the receiver array demonstrates that the NEP varies between
7.9–8.8 pW Hz at 260 GHz for all pixels, taking into process
variations, mismatches and antenna pattern distortions due to
the edge effects of the chip. To the best of the authors’ knowledge, this is the highest sensitivity reported at these frequencies
in silicon-based bulk IC technology without thinning or using
an external high resistivity silicon (HRSi) lens. The source chip
measures 0.8 mm 0.8 mm and consists of 2 2 array of mutually locked integrated THz power generator and radiator elements [35]. The CMOS chip is powered by a 0.8 V battery only,
generates the THz signal internally and radiates 80 W of filtered continuous-wave power at 286 GHz with 10 dB directivity
directly from the chip without an external lens. The entire battery powered silicon-based imaging chipset dissipates less than
180 mW of DC power. While the details of the source have been
2156-342X © 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
428
IEEE TRANSACTIONS ON TERAHERTZ SCIENCE AND TECHNOLOGY, VOL. 5, NO. 3, MAY 2015
Fig. 2. Circuit-electromagnetic co-design approach to optimize aperture efficiency and detector-radiator impedance matching. a, A detector-coupled radiexcites mulator embedded in an ungrounded silicon substrate
tiple surface-waves that results in in-phase secondary sources at the backside
and front-side of the chip. b. An appropriately designed metal aperture plane
introduces an additional phase shift of which minimizes front-side leakage,
increases backside directivity and aperture efficiency by nearly 150%.
Fig. 1. The architecture of the integrated chip with 4 4 pixels with integrated
high-efficiency antenna array, with detectors and low-frequency variable gain
amplifiers.
covered in [35], this paper focusses on the receiver chip with
demonstrative examples of the imaging chipset.
The paper is organized as follows. Section II discusses
the architecture and design methodology of high-efficiency
on-chip antenna and electromagnetic interface with the detector
elements. Section III illustrates on the front-end detector design
and the measurement results are presented in Section IV.
II. ARCHITECTURE CONSIDERATIONS AND HIGH-EFFICIENCY
ON-CHIP ANTENNA DESIGN
The choice of a front-end architecture which can be scaled
to a large number of pixels is critical with respect to its sensitivity, scalability and power dissipation. Operating near and
above
of a technology, the incoming signal captured by
the antenna cannot be amplified by a high-gain front-end LNA.
While a down-converting architecture with harmonic mixing
gives additional phase information and low noise performance
due to matched-filter receiver architecture, it poses major challenges such as routing of LO, maintaining phase coherence to
all pixels, occupation of substantially large silicon area and excessive power consumption. Scaling a down-converting architecture to a high-resolution imager with more than 100 100
pixels is, therefore, prohibitive. In this work, we have employed
a direct detection scheme with integrated antennas and associated baseband circuitry for the 16-pixel camera, as illustrated in
Fig. 1.
At frequencies above
, the detection is based on the
physics of nonlinear transconductance, which leads to a
detectable DC shift due to an incoming signal. The electromagnetic-circuit interface is critical in such a system as any
loss in efficiency in guiding the incident field to the receiver
directly affects the sensitivity of the receiver. This is especially
challenging when the substrate is lossy
cm ,
has a high-dielectric constant and the incident field is captured
in the absence of external THz waveguide or a HRSi lens. As
shown in Fig. 2, oscillating current element at the interface
between silicon and air excites several surface-wave modes
[38]–[42], which can reduce the signal at the detector terminals
drastically. This is specially exacerbated at THz frequencies,
where all the dimensions of the chip are of the order of the
wavelengths of the propagating THz modes and the substrate
is lossy. Added to this can be the poor efficiency of coupling
between the onchip antenna and the active detector due to
impedance mismatch. An electromagnetics and circuits co-design approach is proposed that creates a current configuration
in the chip which naturally suppresses the unwanted modes
and simultaneously optimizes the responsivity and noise performance of the front-end detector.
As shown in Fig. 2, a current element embedded in an oxide
layer incites several secondary (Huygen) sources on the backside such as
,
,
(and on the frontside, such as
,
,
) because of multiple total internal reflection between
silicon (and oxide) and air [Fig. 2(a)]. The symmetry of an
ungrounded substrate ensures that for optimal radiation efficiency, the primary sources
and the different secondary sources add coherently in phase on both the front side
and the backside of the silicon die [43]. Therefore in such a
case, the optimal substrate thickness of
ensures almost equal directivity on both sides. This results in the aperture
area of the radiator getting divided between the front-side and
backside scattered fields, as shown in Fig. 3. A reflecting metal
plane with an appropriate aperture opening is placed within the
oxide layer below the antenna to create an additional phase difference of between the front and backside secondary sources.
This allows the silicon substrate of thickness
and low characteristic impedance to naturally direct the power
through the backside while suppressing front-side radiation, effectively increasing the field-collecting aperture by 150%. This
can also be observed in Fig. 3 which shows that the 2-D antenna array with an optimal metal plane aperture demonstrates
SENGUPTA et al.: SILICON INTEGRATED 280 GHz IMAGING CHIPSET
429
Fig. 3. Simulated radiation patterns at 260 GHz for a 4 4 array of ungrounded
loops and grounded loops in their respective optimal substrate thicknesses. A
metal ground plane with aperture opening, as shown in Fig. 2, introduces an
asymmetry by channeling most of the radiated power in one direction enabling
an increase in 150% of the aperture area.
Fig. 5. (a) Simulated radiation efficiency variation of a single radiator with
radius at 260 GHz over a 250 m thick lossless semi-infinite silicon substrate.
(b) Variation of radiation efficiency of the optimized radiator with frequency.
Fig. 4. A full-wavelength resonant radiator at 260 GHz at the interface of silicon (250 m thick) and air excites TE and TM modes symmetrically on an ungrounded substrate which are not suppressed. A ground plane, breaks the symmodes are internally suppressed.
metry and the
almost 4 dB more peak directivity (therefore, 2.5 times more
capture area and sensitivity) compared to ungrounded radiator
array for separately optimized substrate heights of
m
and
m respectively.
Further, as illustrated in the clean radiation pattern in Fig. 3,
this also allows us to control the wavelengths of the various
surface-wave modes to allow simultaneous resonance of the receiver antenna and suppression of the dominant surface-modes.
This is achieved by exploiting the ratio of dielectric constants
of oxide layer
in which the radiator is embedded
to the silicon substrate
in which the surface-waves
propagate. In a full-wavelength resonant loop with ground
plane aperture embedded in the oxide layer
,
the strongest current elements are separated by a distance
corresponding to half the wavelength of one of the laterally
propagating dominant modes [35] since
.
Averaged over the current configuration of the entire loop, this
induces destructive interference of the propagating modes and
causes nearly 90% of mode suppression.
As shown in Fig. 4(a), for a full-wavelength antenna at
260 GHz
m in a 250 m silicon
substrate, the strongest current elements at the standing-wave
maxima are nearly
apart, thereby suppressing the
mode, one of the strongest two modes.1 This mode suppression
is also observed in the electromagnetic simulation results in
Fig. 5 which shows the variation of radiation efficiency with
radius of a loop antenna at 260 GHz placed on a semi-infinite
250 m thick lossless silicon substrate. As predicted, the
maximum efficiency is achieved for a full-wavelength loop
which satisfies the dominant TE suppression condition i.e.
m. The remaining mode
is suppressed
by an array configuration with elements being separated by
. As shown in Fig. 3, an array of the optimal radiators
of Fig. 4(b) when separated by
, effectively suppresses
all the trapped modes and guides the signal effectively from
1The strongest two modes
contribute to nearly 83% of the surface wave power. The exact mode wavelengths for a grounded substrate height
, where
and
of can be obtained from
are the wavenumbers corresponding to the radiated TEM propagation in air and the TE/TM modes inside the substrate respectively. Further,
and satisfy the boundary condition
(TM mode)
(TE mode).
and
430
IEEE TRANSACTIONS ON TERAHERTZ SCIENCE AND TECHNOLOGY, VOL. 5, NO. 3, MAY 2015
Fig. 8. One pixel in the imaging receiver with integrated antenna-coupled direct detector, and baseband amplification with 24.7 dB tuning range.
Fig. 6. Efficacy of substrate mode suppression: (a) magnitude of electric field
excited by a Herztain current element on a 250 m substrate at 260 GHz. (b) An
array of efficient loop radiators radiating efficiently out of the substrate without
exciting the lateral modes.
Fig. 7. Coupling between the first pixel and the three neighboring pixels in a
row.
the backside of the substrate
m without using an
external lens. However, for an ungrounded substrate (with optimized height
m), the
and
modes are symmetric with wavelengths of 690 m, which results in a strong
residual
mode observable in the radiation pattern in Fig. 3.
In case of a finite substrate with loss, the sharpness of efficiency
plot in Fig. 5 is much lower and reaches around 15% in the 300
GHz range.
Fig. 6 demonstrates the effectiveness of guiding the waves
through the back of the substrate. It shows the simulated scattered fields for an on-chip Hertzian dipole and the proposed
array of radiators under coherent excitation. It can be noted that,
while the individual receivers are incoherent, such coherent excitation of the array antennas can occur in a focal-plane setting
similar to an optical camera or even in a scanning configuration
with a focused beam, where the beam spot area can be as large
as few pixels. The coupling between the four neighboring pixels
are shown in Fig. 7. This principle of creating optimal radiating
current profile is not limited to silicon ICs but can be extended
to other means of detecting and generating THz power, such as
photo-mixing in ultrafast photoconductive semiconductor materials.
III. DETECTOR DESIGN AND ANTENNA INTERFACE
The receiver front-end, as shown in Fig. 8, is based on direct detection and conversion of the input THz signal to a detectable shift in DC voltage. Responsivity
of a pixel to the
incoming radiation is defined as
. As expected, responsivity is dependent on the nonlinear characteristics of the detector and can be modeled as a Volterra series [44],
which allows us to optimize the bias point, emitter length and
load resistance.
Fig. 9. Detector responsivity variations with bias current and load resistance.
The fall at higher bias current is due to the detector moving into linear region
of operation.
Fig. 10. Detector NEP variations with bias current and load resistance. The
sharp increase in NEP at higher bias current is due to the detector moving into
linear region of operation.
Fig. 9 shows the responsivity variations at 260 GHz with bias
current and load resistance for an emitter length of 6 m. As
shown in the figure, responsivity initially increases with bias
current till the detector is pushed into the linear region. The sensitivity of the receiver is characterized by its noise equivalent
power (NEP) defined as
, where is the output
voltage noise spectral density. Fig. 10 shows the detector NEP
variations against bias current and load resistance. The sharp increase in NEP for higher currents is due to the detector moving
into linear region of operation. Based on the simulation results
in Figs. 9 and 10, the bias current was chosen to be 440 A (detector pair) and load resistance of 3 k , leading to simulated
detector responsivity (excluding antenna) of 11 kV/W and NEP
of near 3.8 pW Hz at 260 GHz. Although the detector responsivity could be optimized with a complex output impedance network [25], the detector outputs were directly connected to the
succeeding VGAs and base band gain stages for a compact pixel
layout (Fig. 8).
SENGUPTA et al.: SILICON INTEGRATED 280 GHz IMAGING CHIPSET
431
Fig. 11. Front end detector and its small-signal equivalent model for noise
analysis.
The source impedance interfacing with the on-chip antenna
for lowest achievable output noise is not necessarily the conjugate impedance for optimal power transfer. Consider the smallsignal model for noise analysis in Fig. 11, where we have neglected the effect of
to simplify analysis. It can be noted
that while the circuit operation is inherently nonlinear, the sensitivity of the receiver is measured in the presence of the smallest
detectable signal level where the nonlinear effects on the noise
processes will not be dominant. Therefore, linear noise analysis
still holds. The noise factor
can be expressed as a function
of the complex source impedance
,
, bias
current and load resistance
as
Fig. 12. Optimal noise matching circles at 260 GHz and optimal power
matching trajectory for operation frequencies between 100–400 GHz.
(5)
Therefore,
(1)
(6)
(2)
. The optimal source
where
(antenna) impedance for minimal noise figure can be obtained
by simultaneous minimization of the noise figure with respect
to
and
and
(3)
These conditions can be simplified to derive the following approximate design expressions for :
(4)
As can be seen from (3), that the noise figure is a general
multi-dimensional function of design parameters such as source
impedance
, load impedance
and operating conditions
such as
. The choice of the operating point and bias current needs to be done in conjunction with optimization of responsivity and power dissipation, as was explained earlier in
Figs. 9 and 10, which guides our choice of
A and
from Figs. 9 and 10. Based on these biasing conditions, and small-signal simulated values of
, we
obtain
from (5) and (6).
The simulated noise figure circles at 260 GHz for this biasing condition are plotted in Fig. 12, along with optimal source
impedance for power matching conditions
. As can be seen
from the figure, at the design frequency of 260 GHz, optimal
power matching and noise matching can almost be achieved
simultaneously. In order to minimize loss, the antenna is designed to provide the near conjugate single-ended impedance
of
without any separate matching network.
The antenna terminal impedance can be controlled by adjusting
432
IEEE TRANSACTIONS ON TERAHERTZ SCIENCE AND TECHNOLOGY, VOL. 5, NO. 3, MAY 2015
Fig. 14. Die micrograph of the chip showing the 16 pixels. The chip is attached
to a piece of transparent tape and bonded to a standard low-cost two layer FR-4
board to facilitate signal reception from the backside of the substrate.
Fig. 13. Baseband amplification with adjustable gain of 33.0–57.7 dB and,
DC-offset blocking with 100 Hz low-frequency cut-off.
the ground aperture coupled to the antenna, as illustrated in
Fig. 12. The incoming radiation excites a RF current in the antenna structure which, in turn, excites a ground surface current
with a phase lag dependent on the aperture size. By controlling
the aperture size, this phase lag can be adjusted which in turn
can tune the complex impedance presented at the detector terminals, without affecting the other radiation parameters significantly. The detector output is compared with a reference node
and amplified by the chain of baseband amplifier stages, as seen
in Fig. 1.
Fig. 13 shows the baseband amplification stages with controllable gain and DC offset blocking. The low-frequency amplifier stages are 180 nm FET-based and have a collective programmable gain from 37 to 55.7 dB. In order to prevent the
stages from saturation from DC mismatches to such high gain,
the last stage is designed to be of band-pass nature with a very
low cut-off frequency of 100 Hz. This is achieved by employing
a feedback resistor with a transistor in sub-threshold providing
a large resistance, as shown in Fig. 13.
IV. MEASUREMENT RESULTS
The chip was realized in a 0.13 m SiGe BiCMOS process
(IBM 8HP) on a 250 m bulk substrate. The substrate bulk resistivity is
cm and the die was not thinned. The
die micrograph of the chip is shown in Fig. 14. The antennas
were realized on the 3 m thick Al layer. The chip is configured
as an imager by attaching it to a piece of transparent tape and
bonded to a standard low-cost two layer FR-4 board to facilitate
signal reception from the backside of the substrate, as shown in
Fig. 14. The low-power dissipation of the chip ensures that heat
dissipation is not a major problem. There are, ofcourse, more
sophisticated packaging methods which can enable efficient reception of the THz signal from the backside of the silicon die.
The baseband gain-stage is measured as a breakout structure
and the results are shown in Fig. 15. The baseband has a peak
voltage gain of 57.7 dB with a 3 dB bandwidth from 100 Hz–100
kHz. The DC-offset is suppressed by the capacitive coupling
and the cut-off frequency is kept at such a low frequency below
Fig. 15. (a) Measured frequency response of the baseband amplification
showing a bandpass response which rejects DC offsets and low-frequency
drifts. (b) Measured gain variations (33–57.7 dB) with the VGA settings.
100 Hz using the transistor in sub-threshold, as described in the
previous section. The gain can be varied from 33–57.7 dB using
the VGA control.
The experimental set up for responsivity and NEP measurement for the entire receiver chain for each pixel is shown
in Fig. 16. A calibrated WR-3 source with a 25 dB standard
gain antenna, is used to irradiate the chip supported on a piece
of transparent tape (Fig. 14). The radiation is captured from
the backside of the silicon substrate where it demonstrates
the highest directivity. The polarization-aligned radiation is
chopped at variables frequencies from 1 to 100 kHz and the
periodic signals corresponding to 16 pixels at the output of the
chips is measured with an oscilloscope and lock-in amplifier.
The incident power at each pixel is measured from the calibrated output power of the source, measured beam-pattern and
the physical aperture area of each pixel using the free-space
relation
. The
dependence
on the incident power and the uniformity of the beam power
SENGUPTA et al.: SILICON INTEGRATED 280 GHz IMAGING CHIPSET
433
Fig. 18. Measured performance of the detector array at 260 GHz. (a) Measured
responsivity variations across all 16 pixels at 260 GHz. (b) NEP variations for
all pixels at 260 GHz.
Fig. 16. Setup for measuring responsivity and NEP of the imager. Responsivity
is characterized in the far-field of the THz source and the noise profile is measured using a spectrum analyzer, buffered by an external low-noise amplifier.
Fig. 19. Variation of pixel responsivity and NEP with frequency.
Fig. 17. Measured noise spectral density at the output of one pixel.
across the aperture were verified by scanning the imager across
the plane of measurement at different far-field distances ranging
from 75 to 150 mm. The physical area of each pixel is used to
calculate
. The whole setup was calibrated with a Erikson
THz power meter [45]. The noise spectral density (for the
calculation of NEP at the chopping frequency) corresponding to
each pixel is by a low-noise amplifier, as shown in Fig. 16. The
calibrated noise spectral density at the output of one pixel is
shown in Fig. 17. The measured corner frequency of the chain
is higher than simulated which limited the lower end of the
chopping frequency. The higher end is limited by the bandwidth
of the baseband amplifiers, as shown in Fig. 15. The chopping
frequency is optimized for the lowest NEP at 100 kHz. As is
evident from the measurement setup, the responsivity and the
NEP measurements correspond to the entire pixel including the
antenna at the front-end.
The measured responsivity and NEP of all the 16 pixels of the
receiver array at 260 GHz are shown in Fig. 18. The differences
in performance across the chip includes process variation and
mismatches between the active devices and also due to edge effects of the silicon die on the antenna response. The responsivity
varies between 2.5 V W–2.7 V W across all 16 pixels at 260
GHz, while the mean responsivity drops down to 0.5 V W at
the edges of the band near 220 and 320 GHz. The NEP varies
between 7.9 pW Hz–8.8 pW Hz for all pixels at 260 GHz,
Fig. 20. Measured focused beam spot of a WR-3 source as acquired by the
imager chip. Demonstration of Fourier transform of the object on the focus plane
of the lens at 260 GHz.
while it reaches to nearly 32 pW Hz at 300 GHz. The variation in responsivity and NEP with incident radiation frequency
is shown in Fig. 19.
In order to demonstrate imaging, the chip is first radiated with
a focused beam spot from a WR-3 source. Fig. 20 shows the
measured (and theoretical) cross-section of the focused beam
spot at 250 and 310 GHz acquired by scanning the imager chip
across the focal plane. As an example to demonstrate the sensitivity of the detector, the source power is distributed to illuminate an entire object (instead of being focused to a diffraction-limited spot), and the Fourier transform of the image is
cast the focal plane which is captured by the silicon chip, as
shown in Fig. 20. The sensitivity of the imager allows us to
434
IEEE TRANSACTIONS ON TERAHERTZ SCIENCE AND TECHNOLOGY, VOL. 5, NO. 3, MAY 2015
Fig. 23. All-silicon far-field and near-field measurement. (a) Measurement of
the diffraction-limited spot radiated by the CMOS chip [35] at 290 GHz by SiGe
detector array. (b) Near-field profile, obtained by scanning the detector array
chip, when the two PCBs with the silicon chips are brought into each other's
near-fields.
Fig. 21. (a) Transmission-mode imaging set-up and example. (b) Reflectionbased imaging setup and example.
Fig. 24. An example of the imaging demonstrated with the battery-powered
all-silicon system.
Fig. 22. An all-silicon THz imaging chipset powered by a battery. a, The
chipset comprises of the SiGe-based 4 4 detector array and the CMOS-based
2 2 source array.
obtain a high-SNR image of the Fourier transform of the object even though the power is spread over the imaging plane.
In order to demonstrate imaging capabilities with the siliconbased chip, we perform some reflection and transmission-based
imaging at 300 GHz with some sample specimens, as shown in
Fig. 21. Transmission-mode and reflection mode imaging reveal different properties of the specimen under investigation
and offer different contrasting mechanisms. While in a transmission-mode imaging, only the transmitted power is captured
and reflected and absorbed power is lost, in a reflection-based
imaging setting, the reflected waves can carry different contrast
information. This could arise due to the differences in its dielectric properties, as seen between bones, muscles and cartilages
from parts of a mouse leg in Fig. 21, demonstrating feasibility
of noninvasive imaging at THz frequencies. Since the radiating
source is a CW and the detectors are incoherent, depth information cannot be resolved from the reflected waves. The imaging
acquisition time was limited by the mechanical scanning stage.
In the following examples, the WR-3 multiplier based source
is replaced with a radiating THz CMOS source consisting of
a 2 2 array of free-running, mutually injection locked source
near 290 GHz [35]. The imaging setup is shown in Fig. 22. The
CMOS free-running frequency is near 290 GHz and the radiation is chopped at a frequency of 5 kHz by modulating the
supply battery. The chopping frequency had to be reduced to
lower than optimal to enable switching of the battery power
supply of the CMOS chip. The focused diffraction-limited spot
of the radiating CMOS source, as measured by the SiGe receiver array chip, is shown in Fig. 23. The two PCB boards are
then brought into each other’s near field and the field profile is
scanned again. As can be seen in Fig. 23, the broadside spot and
side-resonance fields due to the parallel plate waveguide effect
are clearly visible. A demonstrative imaging performed by the
silicon-imager chip using the CMOS THz source is shown in
Fig. 24. The entire system is battery powered, uses no external
RF power source or silicon lenses, and dissipates less than 180
mW of DC power. Table I compares the performance of recently
reported silicon-based imagers.
V. CONCLUSION
In this paper, we present an electromagnetic-circuit co-design
approach towards enabling efficient integrated silicon-based
active imagers which operate at room-temperature without
high-resistivity silicon lenses (HRSi) or waveguides or any
custom fabrication options, such as high-resistivity substrates
or substrate thinning. The receiver chip consists of a 2D array of
16 pixels, measuring 2.5 mm 2.5 mm with integrated antennas,
and the NEP of all pixels stays between 7.9–8.8 pW Hz at
the designed frequency of 260 GHz. To the best of the authors'
knowledge, this is the highest sensitivity reported at these
SENGUPTA et al.: SILICON INTEGRATED 280 GHz IMAGING CHIPSET
435
TABLE I
SUMMARY OF SUB-MILLIMETER-WAVE IMAGERS IN SILICON
Pixel outputs multiplexed
Measured at chopping frequency of 100 kHz
frequencies with lens-less bulk silicon ICs. The imaging chipset
consists of this 2-D detector array chip and a CMOS-based
THz source array chip measuring 0.8 mm 0.8 mm. The entire
system dissipates less than 180 mW of DC power, representing
a truly integrated solution.
ACKNOWLEDGMENT
The authors would like to thank UMC, Taiwan, for providing
fabrication facilities, and Prof. J. Zmuidzinas, Prof. G. Blake,
D.Miller from Caltech, Pasadena, CA, USA, for providing
some of the measurement equipments. The authors also acknowledge the help received regarding technical discussions
from Dr. P. Siegel, Prof. D. Rutledge, and Dr. S. Weinreb.
REFERENCES
[1] M. Tonouchi, “Cutting-edge terahertz technology,” Nat. Photon., vol.
1, pp. 97–105, 2007.
[2] P. H. Siegel, “Terahertz technology,” IEEE Trans. Microw. Theory
Techn., vol. 50, no. 3, pp. 910–928, Mar. 2002.
[3] B. Ferguson and X. C. Zhang, “Materials for terahertz science and technology,” Nature Mater., vol. 1, pp. 26–33, 2002.
[4] P. H. Siegel, “Terahertz technology in biology and medicine,” IEEE
Trans. Microw. Theory Techn., vol. 50, no. , pp. 2438–2447, 2004.
[5] L. Ho, M. Pepper, and P. Taday, “Terahertz spectroscopy: Signatures
and fingerprints,” Nat. Photon., vol. 2, pp. 541–543, 2008.
[6] B. B. Hu and M. C. Nuss, “Imaging with terahertz waves,” Opt. Lett.,
vol. 20, no. 16, pp. 1716–1718, 1995.
[7] K. B. Cooper, R. J. Dengler, N. Llombart, B. Thomas, G. Chattopadhyay, and P. H. Siegel, “THz imaging radar for standoff personnel
screening,” IEEE Trans. THz Sci. Technol., vol. 1, no. 1, pp. 169–182,
Sep. 2011.
[8] J. D. Park, S. Kang, and A. Niknejad, “A 0.38 THz fully integrated
transceiver utilizing a quadrature push-push harmonic circuitry in
SiGe BiCMOS,” IEEE J. Solid-State Circuits, vol. 47, no. 10, pp.
2344–2354, Oct. 2012.
[9] K. Sengupta, D. J. Seo, and A. Hajimiri, “A terahertz imaging receiver
in 0.13 um SiGe BiCMOS technology,” in Int. Conf. Infrared, Millim.,
THz Waves (IRMMW-THz), 2011, pp. 1–2.
[10] M. C. Wanke et al., “Monolithically integrated solid-state terahertz
transceivers,” Nat. Photon., vol. 4, pp. 565–569, Jun. 2010.
[11] M. Lee et al., “Heterodyne mixing of terahertz quantum cascade lasers
using a planar Schottky diode,” IEEE J. Sel. Topics Quantum Electron.,
vol. 14, no. 2, pp. 370–373, Mar./Apr. 2008.
[12] L. Liu et al., “Development of integrated terahertz broadband detectors
utilizing superconducting hot-electron bolometers,” IEEE Trans. Appl.
Supercond., vol. 19, no. 2, pp. 282–286, Jun. 2009.
[13] M. S. Vitiello et al., “Semiconductor nanowires for highly sensitive,
room-temperature detection of terahertz quantum cascade laser emission,” Appl. Phys. Lett., vol. 100, Jun. 2006, Art ID 031115.
[14] M. Bauer, S. Boppel, A. Lisauskas, V. Krozer, and H. G. Roskos,
“Real-time CMOS terahertz camera employing plane-to-plane imaging
with a focal-plane array of field-effect transistors,” in 38th Int. Conf.
Infrared, Millim., THz Waves (IRMMW-THz), 2013, pp. 1–2.
[15] A. Lisauskas, S. Boppel, M. Mundt, V. Krozer, and H. G. Roskos,
“Subharmonic mixing with field-effect transistors: Theory and experiment at 639 GHz high above ,” IEEE Sensors J., vol. 13, no. 1, pp.
124–132, Jan. 2013.
[16] J. B. Pendry, L. Martín-Moreno, and F. J. Garcia-Vidal, “Mimicking
surface plasmons with structured surfaces,” Science, vol. 305, pp.
847–848, Aug. 2004.
[17] T. H. Chen et al., “Experimental demonstration of frequency-agile terahertz metamaterials,” Nat. Photon., vol. 2, pp. 295–298, Apr. 2008.
[18] S. Preu, G. H. Döhler, S. Malzer, L. J. Wang, and A. C. Gossard, “Tunable continuous-wave terahertz photomixer sources and applications,”
J. Appl. Phys., vol. 109, 2011, Art ID 061301.
[19] F. Schuster et al., “Broadband terahertz imaging with highly sensitive silicon CMOS detectors,” Opt. Express, vol. 8, pp. 7827–7832,
2011.
[20] E. Ojefors et al., “0.65 THz focal-plane array in a quarter-micron
CMOS process technology,” IEEE J. Solid-State Circuits, vol. 44, no.
7, pp. 1968–1976, Jul. 2009.
[21] E. Ojefors et al., “A 820 GHz SiGe chipset for terahertz active imaging
applications,” in Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC),
Feb. 2011, pp. 224–225.
[22] A. Hadi et al., “A 1 k-pixel video camera for 0.7–1.1 terahertz imaging
applications in 65-nm CMOS,” IEEE J. Solid-State Circuits, vol. 47,
no. 12, pp. 2999–3011, Dec. 2012.
436
IEEE TRANSACTIONS ON TERAHERTZ SCIENCE AND TECHNOLOGY, VOL. 5, NO. 3, MAY 2015
[23] R. Han et al., “280 GHz and 860 GHz image sensors using schottky
barrier diodes in 0.13 m digital CMOS,” in Proc. IEEE Int. Solid-State
Circuits Conf. (ISSCC), Feb. 2012, pp. 254–256.
[24] A. Tang, J. Q. Gu, and M. C. F. Chang, “CMOS receivers for active
and passive mm-wave imaging,” IEEE Commun. Mag., vol. 49, pp.
190–198, 2011.
[25] M. Uzunkol et al., “A 0.32 THz SiGe 4 4 imaging array using highefficiency on-chip antennas,” IEEE J. Solid-State Circuits, vol. 48, no.
9, pp. 2056–2066, Sep. 2013.
[26] H. Sherry, R. Hadi, J. Grzyb, E. Öjefors, A. Cathelin, A. Kaiser, and U.
Pfeiffer, “Lens-integrated THz imaging arrays in 65 nm CMOS technologies,” in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2011, pp.
1–4.
[27] F. Schuster, H. Videlier, A. Dupret, D. Coquillat, M. Sakowicz, J. Rostaing, M. Tchagaspanian, B. Giffard, and W. Knap, “A broadband THz
imager in a low-cost CMOS technology,” in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, San Francisco, CA, USA, Feb.
2011, pp. 42–43.
[28] R. Han et al., “A 280-GHz Schottky diode detector in 130-nm digital
CMOS,” IEEE J. Solid-State Circuits, vol. 46, no. 11, pp. 2602–2612,
Nov. 2011.
[29] R. Han, Y. Zhang, Y. Kim, D. Y. Kim, H. Shichijo, E. Afshari, and
K. K. O, “Active terahertz imaging using Schottky diodes in CMOS:
Array and 860-GHz pixel,” IEEE J. Solid-State Circuits, vol. 48, no.
10, pp. 2296–2308, Oct. 2013.
[30] O. Momeni and E. Afshari, “High power terahertz and millimeter-wave
oscillator design: A systematic approach,” IEEE J. Solid-State Circuits,
vol. 46, no. 3, pp. 583–597, Mar. 2011.
[31] R. Han and E. Afshari, “A 260 GHz broadband source with 1.1 mW
continuous-wave radiated power and EIRP of 15.7 dBm in 65 nm
CMOS,” in Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC), Feb.
2013, pp. 138–139.
[32] Z. Wheng et al., “A 210 GHz fully integrated differential transceiver with fundamental-frequency VCO in 32 nm SOI CMOS,” in
Proc. IEEE Int. Solid-State Circuits Conf. (ISSCC), Feb. 2013, pp.
136–137.
[33] J. Sharma and H. Krishnswamy, “216- and 316-GHz 45-nm SOI
CMOS signal sources based on a maximum-gain ring oscillator
topology,” IEEE Trans. Microw. Theory Techn., vol. 61, no. 1, pt. 2,
pp. 492–504, Jan. 2013.
[34] F. Golcuk et al., “A 0.39–0.44 THz 2 4 amplifier-quadrupler array
with peak EIRP of 3–4 dBm,” IEEE Trans. Microw. Theory Techn.,
vol. 61, no. 12, pp. 4483–4491, Dec. 2013.
[35] K. Sengupta and A. Hajimiri, “Distributed active radiation for THz
signal generation,” in Proc. IEEE Int. Solid-State Circuits Conf.
(ISSCC), Feb. 2011, pp. 288–289.
[36] K. Sengupta and A. Hajimiri, “A 0.28 THz power-generation and
beam-steering array in CMOS based on distributed active radiators,”
IEEE J. Solid-State Circuits, vol. 47, pp. 3013–3030, Dec. 2012.
[37] K. Sengupta and A. Hajimiri, “A. A 0.28 THz 44 power-generation
and beam-steering array,” in Proc. IEEE Int. Solid-State Circuits Conf.
(ISSCC), Feb. 2012, vol. 288–289.
[38] K. Sengupta and A. Hajimiri, “Sub-THz beam-forming using near-field
coupling of distributed active radiator arrays,” in Proc. IEEE Radio
Freq. Integr. Circuits Symp., Jun. 2011, pp. 1–4.
[39] D. B. Rutledge et al., “Integrated-circuit antennas,” in Infrared and
Millimeter-Waves. New York, NY, USA: Academic, 1983, p. 190.
[40] H. Kogelnik, “Theory of dielectric waveguides,” in Integrated Optics,
T. Tamir, Ed. New York, NY, USA: Springer-Verlag, ch. 2.
[41] N. G. Alexopoulos, P. B. Katehi, and D. B. Rutledge, “Substrate optimization for integrated circuit antennas,” IEEE Trans. Microw. Theory
Techn., vol. MTT-31, no. 7, pp. 550–557, Jul. 1983.
[42] G. Rebeiz, “Millimeter-wave and terahertz integrated circuit antennas,” Proc. IEEE, vol. 80, no. 11, pp. 1748–1770., Nov. 1992.
[43] A. Babakhani et al., “A 77-GHz phased-array transceiver with on-chip
antennas in silicon: Receiver and antennas,” IEEE J. Solid-State Circuits, vol. 41, no. 12, pp. 2795–2806, Dec. 2006.
[44] W. B. Dou and Z. L. Sun, “Surface wave fields and power in millimeter
wave integrated dipole antennas,” Intl. J. Infrared Millim. Waves, vol.
18, no. 3, pp. 711–721, 1997.
[45] J. W. May and G. Rebeiz, “Design and characterization of W-band
SiGe RFICs for passive millimeter-wave imaging,” IEEE Trans. Microw. Theory Techn., vol. 58, no. 2, pp. 1420–1430, Feb. 2010.
[46] “Erikson Power Meter Operating Manual” Virginia Diodes
Inc., Charlottesville, VA, USA, Sep. 2010 [Online]. Available:
http://vadiodes.com/images/Products/PowerMeter/20100831%20revision%20vdi-pm-pm4%20manual.pdf
Kaushik Sengupta (M’12) received the B.Tech.
and M.Tech. degrees in electronics and electrical
communication engineering from the Indian Institute
of Technology (IIT), Kharagpur, India, both in 2007,
and the M.S. and Ph.D. degrees in electrical engineering from the California Institute of Technology,
Pasadena, CA, USA, in 2008 and 2012, respectively.
In February 2013, he joined the faculty of the
Department of Electrical Engineering, Princeton
University, Princeton, NJ, USA. During his undergraduate studies, he performed research at
the University of Southern California, and the Massachusetts Institute of
Technology, in the summers of 2005 and 2006, where he was involved with
nonlinear integrated systems for high-purity signal generation and low-power
RF identification (RFID) tags, respectively. His research interests are in the
areas of high-frequency ICs, electromagnetics, optics for various applications
in sensing, imaging and high-speed communication.
Dr. Sengupta was the recipient of the IBM Ph.D. fellowship (2011–2012),
the IEEE Solid State Circuits Society Predoctoral Achievement Award, the
IEEE Microwave Theory and Techniques Graduate Fellowship, and the Analog
Devices Outstanding Student Designer Award (2011). He received the Charles
Wilts Prize in 2013 from Electrical Engineering, Caltech for outstanding
independent research in electrical engineering leading to a Ph.D. degree. He
was selected in “Princeton Engineering Commendation List for Outstanding
Teaching” in 2014. He was also the recipient of the Prime Minister Gold Medal
Award of IIT, India (2007), the Caltech Institute Fellowship, the Most Innovative Student Project Award of the Indian National Academy of Engineering
(2007), and the IEEE Microwave Theory and Techniques Undergraduate
Fellowship (2006). He was the co-recipient of IEEE RFIC Symposium Best
Student Paper Award in 2012 and co-recipient of the IEEE Microwave Prize
in 2015.
Dongjin Seo received the B.S. degree in electrical
engineering with honors from the California Institute
of Technology, Pasadena, CA, USA, in 2011, and the
M.S. degree in electrical engineering from the University of California, Berkeley, CA, USA in 2014,
and is currently working toward the Ph.D. degree at
the same university.
His research interest include the design of energy-efficient mixed-signal systems, RF circuits, and
sensor interfaces for biomedical and implantable
applications.
Mr. Seo was the recipient of a NSF Graduate Fellowship in 2012.
Lita Yang received the B.S. degree in electrical engineering from the California Institute of Technology,
Pasadena, CA, USA, in 2012, and the M.S. degree in
electrical engineering from Stanford University, Palo
Alto, CA, USA, in 2014, and is currently working toward the Ph.D. degree in electrical engineering at the
same university.
She has held intern positions at Oracle Labs in
2012 and Qualcomm in 2014. Her current research
interest is in hardware implementation of machine
learning and computer vision algorithms. In particular, she is exploring energy and performance trade-offs for approximate
computation using mixed-signal circuit architectures for deep convolutional
neural networks.
SENGUPTA et al.: SILICON INTEGRATED 280 GHz IMAGING CHIPSET
Ali Hajimiri (S’94–M’99–SM’09–F’10) received
the B.S. degree in electronics engineering from the
Sharif University of Technology, Tehran, Iran, and
the M.S. and Ph.D. degrees in electrical engineering
from Stanford University, Stanford, CA, in 1996 and
1998, respectively.
From 1993 to 1994, he was a Design Engineer with
Philips Semiconductors, where he was involved with
a BiCMOS chipset for global system for mobile communication (GSM) and cellular units. In 1995, he was
with Sun Microsystems, where he was involved with
the UltraSPARC microprocessor’s cacheRAM design methodology. During the
summer of 1997, he was with Lucent Technologies (Bell Laboratories), Murray
Hill, NJ, USA, where he investigated low-phase-noise integrated oscillators. In
1998, he joined the faculty of the California Institute of Technology, Pasadena,
where he is currently the Thomas G. Myers Professor of Electrical Engineering
and the Director of the Microelectronics Laboratory. In 2002, he cofounded
Axiom Microdevices Inc., whose fully integrated CMOS PA has shipped close
to 200 million units, and was acquired by Skyworks Inc. in 2009. He has authored or coauthored over 150 refereed journal and conference technical papers.
He authored The Design of Low Noise Oscillators (Springer, 1999). He holds
over 60 U.S. and European patents. His research interests are high-speed and
high-frequency ICs for applications in sensors, biomedical devices, photonics,
and communication systems.
437
Dr. Hajimiri has served on the Technical Program Committee of the International Solid-State Circuits Conference (ISSCC). He is an associate editor of the
IEEE JOURNAL OF SOLID-STATE CIRCUITS and an associate editor of the IEEE
TRANSACTIONS ON CIRCUITS AND SYSTEMS–PART II, EXPRESS BRIEFS. He was
a Guest Editorial Board member of the Transactions of Institute of Electronics,
Information and Communication Engineers of Japan. He was a guest editor of
the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES. He is a
member of the Technical Program Committees of the International Conference
on Computer-Aided Design (ICCAD). He was selected to the top 100 innovators (TR100) list in 2004. He has served as a Distinguished Lecturer of the
IEEE Solid-State Circuits Society and the IEEE Microwave Theory and Techniques Society. He was the recipient of the California Institute of Technology
Graduate Students Council Teaching and Mentoring Award, as well as the Associated Students of the California Institute of Technology Undergraduate Excellence in Teaching Award. He was the Gold Medal recipient of the National
Physics Competition and the Bronze Medal recipient of the 21st International
Physics Olympiad, Groningen, The Netherlands. He was a corecipient of the
IEEE JOURNAL OF SOLID-STATE CIRCUITS Best Paper Award of 2004 and the
International Solid-State Circuits Conference (ISSCC) Jack Kilby Outstanding
Paper Award. He was a two-time corecipient of the CICC’s Best Paper Award
and a three-time recipient of the IBM Faculty Partnership Awards, as well as the
National Science Foundation CAREER Award and Okawa Foundation Award.