EE 201 ELECTRIC CIRCUITS
Class Notes
CLASS 5
The material covered in this class will be as follows:
⇒
Voltage Sources in Series and in Parallel
⇒
Current Sources in Series and Parallel
⇒
Combining KVL and Ohm’s Law
⇒
Voltage Divider Rule
⇒
Current Divider Rule
At the end of this class you should be able to:
⇒
Recognize invalid series and parallel source connections
⇒
Combine voltage sources in series
⇒
Combine current sources in parallel
⇒
Directly incorporate Ohm’s Law in KVL
⇒
Use the Voltage Divider Rule to simplify circuit analysis
⇒
Use the Current Divider Rule to simplify circuit analysis
Sources Connected in Series and in Parallel :
Both circuits are invalid. Why?
Circuit (a) violates KVL ⇒ ideal voltage sources cannot be combined in parallel
(unless they have the same voltage)
Circuit (b) violates KCL
⇒ ideal current sources cannot be combined in series
(unless they have the same current)
a
V1
Load
V2
b
(a)
a
I1
I2
Load
b
(b)
Figure 1
We can connect ideal voltage sources in series.
Voltage sources in series can be reduced to a single voltage source
Veq = V1 − V2 + V3 + V4
Figure 2
We can connect ideal current sources in parallel.
Current sources in parallel can be combined as a single current source
I eq = − I1 − I 2 + I 3 − I 4
Figure 3
Example 1:
Calculate v1 in the following circuit.
Ω
Ω
Figure 4
Solution:
veq = 10 − 6 = 4V
I eq = 3 − 2 = 1A
KCL at node “b”
⇒
KVL (outer circuit)
⇒
Ohm’s law in eqn. (2)
⇒
1 = i1 + i2
⇒
i1 + i2 = 1
(1)
−4 + v1 + v2 = 0
⇒
v1 + v2 = 4
(2)
(−5i1 ) + (7i2 ) = 4
⇒
−5i1 + 7i2 = 4
(3)
From (1) & (3)
⇒
−5i1 + 7(1 − i1 ) = 4
i1 = 0.25 A
⇒
∴ v1 = −5i1 = −1.25V
Ω
Ω
Figure 5
Combining Ohm’s Law & KVL
−v5 + v1 + v2 − v3 + v4 = 0
[KVL around outer circuit (CW)]
⇓
−v5 + (i1 R1 ) + (−i2 R2 ) − (−i3 R3 ) + v4 = 0 (Ohm’s Law)
⇓
−v5 + i1 R1 − i2 R2 + i3 R3 + v4 = 0
(1)
KVL is written directly in terms of the resistor currents i1 , i2 and i3 .
i (through R ) same as KVL direction
⇒
+iR
i (through R ) opposite to KVL direction
⇒
−iR
Figure 6
Using this rule
+v5 − v4 − i3 R3 + i2 R2 − i1 R1 = 0 [KVL around outer circuit (CCW)]
The same as (1).
Figure 7
Example 2:
In the following circuit, calculate:
a) i1 & i2
b) the power absorbed by the current source.
Ω
Ω
Figure 8
Solution:
a)
[KVL around outer circuit (CW)] ⇒
10 + 6i2 − 3i1 = 0
(1)
⇒
i1 + 2 + i2 = 0
(2)
KCL at node “a”
Solving (1) & (2) ⇒ 10 + 6(−i1 − 2) − 3i1 = 0
2
− + 2 + i2 = 0
9
⇒
⇒
2
i1 = − A
9
2
16
i2 = −2 + = − A
9
9
b)
Ohm’s Law ⇒
v2 = 6i2
⇒
v2 = 6(−
16
32
)=− V
9
3
p2 A = +iv = + (2)(−
32
) = −21.33W
3
Ω
Ω
Figure 9
Ohm’s Law can also be combined with KCL. This case will not be covered in this class.
The Voltage Divider Rule (VDR)
The total voltage across the series resistors R1 , R2 , ... , RN is V.
i=
V
V
= N
Req
∑R
i =1
i
⎛
⎜ R
V
vx = iRx = N
Rx = ⎜ N x
⎜ R
Ri
∑
⎜∑ i
i =1
⎝ i =1
VDR ⇒
VDR
⇒
⎛
⎜ R
vx = ⎜ N x
⎜ R
⎜∑ i
⎝ i =1
vresistor =
⎞
⎟
⎟V
⎟
⎟
⎠
⎞
⎟
⎟V
⎟
⎟
⎠
resistor
× (total voltage)
sum
The VDR is valid for any number of resistors in series.
Figure 10
Example 3:
Calculate v1 & v2
VDR ⇒
v1 =
4
× 30 = 12V
4+6
VDR ⇒
v2 =
6
× 30 = 18V
4+6
Ω
Ω
Figure 11
VDR
⇒
Higher voltage drop across the higher resistance.
Example 4:
Calculate the unknown voltages.
Ω
Ω
Ω
Ω
Figure 12
Solution:
5 + 7 = 12Ω
VDR ⇒
VDR
⇒
R1 =
⇒
v1 = −
v2 =
4 ×12
= 3Ω
4 + 12
15
× 36 (a minus sign is required here. Why?) ⇒
15 + 3
3
× 36
15 + 3
Check: KVL ⇒
⇒
v2 = 6V
−36 − v1 + v2 = −36 − (−30) + (6) = −36 + 30 + 6 = 0
v1 = −30V
VDR
⇒
v3 =
5
5
× v2 = × 6
5+7
12
⇒
v3 = 2.5V
VDR
⇒
v4 =
7
7
× v2 = × 6
5+7
12
⇒
v4 = 3.5V
Ω
Ω
Ω
Ω
Ω
Ω
Figure 13
The Current Divider Rule (CDR)
The total current entering into the parallel combination of R1 & R2 is I
V = IReq = I
R1 R2
R1 + R2
V
V
& I2 =
R1
R2
R2
RR
1
I1 = × 1 2 I
⇒ I1 =
I
R1 R1 + R2
R1 + R2
I1 =
Similarly
⇒ I2 =
R1
I
R1 + R2
(1)
(2)
⇒
CDR
I=
other resistor
× total current
sum
CDR applies to only two resistors in parallel.
Figure 14
Example 5:
a) Use CDR to calculate I1 & I 2 .
b) Verify your results by checking KCL.
Ω
Ω
Figure 15
Solution:
a)
I1 =
2
×3
2+5
⇒
I2 =
5
×3
2+5
⇒
I1 =
6
A
7
I2 =
15
A
7
b)
KCL at node “a”
⇒
6 15
21
I s − I1 − I 2 = 3 − − = 3 − = 0
7 7
7
Is = 3A
(KCL verified)
a
I2
I1
Is = 3A
2Ω
5Ω
b
Figure 16
CDR
⇒
Higher current passes through the lower resistance.
Example 6:
Use CDR to calculate I1 , I 2 & I3 .
Ω
Ω
Ω
Ω
Figure 17
Solution:
6Ω & 12Ω (in parallel) ⇒
4Ω & 4Ω (in parallel)
⇒
6 ×12 72
=
= 4Ω
6 + 12 18
4 × 4 16
=
= 2Ω
4+4 8
∴ Req = 8 + 2 = 10Ω
I=
20
= 2A
10
4
× 2 = 1A
4+4
CDR
⇒
I4 =
CDR
⇒
I3 = −
CDR
⇒
I1 =
∴ I1 =
CDR
4
× 2 = −1A
4+4
(the minus sign is necessary in this case. Why?)
12
× I 4 (because I 4 is the total current through 6Ω & 12Ω )
6 + 12
12
2
×1 = A
18
3
⇒
I2 =
6
1
×1 = A
6 + 12
3
Check KCL at super node ⇒
2 1
I − I1 − I 2 + I 3 = 2 − − + (−1) = 1 − 1 = 0 (KCL verified)
3 3
Verify that the three parallel resistors 6Ω , 12Ω and 4Ω have the same voltage.
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Figure 18