SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY SNS COLLEGE OF ENGINEERING KURUMBAPALAYAM, COIMBATORE – 641 107 DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING INTERNAL ASSESSMENT EXAMINATION – 3 (28.10.2015) FIFTH SEMESTER ELECTRICAL AND ELECTRONICS ENGINEERING EE 6503 – POWER ELECTRONICS ANSWER KEY ACADEMIC YEAR 2015 – 2016 (ODD SEMESTER) Prepared By R.B.SELVAKUMAR ASSISTANT PROFESSOR / EEE SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY INTERNAL ASSESSMENT EXAMINATION-III (28.10.2015) FIFTH SEMESTER ELECTRICAL AND ELECTRONICS ENGINEERING EE 6503 – POWER ELECTRONICS ANSWER KEY PART A – (7 X 2 = 14 marks) 1. What is meant by Voltage Source Inverter? A VSI is one in which the dc source has small or negligible impedance. In other words a VSI has stiff dc voltage source at its input terminals. 2. Write the methods for reducing harmonics in inverters. a. Transformer Connection b. Single Pulse width modulation c. Multiple commutation in each cycle d. Stepped wave inverters 3. Define modulation index. It is defined as the ration between reference voltage to carrier voltage. MI = Vr / Vc 4. What is space vector modulation (SVM)? SVPWM is the most successful method to develop three phase sine wave voltage source inverter, in addition to control AC drives using vector control. SVM is becoming a popular form of pulse width modulation for voltage fed converter drives because of its superior harmonic quality and extended linear range of operation. 5. Define THD. THD is defined as the ratio of the rms value of harmonic content of the voltage waveform to the rms value of fundamental. THD indicates the closeness of the voltage waveform to the rms value of fundamental. 6. Write the advantages of resonant converters. a. Switching losses are less b. Less EMI c. Operating switching frequency is high d. Efficiency is high 7. State the applications of AC voltage controller. a. Domestic and industrial heating b. Lighting control c. Speed control of single phase and three phase ac motors d. Transformer tap changing 8. What is integral cycle control in AC voltage controllers? The thyristors are employed as switches to connect the load circuit to the source for a few cycles of the source voltage and disconnect it for another few cycles. This method of operation is called integral cycle control in AC voltage controllers. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY 9. What is a cycloconverter? Cycloconverter converts input power at one frequency to output power at a different frequency with one-stage conversion. Cycloconverter is also known as frequency changer. 10. What is a matrix converter? Matrix converter is capable of direct conversion from AC to AC by using bidirectional fully controlled switches. PART B – (3 X 12 = 36 marks) 11. (a) (i) Discuss the principle of operation of a three phase bridge inverter operating in 180 degree conduction mode with necessary circuit and waveforms. Assume the load is 3 phase star connected R-load. (16) Three Phase Voltage Source Inverters Three phase inverters are used for high power application such as ac motor device, induction heating and uninterruptable power supplies. A three phase inverter circuit changes DC input voltage to a three phase variable frequency, variable voltage output. The input dc voltage can be in the form a DC source or a rectified AC, voltage. A three phase bridge inverter can be constructed by combining three-single-phase half-bridge inverters. Figure 5.20 shows the basic circuit of three phase inverter. As shown, it consists of six power with six associated freewheeling diode. The switches are opened and closed periodically in the proper sequence to produce the desired output wave form. The rate of the switching represents output frequency of the inverter. Figure 5.20 Three phase full bridge inverter SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Basically there are two possible schemes of gating the device. In one scheme, each device conducts for 180° and in other scheme each device conducts for 120°. But in both scheme gating signal are applied and removed at 60° of the output voltage waveform. These modes of device conduction are described in following subsection. 180° Conduction Mode 180° Conduction Mode with Resistive Load In this control scheme each switch conducts for a period of 1800 or half cycle electrical. Switches are triggered in sequence of their number with an interval of 60°. At a time, three switches conducts. Thus two switches of same leg are prevented from conducting simultaneously. One complete cycle can be divided in to six modes, each of 60° intervals. The operation of the circuit can understood from the waveform shown in Figure 5.21 and the operation table 5.1. Switch pair in each leg, i.e, S1, S4, S3, S6, and S5, S2, are turned on with a time interval of 180°. It means that the switches conducts for 1800 and switch S4 conducts for next 180° of the cycle. Switches in the upper group.i.e. S1, S3, S5 conduct at an interval of 120°. Same is true for lower group of switches. On this basis of this gating scheme, table 5.1 is prepared. The following points can be noted from the waveform (Figure 5.21) and the operating table 5.1. (i) (ii) (iii) (iv) (v) (vi) (vii) Each switch conducts for a period of 180°. Switches are triggered in the sequence 1, 2, 3, 4, 5, and 6. Phase shift between triggering the two adjacent switches is 60°. From table, it is observed that in every step of 60°duration, only three switches are conducting-two from upper group and one from the lower group and vice-versa. The output voltage waveform (EAB, EBC, ECA) are quasi-waveforms with a peak value of Edc. The three-line voltages are mutually phase-shifted by 120°. Three phase voltages EAN, EBN, and ECN are six step waves, with step heights Edc/3 and 2/3Edc. Line voltage EAB is leading the phase voltage EAN by 30°. Table 5.1 Operation table S.NO. INTERVAL 1 2 3 4 5 6 I II III IV V VI DEVICE CONDUCTING 5, 6, 1 6, 1, 2 1, 2, 3 2,3, 4 3, 4, 5 4,5, 6 INCOMING DEVICE 1 2 3 4 5 6 OUTGOING DEVICE 4 5 6 1 2 3 SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 5.21 Voltage waveforms for 180° conduction SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY In Figure 5.21, phase voltages EAN, EBN, and ECN have also drawn for star connected resistive load. For a star connected load, the line to neutral voltage must be determined to find the line or phase current. There are three modes of operation in a half cycle and the equivalent circuits are shown in Figure 5.22 for a star connected load. From the Figure 5.21 and 5.22, it is observed that (i) During interval I for 0≤ωt≤π/3 Req = RB + (RA||Rc) = R+R/2 = 3R/2 Current, I1 = 2Edc / 3R EAN = ECN = Edc /3 EBN = -2 Edc /3 Figure 5.22 Equivalent circuits for star connected resistive load (ii) Current, (i) Current, During interval II for π/3≤ωt≤2π/3 Req = R+R/2 = 3R/2 I2 = 2Edc / 3R EAN = 2Edc /3 EBN = ECN = - Edc /3 During interval III, for 2π/3≤ωt≤π Req = R+R/2 = 3R/2 I3 = 2Edc / 3R EAN = EBN = 2Edc /3 ECN = -2 Edc /3 The line voltage EAB = EBN - ECN is obtained by reversing EBN and adding it to EAN as shown in Figure 5.21. Similarly the line voltage, EBC = EBN - ECN and ECA = ECN - EAN are plotted SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY in Figure 5.21. It can be observed from Figure 5.21 that phase voltages have six step per cycle and line voltage have one positive pulse per cycle. The phase as well as line voltages are out of phase by 120°. The instantaneous line-line voltage, EAB, in Figure 5.21, can be expressed in Fourier series, recognizing that EAB is shifted by π/6 and even harmonics are zero For n = 3, 9, 15,……., cos = ∑∞ , , ,… + (5.48) = ∑∞ , , ,… − (5.49) = ∑∞ , , ,… − (5.50) =0 The RMS value of line to neutral voltage can be found from the line voltage, = √ = √ = 0.4714 (5.51) 180° conduction mode with RL-Load From the above discussion, it becomes clear that with resistive load, the diodes across the switch have no functions. If the load is inductive then the current in each arm of the load will be delayed to its voltage as shown in the Figure 5.23. When switch s1 is triggered, s4 is turned off but, because the load current cannot reverse, the only path for this current is through diode D 1 (see. Figure 5.20).hence, the load phase is connected to the positive end of the DC source but, until the load current reverses at t 1, switch s1 will not take up conduction, similar arguments apply in the reverse half cycle at instant t2. The line current IL for RL load is given by = ∑∞ Where, , , ,… √ . ( ) sin ( − ) (5.52) = tan For a delta connected load, the phase currents can be obtained directly from line to line voltages. Once the phase currents are known, the line currents can be determined. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 5.23 Waveforms for 180° firing with an inductive (RL) load 11 (b) (i) Briefly discuss the different types of PWM schemes available for voltage control for an inverter. (10) Pulse-width Modulation Control The most efficient method of controlling the output voltage is to incorporate Pulse Width Modulation (PWM) control within the inverters. In this method, a fixed d.c. input voltage is supplied to the inverter and a controlled a.c. output voltage is obtained by adjusting the on-andoff periods of the inverter devices. The PWM control has the following advantages: (i) (ii) The output voltage control can be obtained without any additional components. With this type of control, lower order harmonics can be eliminated or minimized along with its output voltage control. The filtering requirements are minimized as higher order harmonics can be filtered easily. The main drawback of this method is that the SCRs used in this method must have very low turn-on and turn-off times (inverter-grade SCRs), therefore, they are very expensive. 5.3.3 Pulse Width Modulation (PWM) Techniques The commonly used PWM control techniques are: (a) Single-pulse width modulation (SPWM) (b) Multiple-pulse width modulation (MPWM) SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY (c) Sinusoidal pulse width modulation (sin PWM) (a) Single-pulse Width Modulation In single-pulse width modulation control, there is only one pulse per half-cycle and the width of the pulse is varied to control the inverter output voltage. The generation of gating signals and output voltage of single-phase full bridge inverter is shown in Figure 5.4. As shown in Figure 5.4, the gating signals are generated by comparing a rectangular reference signal of amplitude, ER, with a. triangular carrier wave of amplitude EC. The fundamental frequency of output voltage is &term by the frequency of the reference signal. The pulse-width, P, can be varied from 0° to 180° by varying ER from 0 to E. The ratio of ER to EC, is the control variable and is defined as the amplitude modulation index. The amplitude modulation index or simply modulation index is = (5.2) = ∑∞ + ∑∞ sin , , ,… , , sin (5.3) where = 2 ( sin )= 2 sin ( )= 4 5 2 And = Thus, ∫ = ∑ , , … cos ( )=0 sin (5.4) (5.5) When P=π radians, then the fundamental component of output voltage has the peak value of, = (5.6) SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 5.4 Single pulse width modulation The RMS output voltage can be found from = ( ∫( )/ )/ ( ) / = . (5.7) The peak value of the nth harmonics components from Eq. (5.5) is given by = (5.8) = (5.9) From Eq. (5.6) and (5.8), The ratio as given by Eq. (5.9) is plotted in Figure 5.5 for n = 1, n = 3, n = 5, 7 for different pulse widths. From these curves it may be observed that when the fundamental component is reduced to nearly 0.33, the amplitude of the third harmonic is also 0.33. When fundamental component is reduced to about 0.143, all the three harmonics (3, 5, 7) become almost equal to the fundamental. This shows that in this type of voltage control scheme, as great deal of harmonic content is introduced in the output voltage, particularly at low output voltage levels. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 5.5 Harmonic content in SPWM (b) Multiple Pulse-width Modulation In this method of pulse-width modulation, the harmonic content can be reduced using several pulses in each half-cycle of output voltage. By comparing a reference signal with a triangular carrier wave, the gating signals are generated for turning-on and turning-off of a thyristor, as shown in Figure 5.6(a). The carrier frequency, fc, determines the number of pulses per half-cycle, m, whereas the frequency of reference signal sets the output frequency, fo. The modulation index controls the output voltage. This type of modulation is also known as symmetrical pulse width modulation (SPWM). The number of pulses NP, per half-cycle is found from the expression = Where, mf = = (5.10) is the frequency modulation ratio. The variation of modulation index (M) from 0 to 1 varies the pulse width from 0 to π/NP and the output voltage from 0 to Edc. For SPWM, the output voltage for single phase bridge inverters is shown in Figure 5.6(b). If P is the width of each pulse, the RMS output voltage can be obtained from the following expression: ( ( ) = ∫ ( )/ )/ / ( ) = . (5.11) The general expression for various harmonics in the output voltage is obtained by deriving an expression for a general pair of pulses, such that the positive pulse of duration P SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY starts at ωt = a and the negative one of the same width starts at ωt = r + a. This is shown in Fig. 9.15(b). The effects of all pulses can be combined together to obtain the effective output voltage. Figure 5.6 Multiple pulse width modulation With this method, since voltage control is achieved with a simultaneous reduction of lower order harmonics, this scheme is comparatively advantageous over single-pulse modulation. However, due to larger number of pulses per half cycle, frequent turning-on and turning-off of thyristors is required which increases the switching losses. Also, for this scheme inverter-grade thyristors are required which are costly. (c) Sinusoidal Pulse Width Modulation In this method of modulation, several pulses per half-cycle are used as in the case of multiple pulse width modulation. Instead of maintaining the width of all pulses the same as in the case of multiple-pulse modulation, the width of each pulse is varied proportional to the amplitude of a sine wave evaluated at the centre of the same pulse. By comparing a sinusoidal reference signal with a triangular carrier wave of frequency, fc, the gating signals are generated, as shown in Figure 5.7(a). The frequency of reference signal, fr, determine the inverter output frequency, fo, and its peak amplitude, Er, controls the modulation index, M, and then in turn the RMS output voltage, EL. The number of pulses per half cycle depends on the carrier frequency. Within the constraint that two thyristors of the same arm (T1, T4) cannot conduct at the same time, the instantaneous output voltage is shown in Figure 5.7(a). The same gating signals can be generated using unidirectional triangular carrier-wave as shown in Figure 5.7(b). By varying the modulation index M, the RMS output voltage can be varied. It can be observed that the area of each pulse corresponds approximately to the area under the sine wave SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY between the adjacent midpoints of OFF periods on the gating signals. If Pm is the width of the mth pulse, Eq. (5.11) can be extended to find the rms output voltage = ∑ / (5.12) Harmonic analysis of the output modulated voltage wave reveals that SPWM has the following important features: For modulation index less than one, the largest harmonic amplitudes in -the output voltage are associated with harmonics of order fc/fr ± 1 or 2Np, ± 1, or. 2Np ± 1 where Np is the number of pulses per half cycle. Thus, by increasing the number of pulses per half cycle, the order of dominant harmonic frequency can be raised, which can then be filtered out easily. For NP= 5, harmonics of the order of 9 and 11 become significant in the output voltage. It may be noted that the highest order of significant harmonic of modulated voltage-wave is centered around the carrier frequency, fc. For modulation index greater than one, lower order harmonics appear since for modulation index greater than one, pulse width is no longer a sinusoidal function of the angular position of the pulse. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 5.7 Sinusoidal pulse width modulation SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY 11 (b) (ii) The single phase full bridge inverter with resistive load R=2.5ohm and dc input voltage is 50V.Determine a) RMS output voltage at the fundamental frequency b) output power and c) the peak thyristor current. (6) a) The RMS value of fundamental component = 45V b) The output Power = 1000 W c) The peak thyristor current = 20A 12 (a) (i) Describe the operation of single phase full bridge inverter with R, RL load. Derive the performance parameters. (8) Single Phase Full-Bridge Inverter Figure 5.11 shows the power diagram of the single phase bridge inverter. The inverter uses two pairs of controlled switches (S1, S2 and S3, S4) and two parts of diodes (D1, D2, and D3 D4). The device of one pair operates simultaneously. In order to develop a positive voltage (+Eo) across load, switch s1 and s2 are simultaneously, where as to have negative voltage (-Eo) across the load, we need to turn on the switches S3 and S4. Diodes D1, D2, D3 and D4 are known as the feedback diodes. Figure 5.11 Single phase full bridge inverter Operation with resistive load Voltage and current waveform with resistive load are shown in Figure 5.12. The bridge inverter operates in two modes in one-cycle of the output. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 5.12 Voltage and current waveforms Mode-I : (0<t<T/2): In this mode, switches S1 and S2 conducts simultaneously. The load voltage +Edc and load current flows P to Q. the equivalent circuit for mode-I is shown in Figure 5.13(a). At t=T/2,S1, and S2 are turn off and S3 and S4 are turned on. Mode-II : (T/2<t<T): At t=T/2,switches s3 and s4 are turned on and s1 and s2 are turnoff .the load voltage is –Edc and load current flows from Q and P. The equivalent circuit for mode-II is shown in Figure 5.13(b).At t=T, S3 and S4 are turned off and S1 and S2 are turned on again. As the load is resistive, it does not store any energy. Therefore, feedback diodes are not effective here. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 5.13 Equivalent circuit Circuit analysis The analysis of the full-bridge inverter with resistive load can be carried out on similar lines of half bridge inverter with resistive load. Hence all equivalent of half bridge are valid with Edc/2 replaced by Edc. (i) RMS output voltage, (ii)Fourier series, Eorms = Edc ( (5.19) ∑∞ ) (iii)Fundamental output voltage, Eo(fund)= (iv) nth harmonic voltage, Eo(n) = √ sin ( , , ,.. . (5.20) (5.21) )) ( ) (5.22) (v)Transistor (switch) ratings: > Edc, IT(av) = ( ) = √ , (5.23) ( ) = (5.24) Operation with RL load Voltage and current waveforms for single phase bridge inverter with RL load are shown in Figure 5.14. The operation of the circuit is explained in four modes. Mode I : (t1<t<t2): at instant t1,the switch S1 and S2 are turned ON. Switched are assumed to be ideal switches. Point P gets connected to positive point of d.c. source Edc through S1 and Q gets connected to negative point of input supply. The output voltage e0=+Edc . The load current start increasing exponentially due to the inductive nature of the load. The instantaneous current through S1 and S2 is equal to the instantaneous load current. During this interval, energy is stored in inductive load. Mode II : (t2<t<t3): both the switches Q1 and Q2 are turned off at instant t2. Due to the inductive nature of the load, the load current does not reduce to zero instantaneous. There is a self induced voltage across the load which maintains the flow of current in the same direction. the polarity of this voltage is exactly opposite to that in mode1,the output voltage becomes -Edc ,but the load current continuous to flow in the same direction, through D3 and D4 as shown in fig. thus in this mode, the energy stored in inductance is returned back to the source. The load current decreases exponentially and goes to zero at instant t 3 when all the stored energy in the load is returned back to supply.D3 and D4 are turned off at t3. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 5.14 Voltage and current waveforms Mode III : (t3<t<t4): switches S3 and S4 are turned on simultaneously at instant t3.load voltage remains negative (-Edc) but the direction of load current will reverse. The current increases exponentially in the other direction and the load again stores the energy. Mode IV : (t0<t<t1): switches S3 and S4 are turned off at instant to (or t4). The load inductance tries to maintain the load current in the same direction by inducing the positive load voltage. This will forward bias the diodes D1 and D2. The load energy is returned back to the input dc supply. The load voltage becomes eo=+Edc, but the load current remains negative and decreases exponentially towards 0. At t1 (or t5), the load current goes to zero and switches S1 and S2 can be turned on again. The conduction period with a very highly inductive load, will be T/4 or 900 for all the switches as well as diodes. The conduction period of switches will increases towards T/2 or 1800 with increases in the load power factor. 12 (a) (ii) Enumerate the harmonics reduction methods and explain any two methods.(8) The power electronics equipments, such as rectifier, inverters and choppers have switching devices and their operation produces current and voltage harmonics into the system from which they are working. These harmonics affect the operation of other equipments connected to the same system through conduction or by radio interference. The harmonics present in the inverter system lead to the following disadvantages: (i) Harmonic currents will lead to excessive heating in the induction motors connected with the thyristor system. This will reduce the load carrying capacity of the motor. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY (ii) If the control and regulating circuits are not properly shielded, harmonics from power side can affect their operation and malfunctioning can result. (iii) On critical loads, torque pulsation produced by the harmonic current can be harmful. (iv) Harmonic currents cause losses in the a.c. system and can even sometime produce resonance in the system. Under such resonant conditions, the metering and instrumentation may also be affected because of the distortion, etc. These effects can be minimized by reducing the harmonic content. There are various methods available to reduce the harmonic content. The reduction of harmonic contents or the improvement in wave shape can be done by following methods: (i) Single-pulse width modulation (ii) Transformer connections (iii) Multiple commutation in each half-cycle (iv) Stepped wave-inverters Normally, a single-phase bridge inverter produces a square wave. This square-waveform contains 33 per cent third harmonic, 20 percent fifth harmonic and 14 percent seventh harmonic. In some applications, harmonics at the output should be less than 5 per cent. It is customary to reduce the lower order harmonics by some technique and use filter for higher order harmonics. This procedure not only decreases the cost of the filter but also improves the transient response very much. Harmonics Reduction by Single-pulse Width Modulation In the case of single-pulse width modulation, the width of the pulse is adjusted to reduce the harmonic. In general, the RMS value of the amplitude of harmonic voltage of a single pulse modulated wave is given by = √ = √ (5.56) By this method, only one harmonic can be eliminated at a time. Harmonic Reduction by Transformer Connections To have a net output voltage with reduced harmonic content, output voltage from two or more inverters can be combined by means of transformers. The essential condition of this scheme is that the output voltage waveforms from the inverters must be similar but phase shifted from each other. Figure 5.26(a) shows a scheme for connecting two inverters and two transformers for harmonic elimination. Their output voltages, EL1, from inverter 1 and EL2, from inverter 2, are shown in Figure 5.26(b). As shown in this figure, waveform EL2 is taken to have a phase shift of π/3 radians with respect to EL1 waveform. By adding the vertical ordinates of EL1, and EL2, resultant output voltage EL is obtained. In this scheme, it is assumed that the transformers have a turns ratio of 1:1. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 5.26 Harmonic reduction by transformer connection It is observed that with the phase shifting of π/3 and combining voltages by transformer connection, it is possible to eliminate third harmonics. Along with third harmonics, the multiples of third harmonics, such as 9, 12, are also eliminated. It should be noted that the resultant fundamental component is not twice the individual voltage, but it is √3/2 (=0.866) of that for individual output voltage and the effective output has been reduced by (1 — 0.866) = 13.4%. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY The main disadvantage of this method of harmonic reduction is the need for more number of inverters and transformers of similar ratings. Harmonic Reduction by Multiple Commutations in each half cycle This method is explained with respect to a single phase inverter. Normally, there is one commutation per half cycle at the end of each half cycle and this produces a square wave output. Instead of having commutation at the end of half cycle, some more commutations can be created in the half cycle and a waveform as shown in Figure 5.27 can be produced. By properly selecting the values of α1 and α2 any two unwanted lower order harmonics can be eliminated from the waveform, here, waveforms are drawn for a single phase full bridge inverter, but then the amplitude of voltage wave would be Edc. It employs four extra commutation per cycle instead of one. Figure 5.27 Harmonic reduction using four extra commutation per cycle Similarly, any two harmonics can be eliminated by calculating the corresponding values of α1 and α2. This method produces a fundamental voltage of 83.9%. Thus, with this method of harmonic reduction, inverter is derated 16.1%. Another disadvantage of this method is that, there are four extra commutation per cycle and this leads to more switching losses per cycle which decreases efficiency of operation. Harmonic Reduction using stepped wave inverter This method may be called as wave stepping, in which pulses of different widths and heights are added to produce a resultant stepped wave with reduced harmonic content. There are two inverters. Inverter-1 uses two-level modulation technique and Inverter-2 uses three-level modulation. The output waveforms of two inverters are super imposed to get resultant output voltage waveform. Three level modulation helps to achieve required wave stepping of resultant output voltage waveform. 12 (b) (i) A star connected load of 15Ω / phase is fed from 420V dc source through a three phase bridge inverter. Assume 120° mode of conduction. Determine a) RMS value of load current b) RMS value and average value of thyristor currents c) Power delivered to the load (10) SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY a) The RMS load current = 16.33A b) The Thyristor Rating = 11.5 A c) Power Delivered to load = 12kW 12 (b) (ii) Write short notes on SVPWM. (6) 13 (a) (i) Explain the operation of single phase half bridge inverter with aid of relevant waveforms and derive the expression for instantaneous output voltage. (8) Single Phase Half-Bridge Inverter Figure 5.8 shows the basic configuration of single- phase half bridge inverter. Switches S1 and S2 are gate- commutated devices such as power BJTs, MOSFETs, GTO, IGBT, MCT, etc. When closed, these switches conduct and current flows in the direction of arrow. The operation of this inverter for different types of load is explained in the following sections. Figure 5.8 Half-Bridge inverter Operation with Resistive Load The operation of the circuit can be divided into two periods: (i) (ii) Period-1, where S1 is conducting from 0 ≤ 1 ≤ T/2 and Period-2, where S2 is conducting from T/2 ≤ 1 ≤ T, where T=1/f, and f is the frequency of the output voltage waveform.fig……shows the waveforms for the output voltage and switch current for a resistive load. Switch S1 is closed for half-time period (T/2) of the desired AC output. It connects point p of the dc source to point A. and the output voltage eo becomes equal to +Edc/2. At T=T/2, gating signal is removed from S1 and it turns off. For the next half-time period, (T/2≤t≤T),the gating signal to S2.it connects point N of the dc source to point A and the voltage reversals, thus, by closing S1 and S2 alternately, for half-time periods a square-wave ac voltage is obtained at the output. With resistive load, wave shape of load current is identical to that of output voltage. Simply by controlling the time periods of the gate-drive signals, the frequency can be varied. Here diode d1 and d2 SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY do not play any role. The voltage across the switch when it is off is Edc. Gating circuit should be designed such that switches s1 and S2 should not turn on at the same time. Figure 5.9 Voltage and current waveforms Circui analysis (i) RMS Output voltage is given by ( ) =∫ ( ) = ( ) ( ( ∫ ) ) ( )= ∫ / ( ) ( ) due to quarter-wave symmetry = ∫ 1/2 d = Edc/2 The rms value of a square-wave is equal to its peak value. (ii) Instantaneous Output Voltage The Fourier-series can be found out by using the following equation (5.12) SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY ) = ∑∞ ( = Where, sin ( , , + +∅ ) , and ∅ = tan = ∫ ( ) cos( ) ( )=0 = ∫ ( ) sin( ) ( )=0 Due to square wave symmetry, bn=0, for all even n. = ∫ / = ( ( + ) = ∑∞ ) sin( ) ( ), for all odd ‘n’ , and ∅ = tan sin( , , =0 ) (5.13) =0, for n = 2, 4,……(even values of n) The nth harmonics components are given by ( )= √ = .√ = √ . for n = 1,3,5,…. (5.14) RMS value of fundamental component is obtained by substituting n=1 in Eq. (5.14), ( ) = √ = 0.45 (5.15) (iii) Switch (Device)Voltage And Current Rating From Figure 5.9, VECO(transistor) > 2 Edc/2 > Edc The current waveform for the switch is a square wave with a peak vale of Edc/2 = ∫ = and = .∫ ( ITpeak = Edc/2R ) . (5.16) = √ (5.17) (5.18) Operation with RL load With an inductive load, the output voltage waveform is similar to that with a resistive-load, however the load-current cannot change immediately with the output voltage. The operation of halfbridge inverter with R-L load is divided into four distinct mode. Voltage and current waveforms are shown in Figure 5.10, D1 and D1 are known as feedback diodes. Mode I : (t1<t<t2): S1 is turned-on at instant t1 the load voltage is equal to +Edc/2 and the positive load current increases gradually. At instant t2, the load-current reaches the peak value switch s1 is turned-off at SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY this instant. Due to same polarity of load voltage and load current, the energy is stored by the load, shown in Figure 5.11(a) Mode II : (t2<t<t3): Due to inductive load, load current direction will be maintained even after s1 is turned off. The self induced voltage in the load will be negative the load current flows through lower half of the supply and D2 as shown in Figure 5.11(b). In this mode, stored energy in load is fed back to the lower half of the source AND the load voltage is clamped to –Edc/2. Mode III : (t3<t<t4): At instant t3,the load current goes to zero, indicating that a1, the stored energy, has been returned back to the lower half of supply, At instant t1,s2 is turned on. This will produce a negative load voltage e0= -Edc/2. Load current reaches negative peak at the end of this interval, shown in Figure 5.11(c). Figure 5.10 Voltage and current waveforms with RL load Mode IV : (t0<t<t1): Switch s2 is turn off at instant t4.the self induced voltage in the inductive load will maintain load current remain. The load voltage changes its polarity to become positive negative and the stored energy in the load is returned back to the upper half of the dc source, shown in Figure 5.11(d). At t5, the load current goes to 0 and S1 can be turned-on again. This cycle of operation repeats. Cross Conduction or Shoot through Fault In the half-bridge inverter circuit, each switch conducts for a period of T/2 seconds. At any particular instant, one switch is turned-on and the other is turned-off. However the outgoing switch does not turn-off instantaneously due to its finite turn-off delay. Due to this, both (incoming and outgoing) switches conducts simultaneously for a short-time. This is known as cross-conduction or shoot-through fault. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY When both switches conduct simultaneously, the input dc supply is short-circuited and with this switches get damaged. Cross conduction can be avoided by allowing the outgoing switch to turn-off completely first and then applying gate-drive to the incoming device. A deadband or delay is introduced between the trailing edge of the base-drive of outgoing device and the leading edge of the base-drive of incoming device. Therefore, during the dead-band interval, no device receives base-drive. Hence, the dead-band should be longer than the turn-off time of the power devices used in the inverter circuit. 13 (a) (ii) Draw the circuit diagram of capacitor commutated current source inverter and explain its operation with relevant waveforms. (8) Single phase capacitor commutated current source inverters with R load Figure 5.30 shows a Single phase current source bridge inverter circuit with R load. Capacitor C in parallel with the load is used for storing the charge for force commutating the SCRs. ThyristorsT1, T2, T3 and T4 from the power bridge. These SCRs are triggered in pairs; T1, T2 by signals Ig1,Ig2 and T3,T4 by Ig3,Ig4,as shown in Figure 5.31. Figure 5.30 Capacitor commutated Current source inverter In the Figure 5.30 before t=0, let the capacitor voltage be Vc=-E1, i.e. capacitor has right plate positive and left plate negative. At t=0, thyristors T1 and T2 are trigged, and when T1 and T2 become turned on, capacitor applies reverse voltage across the previously conducting thyristors T3, T4 and hence turn them off. The source current I now flow through T1, parallel combination of R and C, and through T2. From 0 to T/2, IT2=I, output current Iac=I, capacitor voltage Vc change from –E1 to +E1 through the charging of C by current Ic. Note that,here load voltage EL=Vc. Thus, the waveform of IL=EL/R=Vc /R has the same nature as that of Vc,as shown in fig. when T3,T4 are gated at t=T/2,Vc=E1 reverse biases T1,T2;these are therefore turned off immediately. The source current now flows through T3, parallel combination of R, C and T4. From instant T/2 to T, IT3=IT4=I, but Iac=-I. the variation of a.c. current Iac is shown in fig. the current Iac is a square wave of amplitude I. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY 13 (b) (i) With necessary circuit and waveform, explain the single phase full wave AC voltage controller. (8) Single Phase AC Voltage Controller The basic power circuit of a single-phase ac–ac voltage controller, as shown in Figure 6.1(a), comprises a pair of SCRs connected back-to-back (also known as inverse-parallel or antiparallel) between the ac supply and the load. This connection provides a bidirectional full-wave symmetrical control, and the SCR pair can be replaced by a triac (Figure 6.1(b)) for low-power applications. Alternate arrangements are shown in Figure 6.1(c) with two diodes and two SCRs to provide a common cathode connection for simplifying the gating circuit without requiring isolation and in Figure 6.1(d) with one SCR and four diodes to reduce the device cost but with increased device conduction loss. An SCR and diode combination known as thyrode controller, as shown in Figure 6.1(e), provides a unidirectional half-wave asymmetrical voltage control with device economy, but introduces dc component and more harmonics, and thus it is not so practical to use except for very low-power-heating load. With phase control, the switches conduct the load current for a chosen period of each input cycle of voltage and with on/off control, the switches connect the load either for a few cycles of input voltage and disconnect it for the next few cycles (integral cycle control) or the switches are turned on and off several times within alternate half cycles of input voltage (ac chopper or pulse width modulated [PWM] ac voltage controller). SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 6.1 Single phase AC voltage controllers For a full-wave symmetrical phase control, the SCRs T1 and T2 in Fig6.1(a) are gated at α and π+α, respectively, from the zero crossing of the input voltage; by varying α, the power flow to the load is controlled through voltage control in alternate half cycles. As long as one SCR is carrying current, the other SCR remains reverse-biased by the voltage drop across the conducting SCR. The principle of operation in each half cycle is similar to that of the controlled half-wave rectifier, and one can use the same approach for analysis of the circuit. Operation with R-load Figure 6.2 shows the typical voltage and current waveforms for the single-phase bidirectional phase-controlled ac voltage controller of Fig. 6.1(a) with a resistive load. The output voltage and current waveforms have half-wave symmetry and so no dc component. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 6.2 Waveforms for single phase AC voltage controller with R load Operation with RL Load Figure 6.3 shows the voltage and current waveforms for the controller in Fig. 18.1a with RL load. Due to the inductance, the current carried by the SCR T1 may not fall to zero at ωt = π when the input voltage goes negative and may continue till ωt = β, the extinction angle, as shown. The conduction angle, θ = β – α of the SCR depends on the firing delay angle α and the load impedance angle φ. Figure 6.3 Waveforms for single phase AC voltage controller with RL load 13 (b) (ii) Describe the significance of multistage sequence control. (8) SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY 14 (a) (i) A single-phase full wave AC voltage controller has an input voltage of 230 V, 50Hz and it is feeding a resistive load of 10 ohms. If firing angle of thyristors is 110 degree, find the output RMS voltage, input power factor and average current of thyristor. (16) a) The RMSoutput voltage = 134.08V b) Input Power Factor = 0.582 (lag) c) Average Thyristor current = 4.366A 14 (b) Write short note on the following: (i) 3-phase to 1-phase cycloconverter. (8) Figure 6.11(a) shows the schematic diagram of a three-phase half-wave (three-pulse) cycloconverter feeding a single-phase load and Figure 6.11(b), the configuration of a three-phase half wave (three-pulse) cycloconverter feeding a three-phase load. The basic process of a threephase cycloconversion is illustrated in Figure 6.11(c) at 15 Hz, 0.6 power factor lagging load from a 50Hz supply. As the firing angle α is cycled from zero at “a” to 180° at “j,” half a cycle of output frequency is produced (the gating circuit is to be suitably designed to introduce this oscillation of the firing angle). For this load, it can be seen that although the mean output voltage reverses at X, the mean output current (assumed sinusoidal) remains positive until Y. During XY, the SCRs A, B, and C in P-converter are “inverting.” A similar period exists at the end of the negative half cycle of the output voltage when D, E, and F SCRs in N-converter are “inverting.” Thus, the operation of the converter follows in the order of “rectification” and “inversion” in a cyclic manner, the relative durations are dependent on load power factor. The output frequency is that of the firing angle oscillation about a quiescent point of 90° (condition SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY when the mean output voltage, given by Vo =Vdo cos α, is zero). For obtaining the positive half cycle of the voltage, firing angle α is varied from 90° to 0° and then to 90° and for the negative half cycle, from 90° to 180° and back to 90°. Variation of α within the limits of 180° automatically provides for “natural” line commutation of the SCRs. It is shown that a complete cycle of low-frequency output voltage is fabricated from the segments of the three phase input voltage by using the phase-controlled converters. The P-converter or N-converter SCRs receive firing pulses, which are timed such that each converter delivers the same mean output voltage. This is achieved, as in the case of single phase cycloconverter or the dual converter, by maintaining the firing angle constraints of the two groups as αP = 180° − αN. However, the instantaneous voltages of two converters are not identical and large circulating current may result unless limited by inter-group reactor as shown (circulating-current cycloconverter) or completely suppressed by removing the gate pulses from the non-conducting converter by an intergroup blanking logic (circulating-current-free cycloconverter). Figure 6.11 (a) Three-phase half-wave (three-pulse) cycloconverter supplying a single-phase load, (b) three-pulse cycloconverter supplying a threep hase load and (c) output voltage waveform for one phase of a three-pulse cycloconverter operating at 15 Hz from a 50-Hz supply and 0.6-power factor lagging load. Circulating-Current Mode Operation SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 6.12 shows typical waveforms of a three-pulse cycloconverter operating with circulating current. Each converter conducts continuously with rectifying and inverting modes as shown, and the load is supplied with an average voltage of two converters reducing some of the ripple in the process, the intergroup reactor behaving as a potential divider. The reactor limits the circulating current; the value of its inductance to the flow of load current is one-fourth of its value to the flow of circulating current as the inductance is proportional to the square of the number of turns. The fundamental wave produced by both the converters is the same. The reactor voltage is the instantaneous difference between the converter voltages, and the time integral of this voltage divided by the inductance (assuming negligible circuit resistance) is the circulating current. For a three-pulse cycloconverter, it can be observed that this current reaches its peak when αP = 60° and αN = 120°. Figure 6.12 Waveforms of a three pulse cycloconverter with circulating current Circulating Current-free Mode Operation Figure 6.13 shows the typical waveforms for a three-pulse cycloconverter operating in this mode with RL load assuming continuous current operation. Depending on the load current direction, only one converter operates at a time and the load voltage is the same as the output voltage of the conducting converter. As explained earlier in the case of single-phase cycloconverter, there is a possibility of short circuit of the supply voltages at the cross-over points of the converter unless taken care of in the control circuit. The waveforms drawn also neglect the effect of overlap due to the ac supply inductance. A reduction in the output voltage is possible by retarding the firing angle gradually at the points a, b, c, d, e in Figure 6.13. (This can be easily implemented by reducing the magnitude of the reference voltage in the control circuit). SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY The circulating current is completely suppressed by blocking all the SCRs in the converter, which is not delivering the load current. A current sensor is incorporated in each output phase of the cycloconverter, which detects the direction of the output current and feeds an appropriate signal to the control circuit to inhibit or blank the gating pulses to the non conducting converter in the same way as in the case of a dual converter for dc drives. The circulating current-free operation improves the efficiency and the displacement factor of the cycloconverter and also increases the maximum usable output frequency. The load voltage transfers smoothly from one converter to the other. Figure 6.13 Waveforms of a three pulse cycloconverter with circulating current free mode (ii) Matrix Converter. (8) The matrix converter has several advantages over traditional rectifier-inverter type power frequency converters. It provides sinusoidal input and output waveforms, with minimal higher order harmonics and no subharmonics; it has inherent bi-directional energy flow capability; the input power factor can be fully controlled. Last but not least, it has minimal energy storage requirements, which allows to get rid of bulky and lifetime- limited energy-storing capacitors. But the matrix converter has also some disadvantages. First of all it has a maximum inputoutput voltage transfer ratio limited to 87 % for sinusoidal input and output waveforms. It requires more semiconductor devices than a conventional AC-AC indirect power frequency converter, since no monolithic bi-directional switches exist and consequently discrete unidirectional devices, variously arranged, have to be used for each bi-directional switch. Finally, it is particularly sensitive to the disturbances of the input voltage system. The matrix converter consists of 9 bi-directional switches that allow any output phase to be connected to any input phase. The circuit scheme is shown in Figure 6.17. The input terminals of the converter are connected to a three phase voltage-fed system, usually the grid, while the output terminal are connected to a three phase current- fed system, like an induction motor might be. The capacitive filter on the voltage- fed side and the inductive filter on the current- fed side SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY represented in the scheme of Figure 6.17 are intrinsically necessary. Their size is inversely proportional to the matrix converter switching frequency. Figure 6.17 Circuit scheme of three phase to three phase matrix converter With nine bi-directional switches the matrix converter can theoretically assume 512 (29) different switching states combinations. But not all of them can be usefully employed. Regardless to the control method used, the choice of the matrix converter switching states combinations (from now on simply matrix converter configurations) to be used must comply with two basic rules. Taking into account that the converter is supplied by a voltage source and usually feeds an inductive load, the input phases should never be short-circuited and the output currents should not be interrupted. From a practical point of view these rules imply that one and only one bi-directional switch per output phase must be switched on at any instant. By this constraint, in a three phase to three phase matrix converter 27 are the permitted switching combinations. Since no energy storage components are present between the input and output side of the matrix converter, the output voltages have to be generated directly from the input voltages. Each output voltage waveform is synthesized by sequential piecewise sampling of the input voltage waveforms. The sampling rate has to be set much higher than both input and output frequencies, and the duration of each sample is controlled in such a way that the average value of the output waveform within each sample period tracks the desired output waveform. As consequence of the input-output direct connection, at any instant, the output voltages have to fit within the enveloping curve of the input voltage system. Under this constraint, the maximum output voltage the matrix converter can generate without entering the over- modulation range is equal to v3/2 of the maximum input voltage: this is an intrinsic limit of matrix converter and it holds for any control law. Entering in the over- modulation range, thus accepting a certain amount of distortion in the output voltages and input currents, it is possible to reach higher voltage transfer ratio. In Figure 6.18 the output voltage waveform of a matrix converter is shown and compared to the output waveform of a traditional voltage source inverter (VSI). The output voltage of a VSI can assume only two discrete fixed potential values, those of the positive and negative DC-bus. In the case of the matrix converter the output voltages can assume either input voltage a, b or c and their value is not time-invariant: the effect is a reduction of the switching harmonics. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY (a) (b) Figure 6.18 Output voltage waveform of (a) Voltage source inverter, (b) matrix converter 15 (a) (i) Describe the basic principle of operation of single phase to single phase bridge type step-down cycloconverter. Assume both discontinuous and continuous conduction and draw the load current and load voltage waveforms for both the cases. Mark the conduction of various thyristors. (16) Single Phase Cycloconverters Though rarely used, the operation of a single-phase to singlephase cycloconverter is useful to demonstrate the basic principle involved. Figure 6.7(a) shows the power circuit of a single-phase bridge type of cycloconverter, which has the same arrangement as that of a singlephase dual converter. The firing angles of the individual two-pulse two-quadrant bridge converters are continuously modulated here, so that each ideally produces the same fundamental ac voltage at its output terminals as marked in the simplified equivalent circuit in Figure 6.7(b). Because of the unidirectional current carrying property of the individual converters, it is inherent that the positive half cycle of the current is carried by the P-converter and the negative half cycle of the current by the N-converter regardless of the phase of the current with respect to the voltage. This means that for a reactive load, each converter operates in both rectifying and inverting region during the period of the associated half cycle of the low-frequency output current. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 6.7 (a) Power circuit for a single phase bridge cycloconverter, (b) simplified equivalent circuit of a cycloconverter Operation with R-Load Figure 18.17 shows the input and output voltage waveforms with a pure R-load for a 50– 16 Hz cycloconverter. The P- and N-converters operate for alternate To/2 periods. The output frequency (1/To) can be varied by varying To and the voltage magnitude by varying the firing angle α of the SCRs. As shown in the figure, three cycles of the ac input wave are combined to produce one cycle of the output frequency to reduce the supply frequency to one-third across the load. If αP is the firing angle of the P-converter, the firing angle of the N-converter αN is π − αP and the average voltage of the P-converter is equal and opposite to that of the N-converter. The inspection of Figure 6.8 shows that the waveform with α remaining fixed in each half cycle generates a square wave having a large low-order harmonic content. A near approximation to sine wave can be synthesized by a phase modulation of the firing angles as shown in Figure 6.9 for a 50–10Hz cycloconverter. The harmonics in the load voltage waveform are less compared to earlier waveform. The supply current, however, contains a subharmonic at the output frequency for this case as shown. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 6.8 Waveforms of cycloconverter with RL load Figure 6.9 Waveforms of single phase cycloconverter with RL load Operation with RL Load The cycloconverter is capable of supplying loads of any power factor. Figure 6.10 shows the idealized output voltage and current waveforms for a lagging power factor load where both the converters are operating as rectifier and inverter at the intervals marked. The load current lags the output voltage and the load current direction determines which converter is conducting. Each converter continues to conduct after its output voltage changes polarity and during this period, the converter acts as an inverter and the power is returned to the ac source. Inverter operation continues till the other converter starts to conduct. By controlling the frequency of oscillation and the depth of modulation of the firing angles of the converters (as shown later), it is possible to control the frequency and the amplitude of the output voltage. SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 6.10 Idealized load voltage and current waveform for a cycloconverter with RL load The load current with RL load may be continuous or discontinuous depending on the load phase angle, φ. At light load inductance or for φ ≤ α ≤ π, there may be discontinuous load current with short zero-voltage periods. The current wave may contain even harmonics and subharmonic components. Further, as in the case of dual converter, although the mean output voltage of the two converters is equal and opposite, the instantaneous values may be unequal and a circulating current can flow within the converters. This circulating current can be limited by having a centertapped reactor connected between the converters or can be completely eliminated by logical control similar to the dual converter case when the gate pulses to the converter remaining idle are suppressed, when the other converter is active. In practice, a zero-current interval of short duration is needed, in addition, between the operation of the P- and N-converters to ensure that the supply lines of the two converters are not short-circuited. With circulating current free operation, the control scheme becomes complicated if the load current is discontinuous. In the case of the circulating current scheme, the converters are kept in virtually continuous conduction over the whole range, and the control circuit is simple. To obtain reasonably good sinusoidal voltage waveform using the line-commutated two quadrant converters and eliminate the possibility of the short circuit of the supply voltages, the output frequency of the cycloconverter is limited to a much lower value of the supply frequency. The output voltage waveform and the output frequency range can be improved further by using converters of higher pulse numbers. 15 (b) (i) What is meant by Cycloconverter? Mention its types. Describe the operation of three phase to three phase cycloconverter. (16) Cycloconverter converts input power at one frequency to output power at a different frequency with one-stage conversion. Cycloconverter is also known as frequency changer. Three Phase Six Pulse and Twelve Pulse Cycloconverter SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Figure 6.14 Three phase six pulse cycloconverter with isolated load Figure 6.15 Cycloconverter load voltage waveforms with lagging power factor load (a) six-pulse connection and (b) twelve-pulse connection A six-pulse cycloconverter circuit configuration is shown in Figure 6.14. Typical load voltage waveforms for 6-pulse (with 36 SCRs) and 12-pulse (with 72 SCRs) cycloconverters are shown in Figure 6.15, the 12-pulse converter being obtained by connecting two 6-pulse configurations in series and appropriate transformer connections for the required phase-shift. It may be seen that the higher pulse numbers will generate waveforms closer to the desired sinusoidal form and thus permit higher frequency output. The phase loads may be isolated from each other as shown or interconnected with suitable secondary winding connections. 6.6 Output Voltage Equation A simple expression for the fundamental rms output voltage of the cycloconverter and the required variation of the firing angle α can be derived with the following assumptions: (1) the firing angle α in successive half cycles is varied slowly resulting in a low-frequency output; (2) the source impedance and the commutation overlap are neglected; (3) the SCRs are ideal switches; and (4) the current is continuous and ripple-free. The average dc output voltage of a ppulse dual converter with fixed α is SNSCE / EEE / RBSK / PE (EE 6503) / IAE-3 ANSWER KEY Vdo = Vdomax cos α Where (6.1) Vdomax =√2 For the p-pulse dual converter operating as a cycloconverter, the average phase voltage output at any point of the low frequency should vary according to the equation Vo,av = Vo1, max sin ωot (6.2) where Vo1,max is the desired maximum value of the fundamental output of the cycloconverter. The fundamental rms voltage per phase of either converter is Vor = VoN = Vop = rVph (6.3) Though the rms values of the low-frequency output voltage of the P-converter and that of the N-converter are equal, the actual waveforms differ and the output voltage at the midpoint of the circulating current-limiting reactor (Figure 6.12), which is the same as the load voltage, is obtained as the mean of the instantaneous output voltages of the two converters.