Circuits, Devices, Networks, and Microelectronics
CHAPTER 4. TRANSIENT ANALYSIS OF ENERGY STORAGE COMPONENTS
4.1 INTRODUCTION
A circuit that includes energy-storage components will have a time-dependent behavior in I and V as these
components are charged and discharged. In section 3.5 it was emphasized that L and C may also be
characterized as storing current and voltage, respectively. Consequently it is the interaction of these
components with the rest of the circuit that then characterize its I(t) and V(t) behavior.
Transient analysis is the I-V response of a circuit to which switch and impulse actions are applied. Switch
and impulses are the actions for which an abrupt transition takes place. Since energy storage components
charge and discharge with respect to time the circuit network will react and relax relative to these changes
according to the (relaxation) time constants associated with the L and C components.
The mathematics of the charge and discharge of energy storage elements are defined by equations (3.5-1)
and (3.5-3). Since I(t) = V/R in equation (3.5-1) and V(t) = IR in equation (3.5-3) these two equations are
of the same form, i.e.
y  
dy
dt
(4.1-1a)
where y is either V(t) or I(t) and  is a time constant associated with the conduction path. Equation (4.11a) is more transparent if rewritten as
dy
dt

y

(4.1-1b)
Of course this is exactly what came forth with equations (3.5-6b) and (3.5-8b). Equation (4.1-1b) is
accommodating to straightforward mathematical analysis since

dy
  ln  y  .
y
Applying this relationship to equation (4.1-1b) and solving for y(t ) gives
y(t) = Ce-t/






(4.1-2)
The rest of the story requires a look at individual circuit topologies, (simplest first). And from section 3.4
it should be expected that the time constants C and L for C and L, respectively, will become the defining
time characteristic of the I(t), V(t) circuit transient response.
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Circuits, Devices, Networks, and Microelectronics
4.2 SINGLE TIME-CONSTANT TRANSIENT ANALYSIS
Capacitance: The simplest option is one in which charge and discharge of a capacitance is toggled by a
switch, as represented by figure 4.2-1.
Figure 4.2-1. Charge/discharge of capacitance through a resistance.
For which the flow of charge is then
I 
dQ d
 CV 
dt dt
C
dV
dt
(4.2-1)
Using equation analysis by KVL and equation (4.2-1) gives
 dV 
 C
 R  V (t )
 dt 
V1  IR  V (t )
(4.2-2)
Equation (4.2-2) is a first-order linear equation in V(t) for which V is the voltage across the capacitance.
It is of benefit to rewrite equation (4.2-2) as
V  V1   RC
for which
dV
dV
 
dt
dt
(4.2-3)
 = RC
(4.2-4)
The symbol reflects that this is of the form of a time constant. More than that, it is the characteristic
time constant of the RC charge/discharge and might be subscripted as  =C as was recognized in the
previous chapter by equation (3.4-6b).
Equation (4.2-3) can be reordered and simplified as
dV
dt
dt



V  V1
RC

64
V
t
dV
dt
 


V  V1
0
V (0)
Circuits, Devices, Networks, and Microelectronics
 V  V1 
t
  
ln

 V (0)  V1 
for which
This result can be inverted and expressed in terms of its voltage profile as
V  V1  V (0)  V1 e t 
(4.2-5)
V1 is the voltage across the capacitance after a long time has elapsed otherwise denoted as V () .
Consequently equation (4.2-5) takes on the limit form
V  V ( )  V (0)  V () e t 
(4.2-6)
Examining (4.2-6) at the limits, it should be evident that at t = 0 = V(0). And for t = ∞, V(t) = V(∞).
The rest of the story lies in the exponential transition between the two limit states as defined by.
The limits V(0) and V(∞) represent two toggle states. As identified by equation (4.2-6) the transitions
between them are exponential as represented by figures 4.2-2(a) and 4.2-2(b) along with equations
(4.2-7a) and (4.2-7b) respectively.
Figure 4.2-2(a). RC network with input switch toggled to V1 = 0. Then V ()  0 and V(0) = VB.
For figure 4.2-2(a) and the values of V () and V(0) equation (4.2-6) gives
V  V (0)e  t 
(4.2-7a)
Equation (4.2-7a) represents exponential decay of V(t) to zero as indicated by the figure.
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Circuits, Devices, Networks, and Microelectronics
Figure 4.2-2(b). RC network with switch toggled to VB = 10V. Then V ()  V B and V(0) = 0.
For figure 4.2-2(b) and the values of V () and V(0), equation (4.2-6) gives

V  V B 1  e t 

(4.2-7b)
which reflects an exponential rise to VB as indicated by the figure.
Switch actions also allow stored charges to redistribute, as represented by figure 4.4-3.
Figure 4.4-3. Charge redistribution between two capacitances.
The total charge on the two capacitances before switch closure is
QTOT  Q1  Q2
 C1V1  C 2V2
Charges moves but no charge escapes when the switch closes. And so
QTOT  V x C TOT  V x C1  C 2 
Consequently the voltage Vx that results after switch closure is
Vx 
Q TOT
C TOT

C1V1  C 2V 2
C1  C 2 
(4.2-8)
Consider the following example:
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EXAMPLE 4.2-1: Two capacitances within an IC
(integrated circuit) are connected by a transistor switch.
Determine (a) the equilibrium voltage that results after the
switch is closed and (b) total stored energy before and after.
SOLUTION: (a) Using equation (4.2-8)
Vx 
C1V1  C 2V 2
C1  C 2 

10  3  40  0.25
= 0.8V
10  40
(b) The energies before and after closing the switch are given by
1
1
C1V12  C 2V 22
2
2
1
1
= 45fJ +1.25fJ
  10  3 2   40  0.25 2
2
2
1
1
w(after)  C1  C 2 V x2    10  40   0.8 2 
16.0fJ
2
2
w(before)  w1  w2 
= 46.25fJ
(Where did the missing energy go?)
Example 4.2-1 should raise the question about the fact that energy (in the amount of approximately 30fJ)
seems to have vanished!!? Since the components are ideal the question is valid. But in fact the transistor
switch will have an internal resistance. And so the missing energy has dissipated in the switch resistance.
Integrated circuits take advantage of this fact and can use an infra-red scanner to see which switches
(transistors) light up during a logic sequence. This phenomenon then provides a means to debug the
actual switch action that is taking place.
The rest of the story is that switches may do more than simply toggle a source ON/OFF. They may also
act as a transfer connection between two distinct and separate RC circuits, each with a different time
constants and with different boundary conditions. Consider the following example.
EXAMPLE 4.2-2: Solve for the
quantities indicated and determine the
analytical response for VC(t).
SOLUTION: V(0) = 10V by
inspection.
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Circuits, Devices, Networks, and Microelectronics
The time constant (not asked) that charges capacitance C to VB is
= 20k x 50pF = 1.0s
Voltage V ( ) = 2.0V (by inspection)
due to charge redistribution. i.e V () 
= 80k x 40pF = 3.2s
10  50  200  0
50  200
(**where the 40pF is due to 50pF in series with 200pF)
The energies are:
wC(before) 
1
 50  10 2
2
1
wC(after)   50  2 2
2
1
C1V12
2

1
C1V 22
2
1
w2(after)  C 2V22
2
wC(after) 
so
wTOT(after)
80k resistance.
w2(after) 
1
 200  2 2
2
= 2.5nJ
= wTOT(before)
= 0.1nJ
= 0.4nJ
= 0.1nJ + 0.4nJ = 0.5nJ and this amount of energy is dissipated in the
By equation (4.2-6) the analytical behavior after the switch is flipped is
V  V ( )  V (0)  V () e t 
V = 2 + 8e-t/
where  = 3.2s
Inductance: Whereas capacitances represent charge storage and the energy associated with stored
charge, inductances represent flux storage and the energy associated with stored magnetic flux. Similar
transient response result when an inductance is toggled by a switch. The distinction is that inductance
reacts to a change of current through it by a responding with a reaction voltage (induced voltage) of
V L
dI
dt
(4.2-9)
This behavior is acknowledged by Faraday’s law of magnetic induction. Comparing equation (4.2-9) to
equation (4.2-1) for the capacitance, it is evident that the components are alike but complementary. The
polarity of the induced potential will act to oppose the change of current.
If applied to a circuit as represented by figure 4.2-4 similar mathematics to that of the charge/discharge of
the capacitance will result.
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Circuits, Devices, Networks, and Microelectronics
Figure 4.2-4. Charge/discharge of an inductance through a resistance.
Like the capacitance the circuit symbol for an inductor resembles its basic construct, i.e. loops of wire
enclosing energy in the form of magnetic field. The analytical interpretation of the circuit of figure 4.2-4
may be analyzed by KVL as
V1  IR  V L (t )
 IR  L
dI
dt
(4.2-10)
where the positive value for VL is due to the fact that it will react to oppose the current through the
resistance in accordance with Lenz’s law. Like that of the capacitance, equation (4.2-10) is a linear
equation which can be rewritten as
I
V1
dI
L dI

 
R
R dt
dt
(4.2-11)
where the time constant is
  L/R
(4.2-12)
Equation (4.2-11) is of the same form as equation (4.2-3) and so the solution will be of the same form
except in terms of current instead of voltage, i.e.
I  I 1  I (0)  I 1 e t 
(4.2-13)
where I1 = V1/R represents the current after a long time has elapsed. It is appropriate to adopt the same
protocol as used for capacitance charge and discharge switching, i.e.
I  I ()  I (0)  I ()e t 
(4.2-14)
And in like manner to the capacitance, toggling the switch in an inductance loop will give transient
behavior for I(t) as defined by the energy charge and discharge of the inductance.
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Circuits, Devices, Networks, and Microelectronics
Equation (4.2-14) shows that the RL transient response is entirely like that of its RC cousin. For the two
toggle options of the switch the current through the inductance as a function of time is indicated by
figures 4.2-5(a) and 4.2-5(b) with corresponding analytical responses given by (4.2-15a) and (4.2-15b).
Figure 4.2-5(a). RL network with input switch toggled to V1 = 0. Then I ()  0 , I(0) = VB/R .
So according to equation (4.2-14) and the limit conditions identified by figure 4.2-5(a)
I  I ( 0) e  t 
(4.2-15a)
with exponential decay to zero as indicated by figure 4.2-5(a)
Figure 4.2-5(b). RL network with switch toggled to VB = 10V. Then I ()  V B R , I(0) = 0.
So according to equation (4.2-14) and the limit conditions identified by figure 4.2-5(b)
I

VB
1  e t 
R

(4.2-15b)
with exponential rise to VB/R as indicated by figure 4.2-5(b).
The storage of energy by an inductance is similar to that of the capacitance except that it stores current,
held in a set of loops by magnetic field. For the voltage V(t) induced across an inductance as it is
charged by current I(t) the energy that it stores will be an integral of power p(t) = I(t)V(t) of the form
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Circuits, Devices, Networks, and Microelectronics
 dI 
wL   V (t ) I (t )dt    L   Idt
dt 
0
0
T
T
I
= L  IdI
0

1 2
LI
2
(4.2-16)
If the geometrical interpretation of an inductance represented by equations (3.3-6) and (3.3-7) are applied
to equation (4.2-16) then energy density equation (3.1-2) will result.
4.3 TRANSIENT ANALYSIS OF RLC TOPOLOGIES
The next question should be ‘what if both an inductance and a capacitance are in the charge/discharge
loop. They both store energy. But the principal distinction is that their energy storage forms are
complementary. Consequently the discharge flow of energy from one will be absorbed by the other, and
then there a predisposition to oscillate back and forth. This oscillation between the L and the C would
hypothetically go on forever were it not for the presence of resistance, whether natural or applied, and
which is a dissipative component and dampens the oscillation. Mathematical analysis confirms this
behavior. It is second-order differential equation that resolves from the two benchmark RLC topologies,
which are or generic form (1) series and (2) parallel reflected by figures 4.3-1(a) and 4.3-1(b),
respectively
Figure 4.3-1(a). RLC series topology.
Figure 4.3-1(b). RLC parallel topology.
The transient analysis is not unlike those entertained for the single C or single L. Consider a KVL
assessment of the topology of figure 4.3-1(a), for which
VS  iR  L
The substitution i  C
di
 VC
dt
(4.3-1)
dVC
changes equation (4.3-1) to
dt
d  dV 
 dV 
V S   C C  R  L  C C   VC
dt  dt 
 dt 
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or (reorganizing)
V S  RC
dV C
d 2V C
 LC
 VC
dt
dt 2
This equation may be restated in the form of a second-order differential equation:
VS
d 2VC R dV C
1



VC
LC
L dt
LC
dt 2
(4.3-2)
Alternatively but similarly, analysis of figure 4.3-1(b) by a nodal analysis at Vp gives
dV P 1 t
GV S  GV P  C
  V P dt
dt
L 
Taking the time derivative of this equation gives
G
dV S
dV
d 2V P V P
G P C

dt
dt
L
dt 2
which simplifies to
G dV S d 2V P G dV P V P



C dt
C dt
LC
dt 2
(4.3-3)
Equations (4.3-2) and (4.3-3) are second-order differential equations in t of the homogeneous form
d 2 x 2 dx x


0
 dt  2
dt 2
(4.3-4)
for which the coefficients are chosen with respect to time derivatives and time constants. The time
constant  is sufficient to bridge all of the character of the response and it related to the individual time
constants L and C of the L and C components as
 2  LC

L
 RC
R
 2   L C
or
(4.3-5a)
Of further mathematical convenience and interpretation can be restated in terms of (radian) frequency
0  1 
(4.3-5b)
which results in a more tractable as well as more descriptive differential equation of the form
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Circuits, Devices, Networks, and Microelectronics
d 2x
dx
 2 0
  02 x  0
dt
dt 2
In the time-honored way of solving ordinary differential equations, a WAG (wild-eyed guess) is assumed
as the solution and then it is proven to be good by substitution back into the D.E. In this case the choice
x(t) = Aest is made as the WAG, for which, taking derivatives, gives
s
2

 2 0 s   02 e st  0
(4.3-6)
The WAG is confirmed for ( ) = 0, for which the quadratic equation will have roots
s   0  j 0 1   2
   j d
(4.3-7)
Equation (4.3-7) makes the assumption that  < 1 is the more likely option, so the roots will almost
always be complex.
The solution to the quadratic equation given by (4.3-6) shows why the choice 20 for the middle term of
generic equation (4.3-4) is elected. The quadratic coefficients 1, 2 0 ,  02 are not only mathematically
convenient but behaviorally appropriate. As should be expected for any quadratic, two parametric
characteristics,  and 0, are the consequence. 0 is called the characteristic (radian) frequency and is
called the normalized damping coefficient.
For the signal being a step response like that generated by switching action then VS is a constant, and one
of two possible levels. In which case the response will be of the form
x (t )  V (t )  V 0 e  st  V 0 e  (  j d )


 V 0 e  t e  j d
(4.3-8)
Equation (4.3-8) is of the form of an exponentially decreasing amplitude with an oscillation of (radian)
frequency d and amplitude decay time constant R = 1/. This behavior is confirmed by a simulation
rendition of figures 4.3-1(a) and (4.3-1(b) in response to a step impulse (same as a switch toggle). The
results are shown by the figures (4.3-2(a)) and (4.3-2(b).
Figure 4.3-2(a). RLC series topology with step impulse at input. The input is indicated by the
dashed line. The output is riding on the input and shows a ringing effect.
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Circuits, Devices, Networks, and Microelectronics
Figure 4.3-2(b). RLC parallel topology with step impulse of same amplitude as that of series
topology except reduced by factor of 4 to show ringing response.
The response of an RLC circuit is not unlike that of one of its acoustic cousins in which a tap on a bell
will give a ringing response that declines in amplitude with time constant R .
If the amplitude time constant R is related back to the two topology options then
2

2

 2 
 2 
2
R
2
R

R
L


G
C

1
L
1
C
for the series topology
for the parallel topology
So the amplitude decay constant R relates directly to component time constants according to the
series/parallel RLC topology as
Series RLC:
 R  2 L
(4.3-9a)
Parallel RLC:
 R  2 C
(4.3-9b)
And
   R
(for both)
(4.3-10)
EXAMPLE 4.3-1: (a) Analyze the RLC series circuit
shown and determine all of the relevant time constants
(L, C, ,R). (b) Determine , d, and fd = 0.16d.
(c) execute the circuit in pspice and extract d ,R
andand compare to part (b).
Figure E4.3-1(a): RLC series topology example.
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(a)
SOLUTION:
(b)
L  L R
=
10uH/50
= 0.2s = 200ns
 C  RC
=
160ps × 50
= 8.0ns
   L C
=
200  8.0
= 40ns
 R  2 L
=
2.0 × 0.2s
= 0.4s
 
2 L
=
40ns/(2 × 200ns)
0  1 
=
1/40ns = 25Mr/s
so
d  0 1   2
= 0.1
= 25 1  0.12
= 24.88 Mr/s
→ fd = 0.16 × 24.88
(c)
= 3.98MHz
The circuit rendering in pspice is shown by figure E4.3-1(b).
The cursors give the essential information.
The difference between cursors on the time
t = 0.252s
scale shows
So the cyclic frequency is
f d  1 t
d = 2fd
= 1/0.252s
= 3.97MHz
 3.97/0.16 = 24.8Mr/s
Figure E4.3-1(b): pspice rendering of example circuit.
The cursor coordinates show the measure of the first two amplitude peaks, both of which are a V riding
on a 1.0 V pulse amplitude. So the ringing amplitudes are
V(t1) = 1.7162 – 1.0 = 0.7162
And according to equation (4.38)
and
V(t2) = 1.3861 – 1.0 = 0.3861
 V (t )   V ( 0 ) e  t
V (t 2 ) V (0)e t1

 e  t 2 t1 )   e  t
V (t1 ) V (0)e tt 2
with ratio between any two amplitudes
 V (t 2 ) 
    t
ln
 V (t1 ) 
 0.3861 
= - × 0.25s
ln 
  0.618
 0.7162 
taking the inverse
which gives
or
R= 0.25/0.618
=0.40s
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Circuits, Devices, Networks, and Microelectronics
and since  = 1/R
then


  1/(R × d) = 1/(0.4 × 24.8)
 0.1
The extracted measures for fd (and d) and for compare 1 to 1, relative to the usual limits of accuracy
and the approximations made. The extracted information does not give 0, so the approximation 0  d
is necessary and will not survive with any accuracy if > 0.25.
The parameter  is also called the normalized damping coefficient and plays a role in the ability to
suppress the ringing effects represented by figure 4.3-3. This figure is a pspice rendition of a series RLC
topology with impulse input and output taken across the capacitance.
Figure 4.3-3 RLC series topology with step impulse at input and  stepped through the options 0.1, 0.5,
0.707 and 1.0. When  = 1.0 the ringing impulse is critically damped. The trace corresponding to
critical damping  = 1.0 is shown in bold. The pulse is shown as a dashed line.
The conditions on the normalized damping coefficient  are:
<1
 = 1.0
 >1
underdamped (ringing occurs)
critical damping
overdamped
These considerations are of importance to pulse inputs and logic information technologies.
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Circuits, Devices, Networks, and Microelectronics
PORTFOLIO and SUMMARY
Transients and switching:
Charge redistribution:
x (t )  x ( )  x (0)  x ( ) e  t 
Transient analysis:
and
  RC   C
VX 
C1V1  C 2V2
C1  C 2 
where x(t) = either V(t) or I(t)
or
  L R  L
Exponential decay from high to low
Exponential rise from low to high
RLC circuits with impulse: Damped harmonic ringing response (exponential decay of amplitude)


V(t)  V0e t e  j d t
 V (t )   V ( 0 ) e   t
 = 1/R
d  0 1   2
where
0  1 
 2  LC
Series RLC topology
  L C
 = 1/R


Series RLC:
 R  2 L
Parallel RLC:
  R  2 C 

Parallel RLC topology 
 C  RC  C G 
L  L R
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Circuits, Devices, Networks, and Microelectronics
 = normalized damping coefficient    R  1  0 R 
 < 1 underdamped,
 > 1 overdamped,
damped
The enhanced trace is the case for which  = 1
 = 1 critically
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