Low Distortion Differential RF/IF Amplifier
AD8351-EP
Enhanced Product
FUNCTIONAL BLOCK DIAGRAM
−3 dB bandwidth of 2.2 GHz for AV = 12 dB
Single-resistor programmable gain: 0 dB ≤ AV ≤ 26 dB
Differential interface
Low noise input stage: 2.70 nV/√Hz at 70 MHz, AV = 10 dB
Low harmonic distortion
−79 dBc second at 70 MHz
−81 dBc third at 70 MHz
Output third-order intercept (OIP3) of 31 dBm at 70 MHz
Single-supply operation: 3 V to 5.5 V
Low power dissipation: 28 mA at 5 V
Adjustable output common-mode voltage
Fast settling and overdrive recovery
Slew rate of 13,000 V/µs
Power-down capability
AD8351-EP
PWUP
BIAS CELL
VOCM
VPOS
RGP1
INHI
OPHI
INLO
OPLO
COMM
RGP2
14821-001
FEATURES
Figure 1.
ENHANCED PRODUCT FEATURES
Supports defense and aerospace applications (AQEC standard)
Extended industrial temperature range: −55°C to +105°C
Controlled manufacturing baseline
1 assembly/test site
1 fabrication site
Product change notification
Qualification data available upon request
APPLICATIONS
Differential ADC drivers
Single-ended-to-differential conversion
IF sampling receivers
RF/IF gain blocks
Surface acoustic wave (SAW) filter interfacing
GENERAL DESCRIPTION
The AD8351-EP is a low cost differential amplifier useful in RF
and IF applications up to 2.2 GHz. The voltage gain can be set
from unity to 26 dB using a single external gain resistor. The
AD8351-EP provides a nominal 150 Ω differential output
impedance. The excellent distortion performance and low noise
characteristics of this device allow a wide range of applications.
The AD8351-EP is designed to satisfy the demanding
performance requirements of communications transceiver
applications. The device can be used as a general-purpose gain
block, an ADC driver, and a high speed data interface driver,
among other functions. The AD8351-EP can also be used as a
single-ended-to-differential amplifier with similar distortion
Rev. A
products as in the differential configuration. The exceptionally
good distortion performance makes the AD8351-EP an ideal
solution for 12-bit and 14-bit IF sampling receiver designs.
Fabricated in the Analog Devices, Inc., high speed XFCB
process, the AD8351-EP has a high bandwidth that provides
high frequency performance and low distortion. The quiescent
current of the AD8351-EP is 28 mA typically. The AD8351-EP
amplifier comes in a 16-lead LFCSP package, and operates over
the temperature range of −55°C to +105°C.
Additional application and technical information can be found
in the AD8351 datasheet.
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
AD8351-EP
Enhanced Product
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................5
Enhanced Product Features ............................................................ 1
Maximum Power Dissipation ......................................................5
Applications ....................................................................................... 1
ESD Caution...................................................................................5
Functional Block Diagram .............................................................. 1
Pin Configuration and Function Descriptions..............................6
General Description ......................................................................... 1
Typical Performance Characteristics ..............................................7
Revision History ............................................................................... 2
Outline Dimensions ....................................................................... 12
Specifications..................................................................................... 3
Ordering Guide .......................................................................... 12
REVISION HISTORY
9/2016—Rev. 0 to Rev. A
Change to Quiescent Current Parameter, Table 1 ........................ 3
Changes to Ordering Guide .......................................................... 12
7/2016—Revision 0: Initial Version
Rev. A | Page 2 of 12
Enhanced Product
AD8351-EP
SPECIFICATIONS
VS = 5 V, RL = 150 Ω, RG = 110 Ω (AV = 10 dB), f = 70 MHz, T = 25°C, parameters specified differentially, unless otherwise noted. The
gain (AV) can be set to any value between 0 dB and 26 dB.
Table 1.
Parameter
DYNAMIC PERFORMANCE
−3 dB Bandwidth
Bandwidth for 0.1 dB Flatness
Bandwidth for 0.2 dB Flatness
Gain Accuracy
Gain Supply Sensitivity
Gain Temperature Sensitivity
Slew Rate
Settling Time
Overdrive Recovery Time
Reverse Isolation (S12)
INPUT/OUTPUT CHARACTERISTICS
Input Common-Mode Voltage Adjustment Range
Maximum Output Voltage Swing
Output Common-Mode Offset
Output Common-Mode Drift
Output Differential Offset Voltage
Output Differential Offset Drift
Input Bias Current
Input Resistance 1
Input Capacitance1
Common-Mode Rejection Ratio (CMRR)
Output Resistance1
Output Capacitance1
POWER INTERFACE
Supply Voltage
PWUP Threshold
PWUP Input Bias Current
Quiescent Current
NOISE/DISTORTION
10 MHz
Second/Third Harmonic Distortion 2
Third-Order Intermodulation Distortion (IMD)
Output Third-Order Intercept
Noise Spectral Density (Referred to Input (RTI))
1 dB Compression Point
Test Conditions/Comments
Min
AV = 6 dB, VOUT ≤ 1.0 V p-p
AV = 12 dB, VOUT ≤ 1.0 V p-p
AV = 18 dB, VOUT ≤ 1.0 V p-p
0 dB ≤ AV ≤ 20 dB, VOUT ≤ 1.0 V p-p
0 dB ≤ AV ≤ 20 dB, VOUT ≤ 1.0 V p-p
Using 1% resistor for RG, 0 dB ≤ AV ≤ 20 dB
VS ± 5%
−55°C to +105°C
RL = 1 kΩ, VOUT = 2 V step
RL = 150 Ω, VS = 2 V step
1 V step to 1%
VIN = 4 V to 0 V step, VOUT ≤ ±10 mV
1 dB compressed
−55°C to +105°C
−55°C to +105°C
Typ
RL = 1 kΩ, VOUT = 2 V p-p
RL = 150 Ω, VOUT = 2 V p-p
RL = 1 kΩ, f1 = 9.5 MHz, f2 = 10.5 MHz,
VOUT = 2 V p-p composite
RL = 150 Ω, f1 = 9.5 MHz, f2 = 10.5 MHz,
VOUT = 2 V p-p composite
f1 = 9.5 MHz, f2 = 10.5 MHz
Rev. A | Page 3 of 12
Unit
3000
2200
600
200
400
±1
0.08
3.9
13,000
7500
<3
<2
−67
MHz
MHz
MHz
MHz
MHz
dB
dB/V
mdB/°C
V/µs
V/µs
ns
ns
dB
1.2 to 3.8
4.75
40
0.24
20
0.13
±15
5
0.8
43
150
0.8
V
V p-p
mV
mV/°C
mV
mV/°C
µA
kΩ
pF
dB
Ω
pF
3
PWUP at 5 V
PWUP at 0 V
−55°C to +105°C
Max
5.5
1.3
100
25
28
35
V
V
µA
µA
mA
−95/−93
−80/−69
−90
dBc
dBc
dBc
−70
dBc
33
2.65
13.5
dBm
nV/√Hz
dBm
AD8351-EP
Parameter
70 MHz
Second/Third Harmonic Distortion2
Third-Order IMD
Output Third-Order Intercept
Noise Spectral Density (RTI)
1 dB Compression Point
140 MHz
Second/Third Harmonic Distortion2
Third-Order IMD
Output Third-Order Intercept
Noise Spectral Density (RTI)
1 dB Compression Point
240 MHz
Second/Third Harmonic Distortion2
Third-Order IMD
Output Third-Order Intercept
Noise Spectral Density (RTI)
1 dB Compression Point
1
2
Enhanced Product
Test Conditions/Comments
Min
Typ
Max
Unit
RL = 1 kΩ, VOUT = 2 V p-p
RL = 150 Ω, VOUT = 2 V p-p
RL = 1 kΩ, f1 = 69.5 MHz, f2 = 70.5 MHz,
VOUT = 2 V p-p composite
RL = 150 Ω, f1 = 69.5 MHz, f2 = 70.5 MHz,
VOUT = 2 V p-p composite
f1 = 69.5 MHz, f2 = 70.5 MHz
−79/−81
−65/−66
−85
dBc
dBc
dBc
−69
dBc
31
2.70
13.3
dBm
nV/√Hz
dBm
RL = 1 kΩ, VOUT = 2 V p-p
RL = 150 Ω, VOUT = 2 V p-p
RL = 1 kΩ, f1 = 139.5 MHz, f2 = 140.5 MHz,
VOUT = 2 V p-p composite
RL = 150 Ω, f1 = 139.5 MHz, f2 = 140.5 MHz,
VOUT = 2 V p-p composite
f1 = 139.5 MHz, f2 = 140.5 MHz
−69/−69
−54/−53
−79
dBc
dBc
dBc
−67
dBc
29
2.75
13
dBm
nV/√Hz
dBm
RL = 1 kΩ, VOUT = 2 V p-p
RL = 150 Ω, VOUT = 2 V p-p
RL = 1 kΩ, f1 = 239.5 MHz, f2 = 240.5 MHz,
VOUT = 2 V p-p composite
RL = 150 Ω, f1 = 239.5 MHz, f2 = 240.5 MHz,
VOUT = 2 V p-p composite
f1 = 239.5 MHz, f2 = 240.5 MHz
−60/−66
−46/−50
−76
dBc
dBc
dBc
−62
dBc
27
2.90
13
dBm
nV/√Hz
dBm
Values are specified differentially.
See the AD8351 data sheet for information about single-ended to differential operation.
Rev. A | Page 4 of 12
Enhanced Product
AD8351-EP
ABSOLUTE MAXIMUM RATINGS
MAXIMUM POWER DISSIPATION
Rating
6V
VPOS
320 mW
79.1°C/W
125°C
−55°C to +105°C
−65°C to +150°C
300°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
The maximum power that can be safely dissipated by this device
is limited by the associated rise in junction temperature.
Exceeding a junction temperature of 125°C for an extended
period can result in device failure.
To ensure proper operation of the AD8351-EP, it is necessary to
observe the maximum power derating curve (see Figure 2) to
guarantee that the maximum junction temperature (125°C) is
not exceeded under all conditions.
0.350
0.325
0.300
0.275
0.250
0.225
AMBIENT TEMPERATURE (°C)
Figure 2. Maximum Power Dissipation vs. Temperature
ESD CAUTION
Rev. A | Page 5 of 12
110
14821-002
90
100
80
70
60
50
40
30
20
0
10
–10
–20
–30
–40
–60
0.200
–50
Parameter
Supply Voltage, VPOS
PWUP Voltage
Internal Power Dissipation
θJA
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Lead Temperature Range (Soldering, 60 sec)
MAXIMUM POWER DISSIPATION (W)
Table 2.
AD8351-EP
Enhanced Product
13 VOCM
14 NC
16 PWUP
15 NC
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
RGP1 1
12 VPOS
INHI 2
AD8351-EP
11 OPHI
INLO 3
TOP VIEW
(Not to Scale)
10 OPLO
9
COMM
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE EXPOSED PAD IS INTERNALLY CONNECTED TO
GND AND MUST BE SOLDERED TO A LOW
IMPEDANCE GROUND PLANE.
14821-003
NC 8
NC 7
NC 6
NC 5
RGP2 4
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
2
3
4
5, 6, 7, 8, 14, 15
9
10
11
12
13
RGP1
INHI
INLO
RGP2
NC
COMM
OPLO
OPHI
VPOS
VOCM
16
PWUP
EPAD
Gain Resistor Input 1.
Balanced Differential Input, High. Biased to midsupply, typically ac-coupled.
Balanced Differential Input, Low. Biased to midsupply, typically ac-coupled.
Gain Resistor Input 2.
No Connect. Do not connect to this pin.
Device Common. Connect this pin to a low impedance ground.
Balanced Differential Output, Low. Biased to VOCM, typically ac-coupled.
Balanced Differential Output, High. Biased to VOCM, typically ac-coupled.
Positive Supply Voltage. 3 V to 5.5 V.
Input/Output Common-Mode Voltage. The voltage applied to this pin sets the common-mode voltage at
both the input and output. This pin is typically decoupled to ground with a 0.1 µF capacitor.
Apply a positive voltage (1.3 V ≤ VPWUP ≤ VPOS) to activate the device.
Exposed Pad. The exposed pad is internally connected to GND and must be soldered to a low impedance
ground plane.
Rev. A | Page 6 of 12
Enhanced Product
AD8351-EP
TYPICAL PERFORMANCE CHARACTERISTICS
VS = 5 V, T = 25°C, unless otherwise noted.
20
30
RG = 20Ω
RG = 10Ω
25
15
RG = 80Ω
GAIN (dB)
GAIN (dB)
20
10
RG = 200Ω
5
RG = 50Ω
15
10
RG = 200Ω
0
10
100
1000
10000
FREQUENCY (MHz)
0
1
30
GAIN FLATNESS (dB)
25
GAIN (dB)
20
15
RL = OPEN
5
RL = 150Ω
0
10
100
1k
10k
RG (Ω)
14821-004
RL = 1kΩ
–10
1000
10000
Figure 7. Gain vs. Frequency for a 1 kΩ Differential Load
(AV = 10 dB, 18 dB, and 26 dB)
35
–5
100
FREQUENCY (MHz)
Figure 4. Gain vs. Frequency for a 150 Ω Differential Load
(AV = 6 dB, 12 dB, and 18 dB)
10
10
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
–0.7
–0.8
–0.9
–1.0
RL = 150Ω
RL = 1kΩ
1
10
100
1000
FREQUENCY (MHz)
14821-007
1
14821-103
–5
14821-006
5
Figure 8. Gain Flatness vs. Frequency
(RL = 150 Ω and 1 kΩ, AV = 10 dB)
Figure 5. Gain vs. Gain Resistor, RG (f = 100 MHz,
RL = 150 Ω, 1 kΩ, and Open)
10.75
10.50
10.50
10.25
0
–10
10.00
9.75
9.75
9.50
9.50
9.25
ISOLATION (dB)
10.00
GAIN; RL = 150Ω (dB)
10.25
–30
–40
–50
–60
–70
–40
–20
0
20
40
60
80
100
9.00
120
TEMPERATURE (°C)
Figure 6. Gain vs. Temperature at 100 MHz (AV = 10 dB)
–90
0
100
200
300
400
500
600
700
800
900
FREQUENCY (MHz)
Figure 9. Isolation vs. Frequency (AV = 10 dB)
Rev. A | Page 7 of 12
1000
14821-008
–80
9.25
–60
14821-005
GAIN; RL = 1kΩ (dB)
–20
AD8351-EP
Enhanced Product
–45
–65
HD2
HD2
–60
–75
HD3
–70
–85
–80
–95
DIFFERENTIAL INPUT
–90
–105
–100
–115
250
0
25
50
75
100
125
175
150
200
225
HD3
–20
–40
–50
–30
HD2
–40
–60
–50
–70
–60
–80
HD3
DIFFERENTIAL INPUT
–70
–90
HD2
–80
–100
–75
HD2
–80
HD3
–85
–90
–100
0
10
20
30
40
50
60
70
80
90
100
FREQUENCY (MHz)
–50
SINGLE-ENDED INPUT
–55
HARMONIC DISTORTION (dBc)
–30
–70
Figure 13. Harmonic Distortion vs. Frequency for 2 V p-p into RL = 1 kΩ Using
Single-Ended Input (AV = 10 dB)
HARMONIC DISTORTION; VPOS = 3V (dBc)
–10
–60
–65
HD3
–70
–75
–80
HD2
–85
–90
50
75
100
125
150
175
200
225
–110
250
14821-010
25
0
FREQUENCY (MHz)
–100
0
10
20
30
40
50
60
70
80
90
100
FREQUENCY (MHz)
Figure 11. Harmonic Distortion vs. Frequency for 2 V p-p into RL = 150 Ω
(AV = 10 dB)
Figure 14. Harmonic Distortion vs. Frequency for 2 V p-p into RL = 150 Ω
Using Single-Ended Input (AV = 10 dB)
3.00
2.95
2.95
NOISE SPECTRAL DENSITY (nV/√Hz)
3.00
2.90
2.85
2.80
2.75
2.70
2.65
2.60
2.55
14821-013
–95
–90
2.90
2.85
2.80
2.75
2.70
2.65
2.60
0
50
100
150
200
FREQUENCY (MHz)
250
2.50
0
50
100
150
200
FREQUENCY (MHz)
Figure 15. Noise Spectral Density (RTI) vs. Frequency
(RL = 150 Ω, 3 V Supply, AV = 10 dB)
Figure 12. Noise Spectral Density (RTI) vs. Frequency
(RL = 150 Ω, 5 V Supply, AV = 10 dB)
Rev. A | Page 8 of 12
250
14821-014
2.55
2.50
14821-011
NOISE SPECTRAL DENSITY (nV/√Hz)
HARMONIC DISTORTION; VPOS = 5V (dBc)
Figure 10. Harmonic Distortion vs. Frequency for 2 V p-p into RL = 1 kΩ
(AV = 10 dB, at 3 V and 5 V Supplies)
–20
–65
–95
FREQUENCY (MHz)
0
–60
14821-012
–50
SINGLE-ENDED INPUT
–55
HARMONIC DISTORTION (dBc)
–55
HD3
HARMONIC DISTORTION; VPOS = 3V (dBc)
–40
–50
14821-009
HARMONIC DISTORTION; VPOS = 5V (dBc)
–30
Enhanced Product
AD8351-EP
–70
14
–75
10
THIRD-ORDER IMD (dBc)
RL = 150Ω
VPOS = 5V
RL = 1kΩ
12
8
RL = 150Ω
VPOS = 3V
RL = 1kΩ
6
4
–85
–90
0
25
50
75
100
125
150
175
200
225
250
FREQUENCY (MHz)
–95
Figure 16. Output 1 dB Compression (P1dB) vs. Frequency
(RL = 150 Ω and 1 kΩ, AV = 10 dB, at 3 V and 5 V Supplies)
0
25
50
75
100
125
150
175
200
225
250
FREQUENCY (MHz)
14821-018
0
Figure 19. Third-Order Intermodulation Distortion (IMD) vs. Frequency for a 2
V p-p Composite Signal into RL = 1 kΩ (AV = 10 dB, at 5 V Supplies)
16
–50
VPOS = 5V
14
–55
THIRD-ORDER IMD (dBc)
12
10
8
VPOS = 3V
6
4
–60
–65
–70
1000
GAIN RESISTOR (Ω)
OUTPUT 1dB COMPRESSION (dB)
0
25
50
75
100
125
150
175
200
225
250
FREQUENCY (MHz)
Figure 20. Third-Order Intermodulation Distortion vs. Frequency for a 2 V p-p
Composite Signal into RL = 150 Ω (AV = 10 dB, at 5 V Supplies)
–68.0 –68.2 –68.4 –68.6 –68.8 –69.0 –69.2 –69.4 –69.6 –69.8 –70.0
14821-017
13.41
13.40
13.39
13.38
13.37
13.36
13.35
13.34
13.33
13.32
13.31
13.30
Figure 17. Output 1 dB Compression (P1dB) vs. Gain Resistor (RG)
(f =100, RL = 150 Ω, AV = 10 dB, at 3 V and 5 V Supplies)
–75
THIRD-ORDER INTERMODULATION DISTORTION (dBc)
Figure 18. Output Compression Point Distribution
(f = 70 MHz, RL = 150 Ω, AV = 10 dB)
14821-020
100
14821-016
0
10
14821-019
2
13.29
OUTPUT 1dB COMPRESSION (dBm)
–80
2
14821-015
OUTPUT 1dB COMPRESSION (dBm)
16
Figure 21. Third-Order Intermodulation Distortion Distribution
(f = 70 MHz, RL = 150 Ω, AV = 10 dB)
Rev. A | Page 9 of 12
AD8351-EP
Enhanced Product
0
4000
–25
3000
2500
–50
2000
1500
PHASE (Degrees)
IMPEDANCE MAGNITUDE (Ω)
3500
3GHz
–75
1000
500MHz
3GHz
500
–100
1000
100
14821-024
FREQUENCY (MHz)
500MHz
WITH 50Ω
TERMINATIONS
WITHOUT
TERMINATIONS
14821-021
0
10
10MHz
10MHz
Figure 25. Input Reflection Coefficient vs. Frequency (RS = RL = 100 Ω With
and Without 50 Ω Terminations)
30
150
25
140
20
130
15
10
120
IMPEDANCE PHASE (Degrees)
160
500MHz
10MHz
5
110
100
10
0
1000
100
3GHz
14821-022
IMPEDANCE MAGNITUDE (Ω)
Figure 22. Input Impedance vs. Frequency
14821-025
FREQUENCY (MHz)
Figure 26. Output Reflection Coefficient vs. Frequency (RS = RL = 100 Ω)
–2
PHASE (Degrees)
–4
–6
–8
–10
–12
–14
–16
–18
0
25
50
75
100
125
150
175
200
225
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
1
0
250
FREQUENCY (MHz)
14821-023
0
GROUP DELAY (ps)
Figure 23. Output Impedance Magnitude and Phase vs. Frequency
Figure 24. Phase and Group Delay (AV = 10 dB, at 5 V Supplies)
Rev. A | Page 10 of 12
Enhanced Product
AD8351-EP
80
3
VOUT
70
2
RL = 150Ω
1
VOLTAGE (V)
VIN
0
40
–1
30
–2
20
1
10
100
1000
FREQUENCY (MHz)
–3
Figure 27. Common-Mode Rejection Ratio, CMRR (RS = 100 Ω)
0
5
10
15
20
25
30
35
40
45
50
TIME (ns)
14821-029
RL = 1kΩ
50
14821-026
CMRR (dB)
60
Figure 30. Overdrive Recovery Using Sinusoidal Input Waveform RL = 150 Ω
(AV = 10 dB, at 5 V Supplies)
0.6
1.00
0pF
0.75
0.4
5pF
2pF
0.50
10pF
VOLTAGE (V)
VOLTAGE (V)
0.2
0
0.25
0
–0.25
–0.2
–0.50
–0.4
17
18
19
20
21
22
23
24
25
TIME (ns)
0
4.5
4
4.0
3
3.5
2
SETTLING (%)
5
3.0
2.5
2.0
–3
–4
0
–5
25
30
35
40
TIME (ns)
Figure 29. 2× Output Overdrive Recovery (RL = 150 Ω, AV = 10 dB)
14821-028
0.5
20
2.5
3.0
3.5
4.0
–1
–2
15
2.0
0
1.0
10
1.5
1
1.5
5
1.0
TIME (ns)
5.0
0
0.5
Figure 31. Large Signal Transient Response for a 1 V p-p Output Step
(AV = 10 dB, RIP = 25 Ω)
Figure 28. Transient Response Under Capacitive Loading
(RL = 150 Ω, CL = 0 pF, 2 pF, 5 pF, 10 pF)
OUTPUT (V)
–1.00
0
3
6
9
TIME (ns)
12
15
14821-031
16
14821-027
–0.6
15
14821-030
–0.75
Figure 32. 1% Settling Time for a 2 V p-p Step (AV = 10 dB, RL = 150 Ω)
Rev. A | Page 11 of 12
AD8351-EP
Enhanced Product
OUTLINE DIMENSIONS
PIN 1
INDICATOR
0.30
0.25
0.18
0.50
BSC
13
PIN 1
INDICATOR
(0.30)
16
1
12
1.80
1.70 SQ
1.60
EXPOSED
PAD
9
*0.45
TOP VIEW
PKG-004087/PKG-005014
0.80
0.75
0.70
4
5
8
0.40
0.30
0.05 MAX
0.02 NOM
COPLANARITY
0.08
0.203 REF
SEATING
PLANE
0.20 MIN
BOTTOM VIEW
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
*COMPLIANT TO JEDEC STANDARDS MO-220-WEED-4
WITH EXCEPTION TO LEAD LENGHT.
10-22-2015-B
3.10
3.00 SQ
2.90
Figure 33. 16-Lead Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body and 0.75 mm Package Height
(CP-16-33)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
AD8351SCPZ-EP-R7
1
Temperature Range
−55°C to +105°C
Package Description
16-Lead Lead Frame Chip Scale Package [LFCSP]
Z = RoHS Compliant Part.
©2016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D14821-0-9/16(A)
Rev. A | Page 12 of 12
Package Option
CP-16-33
Branding
Q26