DHANALAKSHMI SRINIVASAN INSTITUTE OF
RESEARCH AND TECHNOLOGY
SIRUVACHUR – 621 113.
DEPARTMENT OF ELECTRICAL AND ELECTRONICS
ENGINEERING
QUESTION BANK (PART B)
YEAR/SEMESTER :II/III
SUB CODE/SUB NAME : EC6202/ELECTRONIC
DEVICES AND CIRCUITS
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UNIT I
1.Explain the operation of FWR with centre tap transformer also derive the
following for this transformer
i) DC output voltage
voltage
ii) dc output current
Positive half cycle : D1 forward biased
Negative half cycle :D2 forward biased
i) dc output voltage:
EDC = 2Esm/π
ii) DC output current
IDC = 2 Im/π
iii) RMS output voltage =
Im/√2 RL
iii) RMS output
2. Explain the Zener diode shunt regulator
1.The voltage across the zener diode remains constant equal to Vz, it is
connected across the load and hence the load voltage Vo is equal to the zener
voltage Vz.
2.VO = Vz is constant,
IL
= Vo = Vz = constant
3. Explain the V-I characteristics of PN junction diode
1.In forward characteristics, voltage close to barrier potential current increases
rapidly
2.The voltage at which diode current starts increasing rapidly is
voltage.
called as cut in
3.The cut in voltage for germanium is about 0.2V while for silicon it is 0.6V
4.The voltage at which breakdown occurs is called reverse breakdown voltage
denoted as VBR
4. With neat diagram explain the construction and working of LED
1. Light Emitting Diode
2. Optical diode, emits light when forward biased.
Working of LED:
3.Forward biased, electrons from higher energy recombine with hole in valence
band,it emits photons this is called electroluminescence.
5. Explain the construction and operation ofPN junction diode.
1.Junction formed by joining P
and N materials
2.Diffusion current: charge carriers moves from higher to lower concentration.
3.Immobile ions forms depletion region/space charge region
4.Barrier potential Si :0.3 ,Ge : 0.7
Operation :
Forwarb bias: 1.P type material connected to +Ve terminal& N type is connected to Ve terminal
2.small Depletion region
3.More current, Low resistance
Reversebias
Forward bias
Reverse bias:
1..P type material connected to -Ve terminal& N type is connected to +Ve terminal
2..Large Depletion region
3. 3.Small current(reverse saturation current ), High resistance
UNIT II
1. Explain the N channel EnhancementMOSFET in detail.
 The gate of the MOSFET is insulated from the channel by a silicon dioxide
(Sio2) layer.
 High impedance
 The two types of MOSFETs are :
 Depletion MOSFET
 Enhancement MOSFET
Enhancement MOSFET:
 P substrate - Lightly doped and N region heavily doped
 Gate is supplied with positive voltage, VGS>VT ,ID flows
 The conductivity of n channel is enhanced by increasing the gate to source
voltage
2.Explain the construction and operation of N channel JFET.
Construction and symbol
 Made up of N type bar with two P-type gate.
 Current is carried by electrons
 Source : Electrons enters the channel
 Gate
:Two Ptype are shorted
 Drain : Electrons leave the channel
Operation of JFET :

-Ve VGS, More depletion region & ID becomes zero that volage is pinch off
volatge (Vp)
Channel width is controlled by VGS
3.Explain the drain and transfer characteristics of the N channel JFET.
Drain V-I characteriastics for n-channel JFET:
Saturation region: ID constant,JFET works as amplifier
Breakdown region :
 If we increase value of VDS beyond VP the drain current ID remains constant,
upto certain value of VDS.and for further increase ID increases rapidly.
Ohmic region :
 ID varies with VDS
Cut – off:
 Id =0
This relationship is defined by shockley’s equation
VGS 2
ID = IDSS
1 ------VP
 The curve shows the operating limits of a JFET.
These are :
ID = O when VGS = VGS (off)
ID = IDS
when VGS = O
3. Draw the circuit of NPN transistor CE configuration and describe the static input
and Output characteristic.
 The input is applied between base and emitter, and output is taken from collector
and emitter.
 Emitter is common
Input characteristics:
Vce is constant,Increasing VBE and note corresponding Ib values
Output characteristics
1. βdc = Ic/IB.
1. Active Region:
a) Emitter base junction (IE) is forwarded biased & collector Emitter
junction (IC) is reverse biased.& IB is constant.
2. Saturation Region: Both junction is forward biased,small VCE,Rapid increase in
IC
3. Cut-Off region: IB = 0 , flow of reverse saturation current.
4.Compare the performance of a transistor in different configuration
5.
Characteristic
Common Base
Common Emitter
Common Collector
1.Input Resistance
Very low(20Ω)
low(1KΩ)
High(500KΩ)
2.Output Resistance
Very high(1MΩ)
high(40KΩ)
Low(50KΩ)
3.nput current
IE
IB
IB
4.Output current
Ic
Ic
IE
5.Input voltage applied
between
Emitter and Base
Base and Emitter
Base and Collector
6.Output voltage taken
between
Collector and Base
Collector and Emitter Emitter and collector
7.Current amplification
factor
α=Ic/IE
8.Current gain
Less than unity
β = Ic/IB.
γ= IE/IB
High (20 to few
High (20 to few hundreds)
hundreds)
Describe the static input and output characteristics of a CB transistor with neat
circuit
diagram
INPUT CHARACTERISTICS:
1.VCE constant,Vary VEB and note corresponding IE
OUTPTUT CHARACTERISTICS:

It is the curve between collector current IC and collector base voltage
VCB at constant emitter current IE
1.Active Region:
a) Emitter base junction (IE) is forwarded biased & collector base
junction (IC) is reverse biased.& IB is constant.
2.Saturation Region: Both junction is forward biased,small VCE,Rapid increase in IC
3.Cut-Off region: IB = 0 , flow of reverse saturation current.
UNIT -III
1. A common base transistor amplifier is driven by a voltage source Vs and internal
resistanceRs = 1200 Ω. The load impedance is a resistor RL of 1000 Ω . The ‘h’
parameters are given below.
Hib = 220 Ω
hrb=3x10-4 hfb = -0.98 hvb = 0.5 µ A/V compute current
gain (Ai), input impedance (Ri), voltage gain Av, input impedance (Ro) and
power gain Ap.
Current gain (Ai) = -hfb/1+h0bRL
Input resistance (Ri) = hib + hrbAiRL
2.
Voltage gain (Av) = AiRL/Ri
Output resistance (R0) = 1/hob – hfehrb/hib+Rs
Power gain (Ap) = Av x Ai
Obtain the hybrid model of CE transistor and define the hybrid parameters.
Vbe =hieIb+ hreVce
hfe = ∆Ic/∆IB|VCE Constant
hoe= ∆Ic//∆Vc|IB
Constant
, IC=hfeIb+ hoeVce
hie = ∆VBE/∆IB|VCE Constant
hre= ∆VBE //∆VCE |IB
Constant
3. For a common emitter circuit draw the h-parameter equivalent circuit and
write the
Expressions for input impedance, output impedance and voltage gain
INPUT IMPEDANCE
(Ri) = Vb/Ib
Vb = hieIb+ hreVc
Ri= hie– hrehfeRL/1 + hoeRL
OUTPUT IMPEDANCE:
Y0 = Ic/Vc with Vs=0
Ai= -Ic/Ib= -hfe/hoeRL
4.Discuss on the following JFET small signal Model
Transconductance :
ID
gm = ----VGS
=
gmo
VDS Constant
1 -
VGS
----VP
Input resistance and capacitance :
 JFET Operates with its gate source junction reverse – biased.
 The input resistance at the gate is very high
 The input resistance can then be determined using the
following equation,
VGS
RIN
=
----------IGSS
5.Draw the small signal equivalent circuit of FET amplifier in CS Connection and
derive the equations fro voltage gain, input impedance and output impedance
vds
Av = -----vgs
vo
= ------vi
Vo = -gmvgs (rd11RD),
Zi = RG
Zo = RD 11 rd
Zo = RD
AV = -gmRD
rd>>RD
UNIT IV
1. Describe the operation of common drain FET amplifier and derive the
equation for voltage gain.
Vs = VG + VGS
 When a signal is applied to the JFET gate via C1, VG varies with the signal.
 Vs = VG + VGS, VS varies with Vi.
Voltage gain Av :
Vo
Av = -------Vi
gmRs
= ---------1+ gmRs
Av
2.
In the common drain FET amplifier, let Rs = 4K, 4l = 50, rd = 35k.
evaluate the voltage gain Av
Solution
gm
=

------rd
gm (rd 11 Rs)
Av
= ---------------------1+ gm (rd 11 Rs
Ans= 0.837
3.
Draw the circuit diagram of common source FET amplifier and give the
design steps to find the component values used in the circuit
 The coupling capacitor C1 and C2 which are used to isolate the dc
biasing from the applied ac signal act as short circuits for the ac
analysis
Zi = RG
Zo = RD 11 rd
Av=Vds/Vgs=Vo/Vi
Vo=-gm Vgs (rd||RD)
Av= Vo/Vi=-gm (rd||RD), Av~-gm RD
Common source amplifier with self bias(Bypassed Rs):
Zi=RG
Zo=rd 11 RD
Av=-gm (rd||RD)
if
rD>> R D
Av=-gmRD
4.Draw the circuit of an emitter coupled differential amplifier and derive
expressions for differential gain, common mode gain, CHRR and output
impedance.
-Amplifies the difference between the two input signals is called differential
amplifier.
V0 = Ad(V1-V2)
 The difference between the inputs (V1-V2)
difference voltage and denoted as vd.
 differential gain ,Ad = V0
is generally called
Common mode Gain (AC) :
The average common level of the two inputs such an average level of
the two input signals is called common mode denoted as Vc.
 Total output differential amplifer can be expressed as ,
Vo = AdVd+AcVc
CMRR = P =
Ad
Ac
V0 = Advd [1+ 1/CMRR. Vc/Vd]
Emitter coupled differential amplifier
UNIT V
1. Draw the circuit diagram of Hartley oscillator and explain its working.
Derive the expressions for frequency of oscillator and condition for starting
of oscillation.
Anyone LC oscillator.
Hartley oscillator:
- A LC oscillator which uses two inductive reactances and one
capacitive reactance and one capacitive reactance in its feedback
network is called Hartley oscillator.
 The common emitter amplifier provides a phase shift of 1800.
 So the LC feedback network gives an additional phase of
1800,necessary to satisfy oscillation conditions.
 Equivalent Circuit
W2 = 1/c(L1+L2),
WError! Reference source not found., F =
Error! Reference source not found.
2. Derive the relation for frequency of oscillations of a crystal oscillator with
neat sketch.
 The crystals are either naturally occurring or synthetically
manufactured, exhibiting piezoelectric effect.
 The piezoelectric effect means under the influence of the
mechanical pressure, the voltage gets generated under the opposite
faces of the crystal.
 resonating frequency fr is
Fr = Error! Reference source not found.
,Q= WL/r
The resonating frequency is
Fr = Error! Reference source not
found.
F ∞ Error! Reference source not found.
3. Draw the circuit diagram and explain the principle of operation of the RC
phase shift oscillator.
:
 RC Network is used in feedback path.
 In oscillator, feedback network must introduce a phase shift of
1800to obtain total phase shift around a loop as 3600
 One RC network produces phase shift of Ø=600 then to produce
phase shift of 1800 such three RC networks must be connected in
cascade.
Transistorized RC phase shift oscillator:
 A Transistor is used as an active element of the amplifier stage.
 The output of the feedback network gets loaded due to the low
impedance (hie) of a transistor.
 Hence an emitter follower input stage before the common emitter
amplifier stage can used, to avoid the problem of low input
impedance.
 But if only single stage is to be used then the voltage shun
feedback denoted by R3 is connected in series with the amplifier
input resistance.
 A phase shifting network is a feedback network, so output of the
amplifier is given as an input to the feedback network.
4.
Explain the concept of negative feedback in amplifier. Derive the
expressions for
voltage gain, input impedance and output impedance.
 A negative feedback amplifier combines a fraction of the output
with the input so that a negative feedback opposes the original
signal.
 The applied negative feedback improves performance A n
Expression:
Fr = Error! Reference source not found.
Error! Reference source not found.
F∞
Gm= Io/vs =Io/vi
Gmf = Io/vs =Io/vi+v
Vf =β I0 = β Gmvi
Β = vf/I
Gmf= Gm/1+βGm
Rif = Vs/Ii
Rif = Vi+βGmvi/Ii = Vi(1+βGm)/Vi
Rof= Vo/I = Ro[1+βGm]
5.
Explain about frequency and amplitude stability of oscillators
Frequency stability of oscillator:
 For an oscillator, the frequency of oscillations must remain
constant.
 The analysis of the dependence of the oscillating frequency on the
various factors like stray capacitance, temperature ,etc. is called as
the frequency stability analysis.
 Ability of an oscillator to maintain the desired frequency called
frequency stability of an oscillator.
Factors affecting the frequency stability:
The factors are:
1. changes in temperature, t
2. The variation in the power supply The changes in the atmospheric
conditions, aging and unstable transistor parameters affect the
frequency.
3. The changes in the atmospheric conditions, ncy.
Amplitude Stability:
 No external input is required in case of oscillators.
 Noise voltages present across the resistance are amplified.