TECHGURU CLASSES for ENGINEERS (Your Dedication + Our Guidance = Sure Success)
CHAPTER - 1 (OP- AMP FUNDAMENTALS ) : ANALOG CIRCUIT
CHAPTER-1 : OPERATIONAL AMPLIFIER (OP-AMP)
,
The name operational amplifier coins from the application of
op-amp for specific electronic functions/operations such as
summation, scaling, differentiation and integration etc.
There are normally 20 to 30 transistors that make up an op-amp
circuit (using both Bipolar and MOS technologies.
Differential amplifiers is most widely suited for integrated circuit
design. The advatage of integrated circuit technology is the
availibility of lagre number of transistors at relatively low cost.
Figure given below shows the block diagram of typical (commercial
741-C)op-amp.
,
,
,
Emitter follower
or
with constant
Output Driver
current source
or
usually
Buffer and Level complementary
Translator
symmetry pushpull Amplifier
The circuit that can yield a precise
voltage or current which is
independent of internal influences
such as power supply and temperature
Variations (i.e. VBE, ICO, )
are called voltage reference and
current references
i.e. current mirror
,
Cascaded amplifier suffers from the major problem of drift of the
operating point due to temperature dependency of ICBO, hFE and
VBE of the transistor.
,
The function of differential amplifier is to amplify the difference
between the two signals. The need for differential amplifier arises in
many physical measurements where response from dc to many
MHz of frequency is required.
,
The main purpose of the difference amplifier stage is to provide high
gain to the difference mode signal i.e. Ad and cancel the common
mode signal i.e., low AC, to meet high CMRR.
,
There are two reasons for using differential amplifier in
preference to single-ended amplifiers-

First, differential amplifer circuits are much less sensitive to noise
and interference then single ended circuits.
LUCKNOW
0522-6563566
LUCK NOW
GORAKHPUR
9919526958
ALLAHABAD
AGRA
9919751941
9451056682
PATNA
9919751941
PERSONAL REMARK :

Ex. Inside a 741 op-amp, the last
functional block is a
(a) Differential amplifier
(b) Level shifter
(c) Class-A power amplifier
(d) Class-AB power amplifier
(ISRO-EC-2007)
Sol.(d)Inside a 741 op-amp, the last
functional block is a Class-AB
power amplifier.
Ex. A differential amplifier is used
in the input stage of Op-Amps
to achieve very high
(a) open-loop gain
(b) bandwidth
(c) slew rate
(d) CMRR
(JTO-EC-2006)
Sol.(d) Differential amplifier is
used to achieve high
CMRR
Ex. The operational amplifiers use
a differential input stage with
a constant current source,
mainly to obtain
[GATE-IN-1997]
(a) very low common mode
gain
(b) very high differential gain
(c) very low input noise
(d) very high input resistance
Sol.(b)The operational amplifiers
use a differential input stage
with a constant current source,
mainly to obtain very high differential gain.
NOIDA
SUMMER CRASH COURSE ONLINE TEST SERIES
9919751941 WINTER CRASH COURSE OFF-LINE TEST SERIES
1
TECHGURU CLASSES for ENGINEERS (Your Dedication + Our Guidance = Sure Success)
CHAPTER - 1 (OP- AMP FUNDAMENTALS ) : ANALOG CIRCUIT

,
,
Second, differential amplifier enables us to bias the amplifier and to
couple amplifier stages together without the need for by- pass and
coupling capacitors such as those utilized in the design of discrete
circuit amplifiers.
The differential amplifier as a building block of the op-amp
has the advantages of
Excellent stability

Lower cost

Higher versatility and

High immunity to interference signals

Easier fabrication as IC component.

The problem discussed in single ended amplifier can be eliminated
by using a balanced or differential amplifier (i.e., emitter-coupled
differential amplifier) as shown below.
PERSONAL REMARK :

,
DIFFERENTIAL AMPLIFIERS USING BJT
Figure shows the circuit diagram of emitter coupled Differential
amlifiers using BJT
Vcc
NOTE : For matched or
identical transistors pairs
we have
RE1 = RE2
 RC1 =

Rc
Rc
Vo1
i.e R E  R E1 // R E 2
VO2
T2
T1
RC2= RC
Rs
VCC  VEE
Rs
+
RE
Vs1 ~
–
~
+
V
– s2
–VEE
,
Differential amlifiers using BJT are broadly classified into two
types namely.
 Differential amplifier with resistive loading , and

,
Differential BJT amplifer with active loading
,
It is important to note that the performance of the differential
amplifier depends on the ideal matching characteristics of the
transistor pair T1 &T2.
The difference mode gain can be obtained by setting
V S1 =
,
VS
2
and V S2 = –
VS
2
so that the difference signal
Vd = VS1 – VS2 = VS and common mode signal VC = 0.
Differential mode gain is given by expression
ADM =
V0
1 h fe R C

for unbalanced output (A)
VS
2 (R S  h ie )
ADM =
V0
h fe R C

for balanced output (B)
VS
(R S  h ie )
LUCKNOW
0522-6563566
LUCK NOW
GORAKHPUR
9919526958
ALLAHABAD
AGRA
9919751941
9451056682
PATNA
9919751941
NOIDA
SUMMER CRASH COURSE ONLINE TEST SERIES
9919751941 WINTER CRASH COURSE OFF-LINE TEST SERIES
2
TECHGURU CLASSES for ENGINEERS (Your Dedication + Our Guidance = Sure Success)
CHAPTER - 1 (OP- AMP FUNDAMENTALS ) : ANALOG CIRCUIT
NOTE :When the output of differential amplifier is measured with
reference to ground point is called unbalanced output.

However , when the output of differential amplifier is measured
across the collectors of transistors T1 & T2 (which are
assumed to be perfectly matched ) called balanced output.



PERSONAL REMARK :
When the input is applied to both the base of the transistors
is called balanced input.
When the input is applied to one of the base of the transistors
is called unbalanced input.
NOTE :Depending upon the input and output arrangement differential
amplifier can be classified as Balanced
Input Balanced Output (BIBO) or Dual Input Dual
Output.
 Balanced
Input Unbalanced Output (BIUO) or Dual Input
Singal Output.
 Unbalanced
Input Balanced Output (UIBO) or Single Input
Dual Output.
Unbalanced
Input Unbalanced Output (UIUO) or Single Input
Single Output.
,
Common mode gain is given by expression
ACM = 
hfe RC
RS + hie + (1 + hfe ) 2RE
(C)
NOTE :Unlike ADM , ACM is same for both balanced and unbalanced
output.
,
CMRR for differential amplifier using BJT amplifier is given by
CMRR =
ADM [RS  h fe  2R E (1  h fe ) ]

ACM
(R S  hie )
....(C)
for CMRR to be large, ACM should be as small as possible,
from equation (C) it can be seen that ACM  0 as RE  .
,
There are practical limitations to made large RE, because of the
quiescent dc voltage across it. If RE is made large, the emitter supply
VEE will also have to be increased in order to maintain the proper
quiescent current.
,
Voltage gain of differential amplifier is directly proportional to the
load resistor RC. However, these are limitations to the maximum
value of RC to be used due to the following two reasons :
(i)
For larger value of RC, quiescent drop across it increases and
hence a large power supply will be required to maintain a
given quiescent collector current.
(ii)
A large value of RC requires large chip area resulting packing
density reduces.
LUCKNOW
0522-6563566
LUCK NOW
GORAKHPUR
9919526958
ALLAHABAD
AGRA
9919751941
9451056682
PATNA
9919751941
NOIDA
SUMMER CRASH COURSE ONLINE TEST SERIES
9919751941 WINTER CRASH COURSE OFF-LINE TEST SERIES
3
TECHGURU CLASSES for ENGINEERS (Your Dedication + Our Guidance = Sure Success)
CHAPTER - 1 (OP- AMP FUNDAMENTALS ) : ANALOG CIRCUIT
Ex.
A change in the value of the emitter resistance RE in a differential
amplifier
PERSONAL REMARK :

(IES-EC-2012) & (GATE-EC-1991)
(a) Affects the difference mode gain, Ad
(b) Affects the common mode gain, Ac
(c) Affects both Ad and Ac
(d) Does not affect either Ad or Ac
Sol.(b)With reference to a differential amplifier common mode gain Ac
and difference mode gain Ad is given by expression
Ad =
V0
1 h fe R C

and AC = 
VS
2 (R S  h ie )
hfe RC
RS + hie + (1 + hfe ) 2RE
Thus, we can say that a change in the value of the emitter resistance
RE in a differential amplifier affects the common mode gain AC.
OP-AMP FUNDAMENTALS
,
Op-amp have five basic terminals, i.e., two input terminals, one output
terminal and two power supply terminals.
V+
Inverting
(input terminal)
–
Output
terminal
Non-inverting
(input terminal)
V–
The V+ and V– power supply terminals are connected to two d.c.
voltage sources. The V+ pin is connected to the positive terminal of
one source and the V– pin is connected to the negative terminal of
the other source, as shown
,
Table given below shows the characteristics of an ideal opamp.
S.No.
Characteristics
Ideal value
1.
Input Resistance
Ri = 
2.
Voltage Gain
Av = 
3.
Bandwidth
BW = 
4.
Slew Rate
SR = 
5.
Common mode Rejection Ratio
CMRR = 
6.
Output resistance
R0 = 0 
7.
Offset voltage
Vof = 0 V
8.
Power supply Rejection Ratio
PSRR = 0
LUCKNOW
0522-6563566
LUCK NOW
GORAKHPUR
9919526958
ALLAHABAD
AGRA
9919751941
9451056682
PATNA
9919751941
NOIDA
SUMMER CRASH COURSE ONLINE TEST SERIES
9919751941 WINTER CRASH COURSE OFF-LINE TEST SERIES
4