ELE344, Electronics II Laboratory
LAB 8
Differential Input Pairs
Pre-Lab
Objective:
The emitter coupled pair or the source coupled pair for MOS technology forms the
quintessential gain stage of an operational amplifier (opamp). Combined with the active
load and the tail current source, this input pair is responsible for the differential gain, the
common mode rejection, the offset voltage the bandwidth and phase margin of the
opamp.
This lab familiarizes you with some important properties of differential amplifiers
such as differential gain and the common-mode gain. Since most integrated circuits
produced nowadays use MOS technology, we will realize our simple differential gain
with this technology.
Common-mode and differential-mode operation:
The common-mode input to a differential pair is the average voltage present at its 2
input, i.e., Vcm=½(Vin1+Vin2). Conversely, the differential input is the difference between
the 2 inputs, i.e., Vdm=(V in1-V in2). Figure 1a illustrates how any input can be separated
into differential and common-mode components. Figure 1b and 1c depict 2 practical setups for measuring differential and common-mode gain, respectively.
Figure 2 shows a practical implementation of a differential gain stage based on
CMOS technology.
If every transistor in figure 2 is operated in saturation, we can quite accurately
describe each transistor with 2 model parameters, the transconductance gm and the
output resistance ro. This simplified 2-parameter model leads to the following (lowfrequency) expressions for differential and common-mode gain, respectively:
Adm = gm3,4(r03,4 || r01.2) and
Acm = 1/(2r06gm1,2)
Tasks:
1. Consider figure 2 and find a value for Rref that establishes a reference current Iref of
approximately 1 mA.
2. Simulate the depicted differential gain stage with PSpice under differential-mode conditions as
shown in figure 1b. To do so, use the VQ3001 model parameter set posted on the ele344 web
page. Connect a sinusoidal source of 1 V swing to the differential gain stage as shown in
figure 1b and observe the two outputs Vo1 and Vo2 at 1 kHz, 10 kHz 100 kHz and 1 MHz.
Adjust Vs so that Vo2 swings by 1 V and record the resulting THD (Fourier analysis).
3. Simulate the gain stage under common-mode conditions as shown in figure 1c. Keep the
swing of Vs at 1 V and record the common-mode gain at the frequencies specified in task 2.
Having recorded differential and common-mode gain, compute the common-mode rejection
ratio CMRR=Adm/Acm at the given frequencies.
Experimental
1. Build the gain stage you just simulated on your Protoboard using the VQ3001 quad complementary
MOS chip as illustrated in figure 2. Verify the reference current and record the dc components of the
2 outputs Vo1 and Vo2, respectively.
2. Connect the source Vs as shown in figure 1b and record Vo1 and Vo2 at the frequencies specified in
task 2. Adjust the input swing such that Vo2 swings by 1 V at 1 kHz and see if you can detect the
second harmonic by using the FFT feature on the scope. What is the estimated value of the THD?
3. Carry out the common-mode gain measurements as shown in figure 1c and record the gain at the
specified frequencies. How do the measurements compare to you simulations?
4. Find a value for the output resistance rout of the gain stage seen an output Vo2. To do so, connect a 150
k load resistance via a 1 F cap to Vo2 and record the drop in output voltage at a frequency of 1 kHz.
Use this voltage drop to compute rout.
5. Based on your measurement of rout, find and estimate for the 2 channel length modulation factors, n
and p, respectively, if we assume that both values are approximately equal.
a)
b)
c)
Figure 1: a) Common mode (Vcm) and differential mode inputs (Vdm) of differential amplifier. b) Practical
set-up for measurement of differential gain if Adm>>Acm. c) Practical set-up for measurement of
common-mode gain Acm.
Figure 2: Source-coupled MOS transistor pair (M3, M4) with complementary active load devices (M1,
M2) and tail current source (M6). Note: We realize this circuit using 2
VQ3001 quad transistor chips as indicated by the 2 dashes boxes.
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