Analysis of Control Scheme for Unified Power Quality Conditioner to

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International Journal of Applied Engineering Research ISSN 0973-4562 Volume 11, Number 5 (2016) pp 3340-3346
© Research India Publications. http://www.ripublication.com
Analysis of Control Scheme for Unified Power Quality Conditioner to
Improve the Power Quality in Distribution System
N. C. Kotaiah
Associate Professor, Department of Electrical and Electronics Engineering,
RVR & JC College of Engineering, Chowdavaram, Guntur, Andhra Pradesh, India.
Dr. K. Chandra Sekhar
Professor, Department of Electrical and Electronics Engineering,
RVR & JC College of Engineering, Chowdavaram, Guntur, Andhra Pradesh, India.
Abstract
In this paper, a novel design of UPQC is proposed which
consists of two phase fast d-q frame theory for shunt active
filter. The performance of UPQC is analyzed with the
proposed d-q frame theory. During this analysis the series
converter of UPQC controls the supply voltage and keeps the
load voltage within the traditional worth, whereas the shunt
converter of UPQC with the proposed Id-q control scheme
takes the control of the current supply and makes the input
current within eligibly small harmonic content. With the
proposed Id-q control strategy, the UPQC can compensate
harmonic currents and the reactive power of the load in
addition to the grid voltage distortion. This device has no
harmonic interference between harmonic producing non linear
load and harmonic sensitive load that are connected to the
common bus. The operation of a UPQC with the Id-q control
technique under harmonic and reactive loads along with grid
voltage sag is investigated with Matlab/Simulink analysis.
Keywords: unified power quality conditioner (UPQC);
Instantaneous d-q theory; harmonic currents; reactive power;
voltage distortion
Introduction
The usage of power quality conditioners within the distribution
system network has more demand in the past years with the
steady increase of harmonic loads and non-linear loads which
draws the reactive power from the grid. This current drawn by
harmonic load encompasses a high harmonic content,
distorting the voltage at the utility grid and consequently
distorts the operation of sensitive loads. By employing a
unified power quality conditioner (UPQC) [1]–[2], the power
quality improves with the regulated voltage for the sensitive
loads, with low harmonic distortion and draws the sinusoidal
currents from the utility grid, although the grid voltage and the
load current have harmonic contents. The UPQC consists of
two active filters, the series active filter (SAF) and the shunt or
parallel active filter (PAF) [3], [4].The PAF is typically
controlled as a non-sinusoidal current supply, that is
accountable for compensating the harmonic current of the load,
whereas the SAF is controlled as a distorted voltage supply,
that is accountable for compensating the grid voltage. Each of
them has an effective reference value with harmonic contents,
and typically these reference values may be obtained through
advanced strategies [4], [5]. Some works show an to each
shunt and series active filters that uses sinusoidal references
without extracting much harmonic contents, so as to decrease
the complexness of the reference generation of the UPQC [7].
Diverse topologies has been proposed in literature for UPQCs
in single-phase configurations, i.e. two IGBT half bridges [8]
or multilevel topologies [9], but this paper focus on the
commonly employed general structure depicted in figure 1.
Though many control techniques and strategies had developed,
still performance of UPQC is in contradictions, and therefore
became primarily motivation for this paper. Power Quality
(PQ) mainly deals with issues like maintaining a fixed voltage
at the Point of Common Coupling (PCC) for various
distribution voltage levels irrespective of voltage fluctuations,
maintaining near unity power factor power drawn from the
supply, blocking of voltage and current unbalance from
passing upwards from various distribution levels, reduction of
voltage and current harmonics in the system [12-13].
Present paper mainly focused on instantaneous active and
reactive currents (Id–Iq) control strategy for shunt active filter
control, which is prominent one. The performance of the shunt
active filter under non-linear loading conditions is analyzed.
To validate current observations, extensive simulations are
carried out in MATLAB/SIMULINK and the results are
analyzed and presented.
UPQC and Control Strategy
Unified power quality conditioner (UPQC) happens to be the
majority widespread power conditioning equipment that can
ease both voltage and current quality problems [3, 4].By using
a unified power quality conditioner (UPQC), it is likely to
certify a regulated voltage for the loads with little harmonic
distortion. The proposed UPQC topology block diagram was
shown in figure 1. The UPQC consists of two dynamic filters,
the series active filter (SAF) and the shunt or parallel active
filter (PAF). The PAF is regularly controlled as a non
sinusoidal current source, which is responsible for
compensating the harmonic current of the load, whereas the
SAF is controlled as a non sinusoidal voltage source, which is
accountable for compensating the grid voltage. But its
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International Journal of Applied Engineering Research ISSN 0973-4562 Volume 11, Number 5 (2016) pp 3340-3346
© Research India Publications. http://www.ripublication.com
consequent control gives it incomparable attribute in terms of
collective responsibility and condensed VA rating as compared
to entity dynamic voltage restorer (DVR) [8,10] or active
power filter (APF) [6,9]. A UPQC consists of voltage source
inverters connected in cascade. Inverter 1 (Series Inverter SE)
is associated in series with the inward utility supply through a
low pass filter and a voltage injecting transformer. Inverter 2
(Shunt Inverter SH) is linked in parallel with the sensitive load,
whose power quality wants to be rigorously maintained. The
key function of SH is to supply necessary VAR support to the
load, and to restrain the load current harmonics from flowing
in the direction of the utility and it is operated in current
controlled mode. SE is liable for compensating the shortage in
voltage quality of the incoming supply, such that the load end
voltage remains insensible to the distinction of utility supply.
The UPQC considered in this paper have identical power
circuit configuration, but as the control strategies are unlike ,
the individual loading of SH and SE varies and on the whole
rating of the UPQC fluctuates, which is the thrust of this paper
and is clarified in the succeeding sections. The SE needs to be
connected to the supply side through a series injection
transformer and a low pass filter (LPF), to eradicate the high
switching frequency ripple of the inverter. The filter may insert
some phase shift, which could be load dependent, but
appropriate feedback control is to be designed to dynamically
regulate the shift, which is depicted in the control section. The
active power flow through the UPQC initiates from the utility,
as it is the only source of active power. But the reactive power
and load harmonic currents are shared between the SH and
loads first and foremost. Therefore, SH offers harmonic
separation to the utility and SE may also allocate some VAR
depending upon the control, which is expressed in the
consequent section.
Rs
LS
Vsb
Rs
LS
Vsc
Rs
LS
Vsa
V
isa t
PCC
Vdvra
ila
Vla
N
isb
Vdvrb
isc
Vlb
Vdvrc
Vlc
Rla
ilb
Rlb
ilc
Rlc
Cse
Lse
Rsw
Cse
Lse
Rsw
Cse
Cf
Cf
Cf
Lf
Lf
Lf
Figure 2: Basic architecture of three-phase - four wire shunt
active filter.
The transformation from α – β – zero frame to d–q –0 frame is
given by
𝑖0
𝑖0
1
0
0
1

[𝑖𝑑 ] =
[0 π‘π‘œπ‘ πœƒ π‘ π‘–π‘›πœƒ ] [𝑖𝛼 ]
𝑣𝛼𝛽
π‘–π‘ž
0 −π‘ π‘–π‘›πœƒ π‘π‘œπ‘ πœƒ 𝑖𝛽
If the d axis is within the direction of the voltage space vector
and the zero-sequence part is invariant, the transformation is
given by
𝑖𝑑
𝑖𝛼
[𝑖 ] = 𝐾 [𝑖 ]
(2)
𝛽
π‘ž
𝑣𝛼 𝑣𝛽
1
𝐾=
[
(3)
𝑣𝛼 ]
𝑣𝛼𝛽 −𝑣𝛽
𝑣
𝑣
𝛼
𝛽
1
𝐾=
[
]
(4)
𝑣
2 −𝑣𝛽
2
𝛼
+𝑣
√𝑣
𝛼
𝛽
Where the transformation matrix K, satisfies
‖𝐾‖ = 1 π‘Žπ‘›π‘‘πΎ −1 = 𝐾 𝑇
Lla
Llb
n
Llc
Linear load
isn
is set by the angle θ with respect to the α-β frame utilized in
the p-q theory.
iln
Lse
Each current component (Id, Iq) has an average value or dc
component and an oscillating value or ac component
Rnl
Rsw
Saa
Sbb
Scc
Vdbus
S’aa
S’bb
Sa
Cdc
S’a
Sb
Sc
Rf
Rf
S’b S’
c
Rf
Lnl
Non linear load
S’cc
ifn
Figure 1: Block diagram of the proposed UPQC topology
Shunt Converter with I d-q Controller
The block diagram of power system with basic shunt active
filter is given in figure 2 and the control circuit is shown in
figure 3. The block diagram representing how the harmonic
currents are injected and their transformation was represented
in figure 4. By using instantaneous active and reactive currents
Id-q control technique reference current can be obtained
through the non linear load. Calculations follow like the
instantaneous power theory, but direct axis and quadrature load
currents are often obtained from equation (1). Two stage
transformations provide the relation between the stationary and
rotating system with active and reactive current methodology.
The transformation angle ‘θ’ is key to all or any voltage
harmonics and unbalanced voltages; as a result dθ/dt might not
be constant. The system d-q (d- direct axis, q-quadrature axis)
𝑖𝑑 = 𝑖̅𝑑 + 𝑖̃𝑑
π‘–π‘ž = π‘–Μ…π‘ž + π‘–Μƒπ‘ž
(5)
The compensating strategy (for harmonic reduction and
reactive power compensation) assumes that the supply should
deliver the average of the direct axis element of the load
current. The reference supply current is
π‘–π‘ π‘‘π‘Ÿπ‘’π‘“ = 𝑖̅̅̅̅;
𝐿𝑑 π‘–π‘ π‘žπ‘Ÿπ‘’π‘“ = 𝑖𝑠0π‘Ÿπ‘’π‘“
(6)
In this methodology, the current magnitude changes its axes
and p-q formulation is performed on the instant active Id and
instant reactive Iq parts. If the d axis has fixed direction which
is in the direction of voltage spaces vector v and the zerosequence element of current remains in-variant, the I d-q
methodology is also expressed as follows:
𝑣𝛼
𝑖𝑑
1
[π‘–π‘ž ] =
[−𝑣𝛽
𝑣𝛼𝛽
𝑖0
0
3341
𝑣𝛽
𝑣𝛼
0
0 𝑖𝐿𝛼
0 ] [𝑖𝐿𝛽 ]
𝑣𝛼𝛽 𝑖𝐿0
(7)
International Journal of Applied Engineering Research ISSN 0973-4562 Volume 11, Number 5 (2016) pp 3340-3346
© Research India Publications. http://www.ripublication.com
AC Mains
Shunt Converter with I d-q Controller
il
is
Non-Linear
Load
V1,V2,V3
ic
Figure 5 shows the basic block diagram of series controlled
UPQC. Series controller equations:
il1, il2, il3
L
Vdref
Vdact
V1,V2,V3
Vdact
PI
Vdref
sinwt
VLoad
coswt
sinwt
PWM
generator
Gate pulse
for series
converter
coswt
PLL
ic1*, ic2*, ic3*
Park Transformation
dq- 123
icq*
abc
d,q
Park Transformation
123- dq
and harmonic current
injection
ic1, ic2, ic3
d,q
PI
abc
VLoad
Voltage
Source
Inverter
icd*
Figure 5: Block Diagram of series Controlled UPQC
ilq nh
ilq nh
iq1h+=0
iq1h+
Vdc
DC voltage
Controller
1
𝑉𝑑
2
[ π‘‰π‘ž ] = √ 0
3
π‘‰π‘œ
1
[√2
Vdc*
Figure 3: Shunt converter Id-q control circuit.
In this strategy, the supply should deliver the constant term of
the direct-axis of the load (for harmonic compensation and
power issue correction). The reference supply current is
calculated as follows:
𝑖𝑠𝑑 = 𝑖̅̅̅̅
(8)
𝐿𝑑 ; π‘–π‘ π‘ž = π‘–π‘ π‘œ = 0
𝑖𝐿𝑑 =
𝑣𝛼 𝑖𝐿𝛼 +𝑣𝛽 𝑖𝐿𝛽
𝑣𝛼𝛽
𝑃𝐿𝛼𝛽
=
𝑃𝐿𝛼𝛽
𝑣𝛼𝛽
)
=(
𝑑𝑐
𝑃𝐿𝛼𝛽
2 +𝑣 2
√𝑣𝛼
𝛽
)
2
1
2
1
√2
√2
[
π‘π‘œπ‘ π‘€π‘‘
−𝑠𝑖𝑛𝑀𝑑
]
𝑉
𝑠𝑖𝑛𝑀𝑑 π‘‰π‘Ž
] [ 𝑏]
π‘π‘œπ‘ π‘€π‘‘
𝑉𝑐
(13)
Parameter
Value
Source Voltage
320 V
Source Impedance (0.1+j0.28) Ω
DC Link Capacitance 3000µF
Load resistance
150 Ω
Load Inductance
30mH
Interfacing Inductor 8.98nH
(10)
𝑑𝑐
The subscript “dc” suggests that the mean value of the
expression inside the parentheses. Since the reference supply
current must be sinusoidal and in phase with the voltage at the
PCC (and does not have any zero-sequence component), it will
be calculated (in α-β-0 coordinate) by multiplying theta of
equation by a unit vector within the direction of PCC voltage
space vector (excluding the zero sequence components):
𝑣𝛼
1
𝑣
π‘–π‘ π‘Ÿπ‘’π‘“ = Μ…Μ…Μ…Μ…
𝑖𝐿𝑑
[ 𝛽]
(11)
𝑣𝛼𝛽
0
π‘–π‘ π›Όπ‘Ÿπ‘’π‘“
𝑣𝛼
𝑃𝐿𝛼𝛽
1
[π‘–π‘ π›½π‘Ÿπ‘’π‘“ ] = (
)
[𝑣𝛽 ]
(12)
𝑣
𝑣𝛼𝛽
𝑑𝑐 𝛼𝛽 0
𝑖𝑠0π‘Ÿπ‘’π‘“
2
−√3
Table 1: System Parameters
The dc component of the above equation will be
𝑖𝐿𝑑 = (
Μ…Μ…Μ…Μ…
−1
2
√3
MATLAB/SIMULINK Analysis
(9)
2 +𝑣 2
√𝑣𝛼
𝛽
−1
Case i: Harmonics and Reactive power compensation with
Id-q Controlled Shunt UPQC
Figure 6 shows the Simulink model of shunt UPQC controller
which provides reactive power compensation and eliminates
harmonics. Figure 7 shows the Simulink model of
instantaneous d-q controller.
Vdc
Vdc*
PI
id1h+
ila,ilb,ilc
id
Butter Worth
Low pass filter
iq
Butter Worth
Low pass filter
Park
Transformation
Abc-dq
id1h+
idnh
iq1h+
iqnh
icd*
icq*
Figure 6: Simulink model of power system network with
Harmonics and Reactive power compensation with Shunt
connected UPQC.
iq1h+=0
Figure 4: Transformation and injection of harmonic current.
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International Journal of Applied Engineering Research ISSN 0973-4562 Volume 11, Number 5 (2016) pp 3340-3346
© Research India Publications. http://www.ripublication.com
Figure 8 represents the source voltage, source currents, load
current and compensating currents from converter. At the point
of common coupling (PCC) in the source side, while
connecting any load, these connected loads at the PCC draw
non-linear currents and voltages. So by placing a converter the
source currents and voltages are compensated.
Figure 7: Simulink model of the I d-q controller.
Figure 9: Total Harmonic Distortion of Load Current shows
30.39%.
These shunt compensating devices induces compensating
currents to PCC. Thus total harmonic distortion at the PCC is
reduced which can be observed from figure 9 and figure 10.
Figure 10 indicates that the source THD is just 3.05% when
compared to load THD of 30.39% in figure 9. With this the
source currents and source voltages are not distorted by large
amount and the power factor can be improved.
Figure 10: Total Harmonic Distortion of Source Current
shows 3.05%.
Figure 11: Source Voltage and Source Current with Id-q
controlled Shunt Converter.
Figure 8: Simulated output wave form of Source voltage,
Source current, Load current and Shunt Converter current.
Figure 11 shows the source current and voltage not much
differed in their phases when the shunt compensation is used.
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International Journal of Applied Engineering Research ISSN 0973-4562 Volume 11, Number 5 (2016) pp 3340-3346
© Research India Publications. http://www.ripublication.com
Case ii: Voltage Sag compensation with Series Converter
Figure 12: Simulink model of power system network with
Voltage Sag compensation with Series connected UPQC.
The power system disturbances can also be reduced by using
series compensation. The Simulink model of power system
network with series compensation was shown in figure 12.
These series compensation devices induce voltages at the point
of coupling. These induced voltages along with source voltage
with sag and load voltage was shown in figure 13.
The sag occurs from 0.2 sec to 0.34 sec. During this time the
source voltage reduces and simultaneously the compensating
voltage is been injected by series compensator at the same
time. Thus maintaining the voltage at nominal values of
voltage can be observed from figure 13.
Case iii: Harmonics, Reactive power and Voltage
Compensation with both Series and shunt converter based
UPQC.
Shunt active filters induces compensating currents at PCC and
series filters injects voltage at PCC. Effectively reduction in
the power system disturbances are done using the combination
of both shunt and series active filters inducing both
compensating currents and a voltage respectively which is
shown in figure 15.
Figure 14: Simulink model of power system network with
Harmonics, Reactive power and Voltage sag compensation
with Shunt and Series connected UPQC.
Figure 13: Simulated output wave form of Source Voltage
with sag, Series converter injected voltage and load voltage
(pu values).
Here in this paper, while using the combination of series and
shunt converters, the sag is observed from 0.2 sec to 0.34 sec.
during this period of operation, the source voltage gets reduced
and source current increases. The load currents will be nonlinear. Now the shunt compensation device induces
compensating negative currents to compensate the voltage sag
during this period of operation.
When using the combination of shunt and series filters, the
source voltage, source current, load current and the
compensating currents were shown in figure 15. Also the
source voltage, load voltage along with the injected
compensating voltage was shown in figure 16.
At the same time the series compensation device induces
voltage during the sag period maintaining the voltage within
normal value which can be observed from figure 16 that during
the sag period, the source voltage reduces below normal value
and the compensation voltages are been injected at the same
time when sag is observed in the power system, thus
maintaining the load voltage within nominal range which is
acceptable.
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International Journal of Applied Engineering Research ISSN 0973-4562 Volume 11, Number 5 (2016) pp 3340-3346
© Research India Publications. http://www.ripublication.com
Figure 16: Simulated output wave form of Source Voltage,
Series converter injected voltage and load voltage under both
harmonic load and voltage distortion.
Conclusion
Figure 15: Simulated output wave forms of Source voltage,
Source current, Load current and Shunt converter injected
current.
The novel control scheme is proposed in the shunt converter of
UPQC. The Id-q control has the capability to compensate
voltage sags and current harmonics at the load. In Id-q
technique, angle θ is calculated directly from main voltages
and does not depend on frequency. Thus large harmonic
problems with non linear loads and distorted voltage
magnitudes are also avoided. In addition to the DC link
voltage, the voltage of UPQC has been regulated with a
steady-state error free system. The proposed method is
validated through MATLAB simulation and simulation study
shows that the source current with UPQC maintains sinusoidal
without harmonics. The proposed UPQC with Id-q controller
also mitigates the effects of voltage sags.
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International Journal of Applied Engineering Research ISSN 0973-4562 Volume 11, Number 5 (2016) pp 3340-3346
© Research India Publications. http://www.ripublication.com
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