Introduction to Circuit Theory Methods of Analysis 2012-09-12 Jieh-Tsorng Wu National Chiao-Tung University Department of Electronics Engineering Outline 1. 2. 3. 4. 5. Nodal Analysis Nodal Analysis with Voltage Sources Mesh Analysis Mesh Analysis with Current Sources Transistors 3. Methods of Analysis 2 Circuit Theory; Jieh-Tsorng Wu 1 Methods of Circuit Analysis Nodal Analysis Based on KCL. Mesh Analysis Based on KVL. Linear algebra is applied to solve the resulting simultaneous equations. 3. Methods of Analysis Circuit Theory; Jieh-Tsorng Wu 3 Nodal Analysis Circuit variables are node voltages. KVL is automatically satisfied. Steps to analyze an n-node network Select a reference node (as ground), assign voltages v1, v2,…, vn-1 for the remaining n-1 nodes. Use Ohm’s law to express currents of resistors. Apply KCL to each of the n-1 nodes. Solve the resulting equations. Earth ground 3. Methods of Analysis Chassis ground 4 Circuit Theory; Jieh-Tsorng Wu 2 Nodal Analysis Example Node 1 KCL: I1 I 2 i1 i2 (1) Node 2 KCL: I 2 i2 i3 (2) Ohm's law: v 0 i1 1 R1 i2 v1 v2 R2 or i2 G2 v1 v2 i3 v2 0 R3 or i3 G3v2 (1) I1 I 2 G1v1 G2 v1 v2 (3) (2) I 2 G2 v1 v2 G3v2 (4) G G2 1 G2 3. Methods of Analysis or i1 G1v1 G2 v1 I1 I 2 G2 G3 v2 I 2 5 Circuit Theory; Jieh-Tsorng Wu Matrix Equation a b v1 I1 Av I c d v I 2 2 I v1 1 1 A v A 1I v I 2 2 a b 1 d b 1 A A ad bc c a c d 3. Methods of Analysis 6 Circuit Theory; Jieh-Tsorng Wu 3 Nodal Analysis Example v1 v3 v1 v2 3v1 2v2 v3 12 4 2 v v v v v ix i2 i3 1 2 2 3 2 4v1 7v2 v3 0 2 8 4 v v v v v v i1 i2 2ix 1 3 2 3 2 1 2 2v1 3v2 v3 0 4 8 2 3 i1 ix 3 3. Methods of Analysis Circuit Theory; Jieh-Tsorng Wu 7 Nodal Analysis with Voltage Sources If a voltage source is connected between a non-reference node and the reference node (or ground). The node voltage is defined by the voltage source. Number of variables is reduced. If a voltage source is connected between two non-reference nodes. The two nodes form a supernode. Use one voltage variable for both nodes. The voltage difference between these two nodes is known. Apply KCL to the supernode. 3. Methods of Analysis 8 Supernode Circuit Theory; Jieh-Tsorng Wu 4 Super Node Example 1 v1 10 v2 v3 5 i1 i4 i2 i3 3. Methods of Analysis v1 v2 v1 v3 v2 v3 2 4 8 6 9 Circuit Theory; Jieh-Tsorng Wu Super Node Example 2 v2 v1 2 2 i1 i2 7 2 3. Methods of Analysis v1 v2 7 3v1 22 2 4 10 Circuit Theory; Jieh-Tsorng Wu 5 Super Node Example 3 v1 v2 20 v3 v4 3vx v4 3(v1 v4 ) 3v1 2v4 v3 v2 v1 v4 v1 6 3 2 v1 v4 v3 v2 v4 v3 3 6 1 4 10 i3 i1 i2 10 i1 i3 i4 i5 3. Methods of Analysis 11 Circuit Theory; Jieh-Tsorng Wu Mesh A mesh is a loop which does not contain any other loops within it. 3. Methods of Analysis 12 Circuit Theory; Jieh-Tsorng Wu 6 Mesh Analysis Circuit variables are mesh current. KCL is automatically satisfied. Steps to analyze an n-mesh network Assign mesh currents i1, i2, …, in to the n meshes. Use Ohm’s law to express voltages of resistors.. Apply KVL to each of the n meshes. Solve the resulting equations. Mesh analysis is only applicable to a circuit that is planar. A planar circuit is one that can be drawn in a plane with no branches crossing on another. 3. Methods of Analysis 13 Circuit Theory; Jieh-Tsorng Wu Planar and Nonplanar Circuits 3. Methods of Analysis 14 Circuit Theory; Jieh-Tsorng Wu 7 Mesh Analysis Example V1 R1 I1 R3 I 3 0 V1 R1i1 R3 (i1 i2 ) 0 ( R1 R3 )i1 R3i2 V1 R3 I 3 R2 I 2 V2 0 R3 (i1 i2 ) R2i2 V2 0 R3i1 ( R2 R3 )i2 V2 R1 R3 R 3 R3 i1 V1 R2 R3 i2 V2 3. Methods of Analysis 15 Circuit Theory; Jieh-Tsorng Wu Mesh Analysis Example 24 10(i1 i2 ) 12(i1 i3 ) 0 11i1 5i2 6i3 12 10(i2 i1 ) 24i2 4(i2 i3 ) 0 5i1 19i2 2i3 0 12(i3 i1 ) 4(i3 i2 ) 4 I o 0 I o i1 i2 i1 i2 2i3 0 11 5 6 i1 12 5 19 2 i 0 2 1 1 2 i3 0 3. Methods of Analysis 16 Circuit Theory; Jieh-Tsorng Wu 8 Mesh Analysis with Current Sources If a current source exists only in one mesh. The mesh current is defined by the current source. Number of variables is reduced. If a current source exists between two meshes. The two nodes form a supermesh. Use one current variable for both meshes. The current difference between these two meshes is known. Apply KVL to the supermesh. 3. Methods of Analysis Circuit Theory; Jieh-Tsorng Wu 17 Mesh Analysis with Current Source Example i1 i2 i2 5 10 4i1 6(i1 i2 ) 0 i1 2 A 3. Methods of Analysis 18 Circuit Theory; Jieh-Tsorng Wu 9 Supermesh Example i2 i1 5 i2 i1 5 i2 i3 3I o I o i4 i3 i1 3i4 5 2i1 4i3 8(i3 i4 ) 6i2 0 8(i4 i3 ) 2i4 10 0 3. Methods of Analysis Circuit Theory; Jieh-Tsorng Wu 19 Supermesh Example i1 i2 3 i1 i2 3 6 2(i1 i3 ) 4(i2 i3 ) 8i2 0 7i2 3i3 0 2i3 4(i3 i2 ) 2(i3 i1 ) 0 3i2 4i3 3 3. Methods of Analysis 20 Circuit Theory; Jieh-Tsorng Wu 10 Nodal Analysis or Mesh Analysis Select the method that results in the smaller number of equations. Nodal Analysis More parallel-connected elements, voltage sources, or supernodes. Nnode < Nmesh If node voltages are required. Mesh Analysis More series-connected elements, current sources, or supermeshes. Nmesh < Nnode If branch currents are required. 3. Methods of Analysis 21 Circuit Theory; Jieh-Tsorng Wu Transistors 3. Methods of Analysis 22 Circuit Theory; Jieh-Tsorng Wu 11 An npn Bipolar Junction Transistor (BJT) VCE VCB VBE (KVL) I E I B IC (KCL) Transistor in active mode VBE 0.7 V VCB 0 IC I B I E 1 I B IC I E 1 100 0 1 3. Methods of Analysis Circuit Theory; Jieh-Tsorng Wu 23 Amplifier Example 1 4 200k I B 0.7 0 IB 4 0.7 165 A 200k IC I B 50 I B 8.25 mA 6 100 I C vo 0 3. Methods of Analysis vo 6 100 I C 5.175 V 24 Circuit Theory; Jieh-Tsorng Wu 12 Amplifier Example 2 V1 V 2 1 0 V1 0.7 I B 9.5 A 200k 100k v o 16 1k I C 16 1k I B 16 1k 150 9.5 14.575 V IB 3. Methods of Analysis 25 Circuit Theory; Jieh-Tsorng Wu 13