ECE-343 Test 1: Feb 9, 2011, 6:00-8:00pm, Closed Book
Name : SOLUTION
1. In the circuit shown below, assume that base currents can be neglected (β is large), and neglect the Early effects
and body effects. All transistors are matched to each other, except that the W/L ratios of the MOSFETs are as
indicated. Assume k 0 = 2 mA/V2 and Vt = 0.5 V for all MOSFETs. For parts 1a and 1b, assume all MOSFETs
are saturated, and all BJTs are forward-active.
(a) Find the value of the resistor R so that I1 = 500 µA.
Solution: There’s a 3.6 V drop across the resistor R. For I1 = 0.5 mA, use R = (3.6 V)/(0.5 mA) = 7.2 kΩ
(b) Assuming that I1 = 500 µA, give the values of all other labeled voltages and currents.
Solution:
I1 = 500 µA
I2 = 0.5 mA
I3 = 1 mA
I4 = 2 mA
V1 = 4.3 V
V2 = 4.75 V
V3 = 4.5 V
V4 = −0.7 V
V5 = −3.25 V
V6 = 4 V
V2 and V3 come from the branch currents of 0.25 mA (each branch gets half of I2 ). I4 is twice I3 , since M2 and
M4 share the same gate-to-source voltage, but M2 has twice the W/L ratio. The gate voltages of the MOSFETs
come from the calculated values of VGS for M4 and M3 :
1
(2 mA/V2 )(4)(VGS4 − Vt )2 = 1 mA
2
1
(2 mA/V2 )(16)(VGS3 − Vt )2 = 1 mA
2
−→
VGS4 = 1 V
−→
−→
VGS3 = 0.75 V
VG4 = −5 + VGS4 = −4 V
−→
VG3 = −4 + VGS3 = −3.25 V
(c) Verify that MOSFETS M1 and M2 are saturated.
Solution: Since M1 and M2 carry the same current, and are the same size, they’ll have the same gate-to-source
voltage (1 V, determined from VGS4 ). Working from the value of VG3 given above, The source of M1 (and the
drain of M2 ) is found to be −4.25 V. M2 has VGS = 1 V > Vt , and VGD2 = 0.25 V < Vt , so it’s pinched off
(saturated). M1 has VGS = 1 V > Vt , and VGD1 = −7.25 V < Vt , so it’s also pinched off (saturated).
2. The circuit below shows a CMOS inverter, in which the input and output have been connected using a large
resistor R.
kp0
W
L
= kn0
M1
W
L
= 1 mA/V2
|Vt1 | = Vt2 = 0.5 V
M2
VA1 = 20 V, VA2 = 30 V
(a) Neglect channel-length modulation, and solve for the bias voltages at all circuit nodes, and the drain
currents for all transistors. (Assume that the input and output signals are left disconnected.) Use these
values to determine the small-signal parameters for all transistors.
(b) Use a small-signal analysis to derive the open-circuit voltage gain vout /vin and the input resistance Rin
of the amplifier. Give your result symbolically in terms of the small signal parameters and the value of the
resistance R. Then, give numerical values based on your results from part 2a and R = 1 MΩ.
(c) Now assume that the input is driven (through a large coupling capacitor) by a source vsig having a source
resistance of 100 kΩ. Using your results from part 2b, evaluate the voltage gain vout /vsig .
(d) For what range of the output signal does M1 and M2 remain in saturation?
Solution:
(a) M1 and M2 carry the same current, so
1 0 W
1 0 W
2
kn
VOV
=
k
V2
2
2
L M2
2 p L M 1 OV 1
−→
VOV 2 = VOV 1
This requirements determines the gate voltage
VG − (−1.5 V) − Vt2 = (+1.5 V) − VG − |Vt1 |
−→
VG = 0 V.
Since there’s no gate current, VOU T = VG = 0 V. With the gate voltage determined at 0 V, the overdrive
voltage for both transistors is VOV 1 = VOV 2 = 1 V, giving
ID1 = ID2 =
1
1 mA/V2 (1 V)2 = 0.5 mA
2
The small signal parameters are
gm1 = gm2 = k 0 (W/L)VOV = (1 mA/V2 )(1 V) = 1 mA/V
20 V
ro1 =
= 40 kΩ
0.5 mA
ro1 =
30 V
= 60 kΩ
0.5 mA
(b) The small signal model shown on the left below is simplified by noting that vgs2 = −vsg1 = vin . The
simplified model is shown on the right.
Use KCL at the output node to relate the input and output voltages:
(gm1 + gm2 )vin +
vout
vout − vin
+
=0
ro1 k ro2
R
Solving for the open circuit gain gives
Av =
vout
= −(gm1 + gm2 − 1/R)(R k ro1 k ro2 )
vin
The input current is iin = (vin − vout )/R = (vin − Av vin )/R, so
Rin =
vin
R
R
=
=
iin
1 − Av
1 + (gm1 + gm2 − 1/R)(R k ro1 k ro2 )
Substituting the above small-signal parameters, with R = 1 MΩ gives
Av = −(1.999 mA/V )(23.4 kΩ) = −46.85 V/V
Rin =
1 MΩ
= 20.9 kΩ
47.85
(c) Use voltage division to find vin /vsig , and then scale the result by the gain vout /vin :
vout
20.9 kΩ
(−46.85) = −8.1
=
vsig
100 kΩ + 20.9 kΩ
(d) M1 is saturated when vOU T < 0.5 V. M2 is saturated if vOU T > −0.5 V:
−0.5 V < vOU T < +0.5 V
NOTE: Problem 3 is all about recognizing some fundamental amplifier types, understanding their
properties and how to use those properties in a more complicated circuit. You could solve this
problem by substituting small-signal models for all transistors, writing node and mesh equations,
and crunching through a lot of algebra. Please don’t. I won’t grade it. Show me your smallsignal analysis skills on problem 2. Instead, show me that you understand the various amplifiers and
amplifier properties.
3. For the two-stage amplifier shown below, neglect the body effect, and assume that
W
= 2 mA/V2
(VA )M 1 = (VA )Q2 = 40 V
Vt = 1 V
kn0
L M1
βQ2 = 200
(a) In determining the bias currents/voltages, neglect the Early effect on both devices, and neglect the base
current in Q2 . Determine the drain current in M1 , and select a resistor value R1 so that the collector
current in Q2 is 1 mA.
(b) Determine the small-signal parameters of M1 and Q2 at their bias points.
(c) For the purpose of evaluating the voltage gain Av = vout /vin , you can safely neglect the resistor RF .
Calculate the gain, input, and output resistance of each stage (formed by M1 and Q2 respectively), and
find the voltage gain Av = vout /vin .
(d) Noting that RF is connected between the input node where the voltage is vin , and the output node where
the voltage is Av vin , find Rin and the overall voltage gain vout /vsig .
Solution:
(a) Since the base of Q2 is at 0.7 V, The current in M1 can be calculated as ID1 = (0.7 V)/(6.8 kΩ) = 103 µA.
Given the drain current, the gate voltage of M1 can be determined:
1
(2 mA/V2 )(VG − 0.7 − Vt )2 = 0.103 mA
2
−→
VG = 2.016 V ≈ 2 V
(M1 has an overdrive voltage of VOV = 2.016 − 0.7 − Vt = 0.316 V.) Since there’s no current in RF , the
collector of Q2 is also at 2 V. So for a 1 mA collector current, set
R1 =
5V−2V
= 3 kΩ
1 mA
(b)
M1 :
gm1 = k 0 (W/L)VOV = (2 mA/V2 )(0.316 V) = .632 mA/V
Q2 :
gm2 =
IC
1 mA
= .03875 A/V
=
VT
25.8 mV
ro2 =
40 V
= 40 kΩ
1 mA
ro1 =
40 V
= 388.3 kΩ
103 µA
rπ = β/gm2 = 5.16 kΩ
(c) First, the common-drain amplifier:
Rin1 = ∞
gm1 (6.8 kΩ k ro1 )
4.3
=
= 0.81 V/V
1 + gm1 (6.8 kΩ k ro1 )
5.3
= 6.8 kΩ k (1/gm1 ) k ro1 = 6.8 kΩ k 1.58 kΩ k 388.2 kΩ = 1.28 kΩ.
Av1 =
Rout1
The second stage is a common-emitter amplifier
Rin2 = rπ = 5.16 kΩ
Av2 = −gm2 (750 Ω k ro2 ) = −(.03875 A/V)(736 Ω) = −28.52 V/V
Rout2 = 736 Ω.
To get the overall gain, use voltage division to account for the losses in coupling the stages.
vout
5.16
Av =
= (0.81)
(−28.52) = −18.5 V/V
vin
5.16 + 1.28
As an alternative, the 1 kΩ load resistor does not need to be included in the second stage description. In this case, you’ll get Rout2 = 2.79 kΩ, Av2 = −108.14 V/V. You’ll also need to do an
additional voltage division to account for the losses between the second-stage output and the 1 kΩ
load in finding vout /vin .
5.16
1 kΩ
vout
Av =
= (0.81)
(−108.14)
= −18.5 V/V
vin
5.16 + 1.28
1 kΩ + 2.79 kΩ
(d) Solve for the input current in terms of the input voltage:
iin =
vin − (−18.5)vin
19.5
=
vin
R
R
Rin =
vin
10 MΩ
R
=
= 512.8 kΩ
=
iin
19.5
19.5
For a 100 kΩ source input impedance, use voltage division with Rin to find the overall gain:
vout
512.8 kΩ
(−18.5) = −15.5 V/V
=
vsig
100 kΩ + 512.8 kΩ
iC = αiE = βiB = Is e
vBE /VT
vCE
1+
VA
W
1 2
(vGS − Vt )vDS − vDS
L
2
0
k W
=
(vGS − Vt )2 (1 + λvDS )
2 L
VT =
iD = k 0
k 0 = µn Cox
iD
λ=
IC
gm =
VT
β
rπ =
gm
VA + |VCE |
VA
r0 =
≈
IC
IC
α
re =
gm
kT
≈ 25.8 mV at T = 300 K
q
1
1
λ0
=
VA
L
α=
β
β+1
W
W
(VGS − Vt ) = k 0 VOV
rDS
L
L
hp
i
p
Vt = Vt0 + γ
2φf + VSB − 2φf
= k0
gm = k 0
p
W
2ID
VOV =
= 2k 0 (W/L)ID
L
VOV
VA + |VDS |
VA
r0 =
≈
ID
ID
gmb
!
γ
p
=
gm
2 2φf + |VSB |
|
{z
}
χ
−gm (RC k ro )
1 + gm (RC k ro )RE /RC
Avo =
large
r0
−gm RC
1 + gm RE
Ais = β
≈
large
g m RE
≈
R ≈ rπ + (β + 1)RE
−RC
RE
Rin = rπ + (β + 1)RE
Rout = RC k {ro + (1 + gm ro )(RE k rπ )}
R≈
rπ + RB
RB
= re +
β+1
β+1
RE k ro
≈1
re + RE k ro
Ais = β + 1
Avo =
Rin = rπ + (β + 1)(RE k ro )
Rout = re k RE k ro ≈ re
R = r0 + (1 + gm r0 )(RE k rπ )
With a base resistor, RB is added to rπ , and gm
is scaled by rπ /(rπ + RB ):
Avo = gm (ro k RC )
Ais = α ≈ 1
RC
gm ro
= RC k ro
Rin = re +
Rout
r0 RC
≈
re
1
RC
k r0 +
gm
1 + gm r0
r0 RC
1
RC
1
≈ rπ k
+
≈ rπ k
= re
gm
gm r0
gm
R = rπ k
With a base resistor, RB is added to rπ , and gm
is scaled by rπ /(rπ + RB ):
Avo =
−gm (RD k ro )
1 + gm (1 + χ)(RD k ro )RS /RD
large
r0
−gm RD
≈
1 + gm (1 + χ)RS
Ais = ∞
large
g m RE
≈
−RD
(1 + χ)RS
0
Use gm
= gm + gmb = (1 + χ)gm :
0
R = r0 + (1 + gm
r0 )RS
Rin = ∞
Rout = RD k {ro + (1 + gm (1 + χ)r0 )RS }
0
Use gm
= gm + gmb = (1 + χ)gm :
gm (RS k ro )
1
Avo =
≈
1 + gm (1 + χ)(RS k ro )
1+χ
Ais = ∞
Rin = ∞
Rout =
1
1
k RS k ro ≈
gm (1 + χ)
gm (1 + χ)
Avo = gm (1 + χ)(RD k ro )
Ais = 1
1
RD
+
gm (1 + χ) gm (1 + χ)ro
r0 RD
1
≈
gm (1 + χ)
= RD k ro
Rin =
Rout
1
RD
k r0 +
0
0 r
gm
1 + gm
0
1
RD r0 RD 1
≈ 0 + 0
≈
0
gm
gm r0
gm
R=