Section J8b: FET Low Frequency Response
In this section of our studies, we’re going to revisit the basic FET amplifier
configurations – but with an additional twist. The basic configurations are
the same as we investigated in Section J6 of the WebCT notes, with the
similarities and differences as noted in the table below:
Then
Now
External capacitors
Non-ideal (keep in
(bypass & coupling) Ideal (short for ac)
small signal circuit)
Transistor output
Very large
OK, we’ll
resistance, ro
may usually be ignored keep this one
Input and output
Resistances
Impedances
characteristics
(Rin, Rout)
(Zin, Zout)
FET Approximations iG=0, so iS≈iD
OK, unless otherwise
noted
Just like we did for the BJT configurations, we’re going to start by looking at
each of the basic amplifier stages in terms of analysis and finish with
strategies for designing for a specific low frequency characteristic. All
amplifiers are presented as capacitive-coupled to stages that may occur
before and after. Recall that this is the easiest way to ensure dc isolation,
but may not be feasible in certain circumstances or under certain conditions.
Note: in the circuits that follow, the actual signal source (vS) and its
associated source resistance (RSource) have been included. Previously, we
knew that this source and resistance was there but we just started our
investigations with the input to the transistor (vin). This should not cause too
much heartburn – the analysis process is the same and the relationship
between vS and vin is a voltage divider. Since we’ve already got an RS in FET
circuits (in the source leg), don’t get confused between the source of the
transistor itself and the resistance associated with the signal source (shown
as R). Sorry, I know it’s confusing!
Low Frequency Response of the Common-Source Amplifier
To facilitate the analysis of the FET amplifier configurations, the most
complicated configuration is addressed first. This will allow us to determine
all time constants and the analysis of the simpler configurations will involve
the elimination of appropriate terms. Also recall that JFET and MOSFET
circuits are analyzed in the same way – this also holds here in that the time
constants do not depend on the type of FET.
The JFET implementation of the common-source amplifier is given to the left
below, and the modified small signal model is to the right below (based on
Figures 10.9a and 10.9b of your text).
Setting the input source, vS, equal to
zero results in the circuit given to
the right that we will use for analysis
purposes. Using this circuit, and the
observation that the dependent
current source is opened since
vGS=0, we can find the equivalent
resistances seen by CG, CD, and CS
(our old friend, the Method of Short
Circuit Time Constants).
¾ CG: Setting CD and CS equal to infinity (short circuits), the equivalent
resistance seen by CG is
RCG = R + RG = R + Rin ,
where Rin=RG for the CS configuration.
¾ CD: Letting the impedance of CG and CS be equal to zero, the equivalent
resistance seen by CD is
RCD = RD + RL .
¾ CS: Letting the impedance of CG and CD be equal to zero, the equivalent
resistance seen by CS is
⎛
1
RCS = RS2 ⎜⎜ RS1 +
gm
⎝
⎞
⎟⎟ .
⎠
Note that, just as for the case of the common-emitter amplifier, the bypass
capacitor introduces a zero at (ω ZCS = 1 τ ZCS = 1 C S RS ) . The coupling
capacitors each introduce a zero at zero frequency.
The time constants for the CS amplifier are therefore defined by
τ CG = C G RCG ;
τ CD = C D RCD ;
τ CS = C S RCS ,
and the lower corner frequency is crudely approximated by
ω L ≅ ω P CG + ω PCD + ω PCS =
=
1
τ CG
+
1
τ CD
1
1
+
+
C G (R + RG ) C D (RD + RL )
+
1
τ CS
=
1
1
1
+
+
C G RCG C D RCD C S RCS
1
⎛
⎛
1
C S ⎜⎜ RS2 || ⎜⎜ RS1 +
gm
⎝
⎝
,
⎞⎞
⎟⎟ ⎟
⎟
⎠⎠
with a better approximation given by
ω L ≈ ω P 1 + ω P22 + L − 2(ω Z2 1 + ω Z2 2 + L)
2
The midband voltage gain for the common-source amplifier, where only part
of the source resistance is bypassed, is given by
Avmidband
⎛
⎞
⎜ − (RD || RL ) ⎟⎛ Rin
=⎜
⎟⎜⎜
⎜ RS1 + 1 g ⎟⎝ R + Rin
m ⎠
⎝
⎞ ⎛ − g m (RD || RL ) ⎞⎛ RG
⎟⎟⎜⎜
⎟⎟ = ⎜⎜
⎠ ⎝ 1 + g m RS1 ⎠⎝ R + RG
⎞
⎟⎟ ,
⎠
and the normalized frequency dependent gain expression is given by
s 2 (s + ω ZCS )
Av (s)
.
=
(s + ω CG )(s + ω CD )(s + ω CS )
Avmidband
Low Frequency Response of the Source-Follower Amplifier
The generic circuit for the FET SF amplifier using an n-channel JFET is
illustrated in the figure to the left below. The modified small signal
equivalent circuit is shown below and to the right (based on Figures 10.12a
and 10.12b of your text).
The source-follower, or commondrain, FET amplifier is similar to
the
EF
amplifier,
its
BJT
counterpart. It also has two time
constants, one of which is much
larger than the other. The circuit
used to derive the time constants
of the circuit capacitors is given
to the right.
¾ CG: The equivalent resistance seen by the coupling capacitor CG is found
by setting CS equal to infinity, or
RCG = R + RG = R + Rin ,
where the input resistance for an SF amplifier was previously defined as
RG.
¾ CS: The equivalent resistance seen by the coupling capacitor CS is equal
to
RCS = RL +
RS
.
1 + g m RS
Note that this equivalent resistance is not directly observable from the
above figure. Instead, the Thevenin voltage and current are defined, with
the equivalent resistance being equal to the Thevenin resistance.
Design for a Given Frequency Characteristic
Designing an FET amplifier for a specified low frequency response is as
outlined in Section H3 for BJT amplifiers and is reproduced following:
¾ Approach 1: If the poles can be separated by at least a decade, we let
one dominant pole produce the entire 3dB drop. This is similar to the case
of a single pole, since there is virtually no interaction between the two. As
the frequency goes to zero, the dominant pole (at the higher frequency)
will define the corner frequency before the second pole begins to take
effect.
¾ Approach 2: If the input and output resistances are approximately
equal, we set the two pole frequencies to be equal; i.e., we have a
double pole. This means that each pole contributes evenly at the break
point or, equivalently, that each pole contributes a 1.5dB drop so that the
total decrease will be 3dB at the desired corner frequency. For example, a
normalized voltage gain expression with each pole at frequency ωP, is
given by
⎛ s
Av (s)
s2
⎜⎜
=
=
Avmidband
(s + ω P )2
⎝ s + ωP
2
⎞
⎟⎟ .
⎠
If we further specify that we want this normalized gain to have a
magnitude of 0.707 (-3dB) at a corner frequency ω0,
Av ( jω )
Avmidband
ω =ω 0
⎛
jω
= ⎜⎜
⎝ jω + ω P
⎞
⎟⎟
⎠
2
=
ω =ω 0
ω 02
ω +ω
2
0
2
P
=
1
2
.
Solving for the frequency of the double pole in terms of the specified
corner frequency, we get
ωP =
ω0
1.55
.
(Equation 10.14)
Note that the actual frequency of the double pole is below the specified
design corner frequency. This is to be expected, since the poles are
interacting – if each had been located at ω0, there would have been a 6dB
drop instead of the 3dB desired.
¾ Approach 3: The first two approaches achieved the desired corner
frequency by controlling pole placement. In contrast, this method chooses
equal capacitor values, a technique that will allow for interchanging of
components. Again restricting ourselves to a two-pole system with pole
frequencies ωP1 and ωP2, we set the expression for the normalized gain
magnitude equal to 0.707 ( = 1 2 ) at the specified corner frequency, ω0:
Av (s)
Avmidband
ω =ω0
( jω)2
=
=
( jω + ω P1 )( jω + ω P 2 ) ω =ω
0
ω 02
ω +ω
2
0
2
P1
ω +ω
2
0
=
2
P2
1
2
.
Solving the above expression for ω0, we get
ω 04 = ω 02 (ω P21 + ω P22 ) + ω P21ω P22 .
If ωP1 and ωP2 are both less than ω0, the last term in the above expression
may be neglected and we can solve for ω0 as
ω 0 = ω P21 + ω P22 .
(Equation 10.17, Modified)
Once we get to this point, it depends on the actual composition of the
time constants associated with ωP1 and ωP2. The strategy is to set the
capacitors of each pole equal. Knowing the resistive components in the
equivalent resistances and the desired corner frequency, the capacitor
value is the only unknown in Equation 10.17 (the modified version above)
and may be calculated.