Isolated, Precision Half-Bridge
Driver, 0.1 A Output
ADuM1233
FEATURES
GENERAL DESCRIPTION
Isolated high-side and low-side outputs
High side or low side relative to input: ±700 VPEAK
High-side/low-side differential: 700 VPEAK
0.1 A peak output current
High frequency operation: 5 MHz maximum
High common-mode transient immunity: >75 kV/μs
High temperature operation: 105°C
Wide body, 16-lead SOIC
UL1577 2500 V rms input-to-output withstand voltage
The ADuM1233 1 is an isolated, half-bridge gate driver that
employs the Analog Devices, Inc., iCoupler® technology to
provide independent and isolated high-side and low-side
outputs. Combining high speed CMOS and monolithic
transformer technology, this isolation component provides
outstanding performance characteristics superior to
optocoupler-based solutions.
By avoiding the use of LEDs and photodiodes, this iCoupler
gate drive device is able to provide precision timing characteristics
not possible with optocouplers. Furthermore, the reliability and
performance stability problems associated with optocoupler
LEDs are avoided.
APPLICATIONS
Isolated IGBT/MOSFET gate drives
Plasma displays
Industrial inverters
Switching power supplies
In comparison to gate drivers employing high voltage level
translation methodologies, the ADuM1233 offers the benefit of
true, galvanic isolation between the input and each output. Each
output can be operated up to ±700 VPEAK relative to the input,
thereby supporting low-side switching to negative voltages. The
differential voltage between the high side and low side can be as
high as 700 VPEAK.
As a result, the ADuM1233 provides reliable control over the
switching characteristics of IGBT/MOSFET configurations over
a wide range of positive or negative switching voltages.
1
Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; 7,075,329; and
other pending patents.
FUNCTIONAL BLOCK DIAGRAM
VIA 1
ENCODE
DECODE
VDD1 3
15 VOA
14 GNDA
GND1 4
13 NC
DISABLE 5
12 NC
NC 6
NC 7
11 VDDB
ENCODE
VDD1 8
DECODE
10 VOB
9
GNDB
06271-001
VIB 2
16 VDDA
Figure 1.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2006–2007 Analog Devices, Inc. All rights reserved.
ADuM1233
TABLE OF CONTENTS
Features .............................................................................................. 1
Recommended Operating Conditions .......................................4
Applications....................................................................................... 1
Absolute Maximum Ratings ............................................................5
General Description ......................................................................... 1
ESD Caution...................................................................................5
Functional Block Diagram .............................................................. 1
Pin Configuration and Function Descriptions..............................6
Revision History ............................................................................... 2
Typical Perfomance Characteristics................................................7
Specifications..................................................................................... 3
Applications Information .................................................................8
Electrical Characteristics............................................................. 3
Common-Mode Transient Immunity ........................................8
Package Characteristics ............................................................... 4
Outline Dimensions ....................................................................... 10
Regulatory Information............................................................... 4
Ordering Guide .......................................................................... 10
Insulation and Safety-Related Specifications............................ 4
REVISION HISTORY
12/07—Rev. A to Rev. B
Changes to Note 1............................................................................. 1
Change to Minimum Pulse Width ................................................. 3
4/07—Rev. Sp0: Rev. A
Changes to Figure 1.......................................................................... 1
Changes to Figure 7.......................................................................... 7
Updated Outline Dimensions ....................................................... 10
7/06—Revision Sp0: Initial Version
Rev. B | Page 2 of 12
ADuM1233
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
All voltages are relative to their respective ground. 4.5 V ≤ VDD1 ≤ 5.5 V, 12 V ≤ VDDA ≤ 18 V, and 12 V ≤ VDDB ≤ 18 V. All minimum/maximum
specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at TA = 25°C,
VDD1 = 5 V, VDDA = 15 V, and VDDB = 15 V.
Table 1.
Parameter
DC SPECIFICATIONS
Input Supply Current (VDD1 Pins)
Quiescent
10 Mbps
Output Supply Current (VDDA and VDDB Pins)
Quiescent
10 Mbps
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Output Short-Circuit Pulsed Current 1
SWITCHING SPECIFICATIONS
Minimum Pulse Width 2
Maximum Switching Frequency 3
Propagation Delay 4
Change vs. Temperature
Pulse Width Distortion, |tPLH − tPHL|
Channel-to-Channel Matching,
Rising or Falling Edges 5
Channel-to-Channel Matching,
Rising vs. Falling Edges 6
Part-to-Part Matching, Rising or Falling Edges 7
Part-to-Part Matching, Rising vs. Falling Edges 8
Output Rise/Fall Time (10% to 90%)
Symbol
Typ
Max
Unit
IDDI(Q)
IDDI(10)
3.0
6.0
4.2
9.0
mA
mA
IDDA(Q), IDDB(Q)
IDDA(10), IDDB(10)
IIA, IIB, IDISABLE
VIH
VIL
VOAH, VOBH
0.3
16
+0.01
1.2
22
+10
mA
mA
μA
V
V
V
VOAL, VOBL
IOA(SC), IOB(SC)
Min
−10
2.0
0.8
VDDA − 0.1,
VDDB − 0.1
VDDA, VDDB
tPHL, tPLH
10
97
PWD
tR/tF
1
124
100
CL = 200 pF
0 ≤ VIA, VIB, VDISABLE ≤ VDD1
IOA, IOB = −1 mA
0.1
V
mA
IOA, IOB = +1 mA
80
8
5
ns
Mbps
ns
ps/°C
ns
ns
CL = 200 pF
CL = 200 pF
CL = 200 pF
CL = 200 pF
CL = 200 pF
CL = 200 pF
13
ns
CL = 200 pF
55
63
25
ns
ns
ns
CL = 200 pF, input tR = 3 ns
CL = 200 pF, input tR = 3 ns
CL = 200 pF
100
PW
Test Conditions
160
Short-circuit duration less than one second.
The minimum pulse width is the shortest pulse width at which the specified timing parameters are guaranteed.
3
The maximum switching frequency is the maximum signal frequency at which the specified timing parameters are guaranteed.
4
tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5
Channel-to-channel matching, rising or falling edges is the magnitude of the propagation delay difference between two channels of the same part when the inputs
are either both rising or falling edges. The supply voltages and the loads on each channel are equal.
6
Channel-to-channel matching, rising vs. falling edges is the magnitude of the propagation delay difference between two channels of the same part when one input is
a rising edge and the other input is a falling edge. The supply voltages and loads on each channel are equal.
7
Part-to-part matching, rising or falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when the inputs
are either both rising or falling edges. The supply voltages, temperatures, and loads of each part are equal.
8
Part-to-part matching, rising vs. falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when one input
is a rising edge and the other input is a falling edge. The supply voltages, temperatures, and loads of each part are equal.
2
Rev. B | Page 3 of 12
ADuM1233
PACKAGE CHARACTERISTICS
Table 2.
Parameter
Resistance (Input-to-Output)1
Capacitance (Input-to-Output)1
Input Capacitance
IC Junction-to-Ambient Thermal Resistance
1
Symbol
RI-O
CI-O
CI
θJA
Min
Typ
1012
2.0
4.0
76
Max
Unit
Ω
pF
pF
°C/W
Test Conditions
f = 1 MHz
The device is considered a two-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
REGULATORY INFORMATION
The ADuM1233 is approved by the organizations listed in Table 3.
Table 3.
UL1
Recognized under the UL1577 component recognition program
1
In accordance with UL1577, each ADuM1233 is proof tested by applying an insulation test voltage ≥ 3000 V rms for one second (current leakage detection limit = 5 μA).
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 4.
Parameter
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
Symbol
L(I01)
Value
2500
7.7 min
Unit
V rms
mm
Minimum External Tracking (Creepage)
L(I02)
8.1 min
mm
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Isolation Group
CTI
0.017 min
>175
IIIa
mm
V
Conditions
1 minute duration
Measured from input terminals to output terminals,
shortest distance through air
Measured from input terminals to output terminals,
shortest distance path along body
Insulation distance through insulation
DIN IEC 112/VDE 0303 Part 1
Material Group (DIN VDE 0110, 1/89, Table 1)
RECOMMENDED OPERATING CONDITIONS
Table 5.
Parameter
Operating Temperature
Input Supply Voltage1
Output Supply Voltages1
Input Signal Rise and Fall Times
Common-Mode Transient Immunity, Input-to-Output2
Common-Mode Transient Immunity, Between Outputs2
Transient Immunity, Supply Voltages2
1
2
Symbol
TA
VDD1
VDDA, VDDB
Min
−40
4.5
12
−75
−75
−75
All voltages are relative to their respective ground.
See the Common-Mode Transient Immunity section for additional data.
Rev. B | Page 4 of 12
Max
+105
5.5
18
100
+75
+75
+75
Unit
°C
V
V
ns
kV/μs
kV/μs
kV/μs
ADuM1233
ABSOLUTE MAXIMUM RATINGS
Ambient temperature = 25°C, unless otherwise noted.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 6.
Parameter
Storage Temperature (TST)
Ambient Operating Temperature (TA)
Input Supply Voltage 1 (VDD1)
Output Supply Voltage1 (VDDA, VDDB)
Input Voltage1 (VIA, VIB)
Output Voltage1
VOA
VOB
Input-to-Output Voltage 2
Output Differential Voltage 3
Output DC Current (IOA, IOB)
Common-Mode Transients 4
Rating
−55°C to +150°C
−40°C to +105°C
−0.5 V to +7.0 V
−0.5 V to +27 V
−0.5 V to VDDI + 0.5 V
ESD CAUTION
−0.5 V to VDDA + 0.5 V
−0.5 V to VDDB + 0.5 V
−700 VPEAK to +700 VPEAK
+700 VPEAK
−20 mA to +20 mA
−100 kV/μs to +100 kV/μs
1
All voltages are relative to their respective ground.
Input-to-output voltage is defined as GNDA − GND1 or GNDB − GND1.
3
Output differential voltage is defined as GNDA − GNDB.
4
Refers to common-mode transients across any insulation barrier. Commonmode transients exceeding the Absolute Maximum Ratings may cause latchup or permanent damage.
2
Rev. B | Page 5 of 12
ADuM1233
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VIA 1
16
VDDA
VIB 2
15
VOA
VDD1 3
14
GNDA
DISABLE 5
ADuM1233
NC
TOP VIEW
(Not to Scale) 12 NC
13
NC 6
11
VDDB
NC 7
10
VOB
VDD1 8
9
GNDB
NC = NO CONNECT
06271-002
GND1 4
Figure 2. Pin Configuration
Table 7. ADuM1233 Pin Function Descriptions
Pin No.
1
2
3, 8 1
4
5
6, 7, 12, 13 2
9
10
11
14
15
16
1
2
Mnemonic
VIA
VIB
VDD1
GND1
DISABLE
NC
GNDB
VOB
VDDB
GNDA
VOA
VDDA
Description
Logic Input A.
Logic Input B.
Input Supply Voltage, 4.5 V to 5.5 V.
Ground Reference for Input Logic Signals.
Input Disable. Disables the isolator inputs and refresh circuits. Outputs take on default low state.
No Connect.
Ground Reference for Output B.
Output B.
Output B Supply Voltage, 12 V to 18 V.
Ground Reference for Output A.
Output A.
Output A Supply Voltage, 12 V to 18 V.
Pin 3 and Pin 8 are internally connected. Connecting both pins to VDD1 is recommended.
Pin 12 and Pin 13 are floating and should be left unconnected.
Table 8. Truth Table (Positive Logic)
VIA/VIB Input
H
L
X
X
VDD1 State
Powered
Powered
Unpowered
Powered
DISABLE
L
L
X
H
VOA/VOB Output
H
L
L
L
Notes
Output returns to input state within 1 μs of VDD1 power restoration.
Rev. B | Page 6 of 12
ADuM1233
TYPICAL PERFOMANCE CHARACTERISTICS
7
115
114
PROPAGATION DELAY (ns)
5
4
3
2
CH. B, FALLING EDGE
112
CH. A, FALLING EDGE
111
CH. A, RISING EDGE
110
1
CH. B, RISING EDGE
0
4
DATA RATE (Mbps)
10
109
12
06271-006
0
113
Figure 3. Typical Input Supply Current Variation with Data Rate
15
OUTPUT SUPPLY VOLTAGE (V)
18
06271-009
INPUT CURRENT (mA)
6
Figure 6. Typical Propagation Delay Variation with Output Supply Voltage
(Input Supply Voltage = 5.0 V)
18
115
16
114
PROPAGATION DELAY (ns)
12
10
8
6
4
113
112
110
CH. A, RISING EDGE
CH. B, RISING EDGE
4
DATA RATE (Mbps)
10
109
4.5
06271-007
0
Figure 4. Typical Output Supply Current Variation with Data Rate
115
110
–20
0
20
40
60
TEMPERATURE (°C)
80
100
120
06271-008
105
100
–40
5.0
INPUT SUPPLY VOLTAGE (V)
5.5
Figure 7. Typical Propagation Delay Variation with Input Supply Voltage
(Output Supply Voltage = 15.0 V)
120
PROPAGATION DELAY (ns)
CH. A, FALLING EDGE
111
2
0
CH. B, FALLING EDGE
06271-010
OUTPUT CURRENT (mA)
14
Figure 5. Typical Propagation Delay Variation with Temperature
Rev. B | Page 7 of 12
ADuM1233
APPLICATIONS INFORMATION
The transient magnitude of the sinusoidal component is given by
VCM, linear = (ΔV/Δt) t
where ΔV/Δt is the slope of the transient shown in Figure 11
and Figure 12.
The transient of the linear component is given by
dVCM/dt = ΔV/Δt
The ability of the ADuM1233 to operate correctly in the
presence of linear transients is characterized by the data in
Figure 8. The data is based on design simulation and is the
maximum linear transient magnitude that the ADuM1233 can
tolerate without an operational error. This data shows a higher
level of robustness than what is listed in Table 5 because the
transient immunity values obtained in Table 5 use measured
data and apply allowances for measurement error and margin.
400
The ability of the ADuM1233 to operate correctly in the presence
of sinusoidal transients is characterized by the data in Figure 9
and Figure 10. The data is based on design simulation and is the
maximum sinusoidal transient magnitude (2πf V0) that the
ADuM1233 can tolerate without an operational error. Values
for immunity against sinusoidal transients are not included in
Table 5 because measurements to obtain such values have not
been possible.
300
250
BEST-CASE PROCESS VARIATION
200
150
100
50
BEST-CASE PROCESS VARIATION
300
0
250
WORST-CASE PROCESS VARIATION
0
250
750
1000
1250
FREQUENCY (MHz)
1500
1750
2000
250
150
100
500
Figure 9. Transient Immunity (Sinusoidal Transients),
27°C Ambient Temperature
200
WORST-CASE PROCESS VARIATION
200
–20
0
20
40
TEMPERATURE (°C)
60
80
100
Figure 8. Transient Immunity (Linear Transients) vs. Temperature
The sinusoidal component (at a given frequency) is given by
VCM, sinusoidal = V0sin(2πft)
where:
V0 is the magnitude of the sinusoidal.
f is the frequency of the sinusoidal.
BEST-CASE PROCESS VARIATION
150
100
50
0
WORST-CASE PROCESS VARIATION
0
250
500
750
1000
1250
FREQUENCY (MHz)
1500
1750
Figure 10. Transient Immunity (Sinusoidal Transients),
100°C Ambient Temperature
Rev. B | Page 8 of 12
2000
06271-013
0
–40
06271-011
50
TRANSIENT IMMUNITY (kV/µs)
TRANSIENT IMMUNITY (kV/µs)
350
dVCM/dt = 2πf V0
06271-012
In general, common-mode transients consist of linear and
sinusoidal components. The linear component of a commonmode transient is given by
TRANSIENT IMMUNITY (kV/µs)
COMMON-MODE TRANSIENT IMMUNITY
ADuM1233
15V
5V
VDD1
GND1
15V
VDDA AND VDDB
15V
GNDA AND GNDB
ΔV
VDDA AND VDDB
Δt
ΔV
GNDA AND GNDB
Δt
5V
15V
06271-003
VDD1
GND1
Figure 11. Common-Mode Transient Immunity Waveforms—Input to Output
15V
VDDA /VDDB
15V
GNDA/GNDB
VDDB /VDDA
15V
VDDA/VDDB
VDDB/VDDA
Δt
ΔV
Δt
15V
15V
06271-004
GNDA/GNDB
ΔV
15V
GNDB/GNDA
GNDA/GNDB
Figure 12. Common-Mode Transient Immunity Waveforms—Between Outputs
VDDA /VDDB
ΔVDD
GNDA/GNDB
GNDA/GNDB
Figure 13. Transient Immunity Waveforms—Output Supplies
Rev. B | Page 9 of 12
06271-005
Δt
VDDA /VDDB
ADuM1233
OUTLINE DIMENSIONS
10.50 (0.4134)
10.10 (0.3976)
9
16
7.60 (0.2992)
7.40 (0.2913)
1.27 (0.0500)
BSC
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
10.65 (0.4193)
10.00 (0.3937)
8
0.51 (0.0201)
0.31 (0.0122)
0.75 (0.0295)
0.25 (0.0098)
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
45°
8°
0°
1.27 (0.0500)
0.40 (0.0157)
0.33 (0.0130)
0.20 (0.0079)
COMPLIANT TO JEDEC STANDARDS MS-013- AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
032707-B
1
Figure 14. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body (RW-16)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
ADuM1233BRWZ 1
ADuM1233BRWZ-RL1
1
No. of
Channels
2
2
Output Peak
Current (A)
0.1
0.1
Output
Voltage (V)
15
15
Temperature Range
−40°C to +105°C
−40°C to +105°C
Z = RoHS Compliant Part.
Rev. B | Page 10 of 12
Package Description
16-Lead SOIC_W
16-Lead SOIC_W, 13-Inch Tape
and Reel Option (1,000 Units)
Package
Option
RW-16
RW-16
ADuM1233
NOTES
Rev. B | Page 11 of 12
ADuM1233
NOTES
©2006–2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06271-0-12/07(B)
Rev. B | Page 12 of 12