PRACTICAL WORKBOOK
For Academic Session 2014
AMPLIFIER & OSCILLATOR
EL-234 For S.E (EL)
Name:
Roll Number:
Batch:
Department:
Year:
Department of Electronic Engineering
NED University of Engineering & Technology, Karachi-75270
Pakistan
1 S.NO
PRACTICALS CONTENTS
01
Introduction to amplifiers and Oscillators using PSPICE software
02
To design and implement common emitter amplifier and calculate its
voltage gain, input resistance and output resistance.
03
To describe the operating characteristics of cascade amplifier and observe
the normal operation in a cascade amplifier circuit.
04
To demonstrate the factors that contributes to the low-frequency response
of a common emitter amplifier.
05
To demonstrate the design and operation of Class A common emitter
power amplifier
06
The purpose of this experiment in to demonstrate the design and operation
of a class B push-pull emitter-follower power amplifier
07
08
The purpose of this experiment is to demonstrate the operation and
characteristics of a Butterworth sallen and key 2nd-order low-pass active filter
The purpose of this experiment is to demonstrate the operation and
characteristics of a Butterworth sallen and key 2nd-order high-pass active filter
09
The purpose of this experiment is to demonstrate the operation and
characteristics of a multiple-feedback active band-pass filter
10
The purpose of this experiment is to demonstrate the operation of an opamp based Wien-Bridge Oscillator.
11
The purpose of this experiment is to demonstrate the operation of an opamp based Phase-Shift Oscillator.
2 PAGE
REMARKS
12
The purpose of this experiment is to demonstrate the operation of Hartley
Oscillator behavior.
13
The purpose of this experiment is to demonstrate the operation of the 555
timer as a monostable Multivibrator.
14
The purpose of this experiment is to demonstrate the operation of the 555
timer as an astable Multivibrator.
3 NED University of Engineering & Technology, Department of Electronic Engineering
Lab No. 1
OBJECTIVE:
Introduction to amplifiers and oscillators using PSPICE software.
INTRODUCTION TO OSCILLATORS
An oscillator is the basic element of all ac signal sources. It generates a sinusoidal signal of
known frequency and amplitude. An oscillator is one of the most basic and useful instruments
used in electrical and electronic measurements.
Since sinusoidal waveforms are encountered so frequently in electronic measurement work, the
oscillator (sine wave generator) represents the largest single category of signal generators. This
device covers the frequency range from a few Hz to many GHz.
Although an oscillator is known as a sinusoidal signal “generating” device, it is to be noted that it
does not create energy, but merely acts as an energy converter. All it does is convert the
unidirectional current drawn from a dc source of supply into an alternating current of desired
frequency. The idea is the reverse process of what happens in a rectifier and, therefore, can also
be called as an inverter. However, we generally think of oscillator circuits as providing an ac
voltage signal.
APPLICATIONS




An oscillator is mostly used in electronic communication equipments.
“Local” oscillators are used to assist the reduction of the incoming radio frequency (RF)
to a lower intermediate frequency in different modulations like AM (amplitude
modulation) and FM (frequency modulation) super heterodyne receivers.
Oscillator circuits are also used to generate the RF carrier in the “exciter” section of a
transmitter.
They are also used as “clocks” in digital systems such as microcomputers, in the sweep
circuits found in TV sets and oscilloscopes.
An alternator cannot be called as an oscillator although it can generate sinusoidal ac power of 50
Hz. An oscillator is a non-rotating electronic device that converts dc energy into ac energy of
frequency ranging from a few Hz to many GHz. But, an alternator is a mechanical device that
4 NED University of Engineering & Technology, Department of Electronic Engineering
has rotating parts, converts mechanical energy into ac energy and that cannot produce ac energy
of high frequency.
Though an oscillator generates a large amount of ac power, it is preferred for several applications
such as radio-transmitters and receivers, radars and so on. Take a look at the advantages given
below.
ADVANTAGES
(i) Portable and cheap in cost.
(ii) An oscillator is a non-rotating device. Consequently, there is no wear and tear and
hence longer life.
(iii) Frequency of oscillation may be conveniently varied.
(iv) Voltage or currents of any frequency (20 Hz to 100 MHz) adjustable over a wide range
can be generated.
(v) Frequency once set remains constant for a considerable period of time.
(vi) Voltages free from harmonics as well as rich with harmonics can be generated by
sinusoidal oscillators and relaxation oscillators respectively.
(vii) Operation of an oscillator is silent, as there is no moving part in it.
(viii) High operation efficiency—due to absence of moving part, there is no wastage of
energy owing to friction.
For having a sinusoidal oscillator, we require an amplifier with positive feedback. The idea is to
use the feedback signal in place of an input signal. If the loop gain and phase are correct, there
will be an output signal even though there is no external input signal. In other words, an
oscillator is an amplifier that is modified by positive feedback to supply its own input signal.
DIFFERENCE BETWEEN AN AMPLIFIER AND AN OSCILLATOR:
Amplifier-Oscillator Difference
5 NED University of Engineering & Technology, Department of Electronic Engineering
The difference between an amplifier and an oscillator is explained with the help of figure given
above.
An amplifier strengthens the input signal without any change in its waveform and frequency. The
additional power required comes from the external dc source. Thus an amplifier can be called as
an energy converter that draws energy from a dc supply and converts it into ac energy at signal
frequency, the energy conversion process being controlled by the input signal. The main
difference with an oscillator is that an oscillator does not need any external signal either to start
or maintain the process of energy conversion. Apart from this, the energy conversion process is
controlled by the oscillator circuit itself, as shown in the figure given above. In an oscillator, the
passive components that are used for the circuit decides the output signal frequency. In order to
bring a change in the output signal a change in the passive components is enough. Oscillator may
provide fixed or variable frequency.
If an oscillator is used as an instrument, it may be called with different names such as test
oscillator (or signal generator), standard signal generator (or function generator) and so on. The
name depends on the function performed by the device, type of signal produced by it, order of
sophistication and so on.
ORCAD-PSPICE:











From Program open Orcad10.0 Capture CIS.
Go to File  New Project.
Name the project as example, click on the tab Analog or Mixed A/D and save it the
default Location.
In create PSpice Project Window click on the tab Create based upon an existing
project and then click OK.
In Studio Suite Selection select PSpiceAD and then click Ok.
In Design Resources click on Schematic 1 and then double click on Page1, a page will
open.
Click the place part button (which is in the vertical toolbar on the right side) and then go
to add library, select all the p-spice libraries and then open them.
From library select R/ANALOG and place it on the Schematic Page. Place 2 resistors.
From library select VDC/SOURCE
To connect the items in the circuit, select the Place Wire tool by clicking on the third
button from the top on the vertical toolbar on the right side. Drag the mouse between the
terminals of your placed parts to connect them.
In order for PSpice to simulate your circuit, it must have a “zero” node for a ground. To
6 NED University of Engineering & Technology, Department of Electronic Engineering
th






add this ground, select the Place Ground tool by clicking on the 9 button from the top
on the vertical toolbar on the right side.
To change the value for an item, double click the value you want to change and enter the
value you want on the dialog box that appears. Double click on the 1k value of the
horizontally placed resistor and change the Value to 4k.
It is important to name the nodes you want to plot in PSpice so you can find them easily.
To name a node, select the Place Net Alias tool then change the Alias to Vout and click
OK.
Then place the alias on the desired node for Vout (i.e. the junction of the 2 resistors).
The circuit should look like this
Next, configure the simulation by clicking the New Simulation Profile button on the top
toolbar. Enter the Name lab1.
Click Create.
BIAS POINT:




A dialogue box will appear
In it select the analysis type as bias point and then click OK.
On the schematic, click the Enable Bias Voltage Display button to see all the DC
voltages in the circuit as shown below.
Then, click on the Enable Bias Current Display button to see all the DC current(s) in
the circuit.
7 NED University of Engineering & Technology, Department of Electronic Engineering
TRANSIENT ANALYSIS:



For this circuit, select and wire these components:
Capacitor (Place Part C in ANALOG library), Resistor (Place Part R in ANALOG
library), Sinusoidal Source (Place Part VSIN in SOURCE library), and Ground (Place
Ground 0 SOURCE library).
Double click on the VOFF attribute of the VSIN component.Change the value from
<VOFF> to 0. Click OK. Similarly, set the VAMPL attribute to 1 and the FREQ attribute
to 159000. (1/(2*PI*R*C)). This circuit is shown below:
Next, configure the simulation by clicking the New Simulation Profile button on the top
toolbar. Enter the Name Tran and the following dialog box will appear. Set Analysis
type: Time Domain (transient), Run To Time: 20us, and Maximum Step Size to
100ns. Click OK.
8 NED University of Engineering & Technology, Department of Electronic Engineering



Click on the Voltage/Level Marker button and place a marker at the junction of the R
and C and at the junction between the Source and the R.
Click the Run PSpice button and the PSpice Analysis results will appear as shown
below.
Click the toggle cursor button to determine values of Vin and Vout at different points.
AC ANALYSIS:

Close the PSpice simulation window. Then, modify the above circuit by deleting the
VSIN component. Replace this component with the AC source (Place Part VAC in
SOURCE library). The default attributes are correct. This circuit is shown below:
9 NED University of Engineering & Technology, Department of Electronic Engineering


Next, configure the simulation by clicking the New Simulation Profile button on the top
toolbar. Enter the Name AC and the following dialog box will appear. Select Analysis
type: AC Sweep/Noise, AC Sweep Type: Logarithmic and enter the displayed values for
Start Frequency, End Frequency and Points/Decade. Click OK.
When you create a new simulation profile, the program deletes the voltage markers. Add
a voltage marker at the Vout node. Then, click the Run PSpice button and the PSpice
Analysis results will appear as shown below.
10 NED University of Engineering & Technology, Department of Electronic Engineering
Lab No. 2
OBJECTIVE:


Design a common emitter amplifier
Measure its voltage gain, input resistance and output resistance
EQUIPMENT REQUIRED:
Protoboard
Function Generator
Digital Multimeter
Power Supply
Resistors
capacitors
Transistors: 1 x 2N3904
INTRODUCTION
An electrical signal can be amplified by using a device which allows a small current or voltage
to control the flow of a much larger current from a dc power source. Transistors are the basic
device providing control of this kind. There are two general types of transistors, bipolar and
field-effect. Very roughly, the difference between these two types is that for bipolar devices an
input current controls the large current flow through the device, while for field-effect
transistors an input voltage provides the control.
In most practical applications it is better to use an op-amp as a source of gain rather than to build
an amplifier from discrete transistors. A good understanding of transistor fundamentals is
nevertheless essential. Because op-amps are built from transistors, a detailed understanding of
op-amp behavior, particularly input and output characteristics, must be based on an
understanding of transistors.
Single stage transistors are still important in many applications. For experiments they are
especially useful as interface devices between integrated circuits and sensors, indicators, and
other devices used to communicate with the outside world.
The three terminals of a bipolar transistor are called the emitter, base, and collector .A small
current into the base controls a large current flow from the collector to the emitter. The current
at the base is typically one hundredth of the collector-emitter current.
11 NED University of Engineering & Technology, Department of Electronic Engineering
In electronics, a common-emitter amplifier is one of three basic single-stage bipolar-junctiontransistor (BJT) amplifier topologies, typically used as a voltage amplifier. In this circuit the base
terminal of the transistor serves as the input, the collector is the output, and the emitter is
common to both (for example, it may be tied to ground reference or a power supply rail), hence
its name. The analogous field-effect transistor circuit is the common-source amplifier, and the
analogous tube circuit is the common-cathode amplifier.
Fig.1 : Basic npn common emitter circuit
CHARACTERISTICS:



Large voltage and current gains.
Input resistance is moderately large
Output resistance is fairly large.
EMITTER DEGENERATION
Fig 2: Adding an emitter resistor decreases gain, but increases linearity and stability
12 NED University of Engineering & Technology, Department of Electronic Engineering
Common-emitter amplifiers give the amplifier an inverted output and can have a very high gain
that may vary widely from one transistor to the next. The gain is a strong function of both
temperature and bias current, and so the actual gain is somewhat unpredictable. Stability is
another problem associated with such high gain circuits due to any unintentional positive
feedback that may be present. Other problems associated with the circuit are the low input
dynamic range imposed by the small-signal limit; there is high distortion if this limit is exceeded
and the transistor ceases to behave like its small-signal model. One common way of alleviating
these issues is with the use of negative feedback, which is usually implemented with emitter
degeneration. Emitter degeneration refers to the addition of a small resistor (or any impedance)
between the emitter and the common signal source (e.g., the ground reference or a power supply
rail).
For the circuit in fig.2 if for some reason the collector current increases ,the emitter current also
will increase , resulting in an increased voltage drop across RE .Thus the emitter voltage rises ,
and the base-emitter voltage decreases .The later effect causes the collector current to decrease
,counteracting the initially assumed change, an indication of the presence of negative feedback.
The distortion and stability characteristics of the circuit are thus improved at the expense of a
reduction in gain.
CHARACTERISTICS:



The input resistance is larger than common emitter amplifier.
Voltage gain is reduced as compared to common emitter amplifier.
Overall gain is less dependent on the value of β
13 NED University of Engineering & Technology, Department of Electronic Engineering
TASK:
Design a common emitter amplifier as explained in the lab. The general circuit for the design is
given below:
Fig. 3: Circuit to be designed
CALCULATIONS:
Show all the steps by which the dc operating points have been determined.
14 NED University of Engineering & Technology, Department of Electronic Engineering
PROCEDURE:
1) Wire the circuit.
2) Apply the 12V supply voltage to the beard board .With a VOM or DMM, individually
measure the transistor DC base, emitter, and collector voltages with respect to ground,
recording your results in Table 1. Also measure the emitter and the collector current.
3) Connect channel 1 of your Oscilloscope to point 1(υin) and channel 2 to point O (υout).
Then connect the signal generator to the circuit as shown in figure 3, and adjust the sine
wave out-put level of the generator at 30mV peak-to-peaks at a frequency of 10 kHz (Use
a voltage divider if required).You should observe that the output signal level (υout) is
greater than the input level (υin) in addition, υout is inverted or 180° out-of-phase, with
respect to the input. These points are two major characteristics of a common-emitter.
4) Use a fix resistor for instance of 10kΩ in series with the signal generator as shown in
fig.4. Measure the AC voltage at points V1 and V2, then the input current, IIN
becomes:
The input impedance of the circuit under test is then found by:
Fig4: Circuit to measure Input impedance
5. Output impedance may also be determined using a similar technique. A fixed load resistor is
used and the output voltage is measured first with full load, then without the load.
15 NED University of Engineering & Technology, Department of Electronic Engineering
Fig5: Circuit to measure Output impedance
In the diagram above, Zo is the internal output impedance of the network to be measured. First,
the load resistor RL is removed and output voltage (V) measured and recorded. Then RL is placed
back in circuit and the output voltage under load (VL). The output impedance, Zo is now found
by Ohm's Law for AC circuits. As the load is purely resistive Z=V/I, where "V" is voltage drop
across the output impedance: ( V - VL ), and "I" the output current, VL/RL. Thus:
OBSERVATION:
Table 1
Parameter
Calculated Value
Measured Value
VB
VE
VC
IC
IE
16 % Error
NED University of Engineering & Technology, Department of Electronic Engineering
Table 2
Parameter
Calculated Value
Measured Value
Zin
Zout
RESULTS:
The gain of the amplifier as measured is :
The input impedance as measured is :
The output impedance as measured is :
17 % Error
]NED University of Engineering & Technology, Department of Electronic Engineering
Lab No. 3
OBJECTIVE:


Describe the operating characteristics of cascade amplifier
Observe normal operation in a cascade amplifier circuit.
EQUIPMENT REQUIRED:
Protoboard
Function Generator
Digital Multimeter
Power Supply
Resistors
Capacitors
Transistors: 2 x Q2N3904
INTRODUCTION
Throughout electronics, single amplifier circuits (such as the common emitter, common
base, and common collector) are seldom found alone in equipment. The vast majority of
equipment has several amplifiers connected together to perform a specific function.
Within the specific function, each individual transistor circuit is called a stage. In this
lesson, you will learn how transistor amplifiers are connected so that much greater levels
of signal (voltage) amplification may be obtained.
Cascade Amplifiers
The term cascade amplifier refers to the way in which the output of one amplifier is
applied to the input of another. In other words, it is a circuit configuration. Simply put, if
the output of one amplifier is connected to the input of another amplifier, the amplifiers
are said to be connected in cascade. Cascade amplifiers are very common throughout
electronics. When several transistor amplifiers are connected together, each individual
transistor amplifier is called a stage. The stage consists of the transistor and associated
components required for normal operation. Therefore, an amplifier section containing
five cascade amplifiers would be called a 5-stage amplifier. The term "stage" can be used
any time multiple circuits are connected together. As a rule, one amplifier stage is of little
use. In previous lessons and experiments, you learned that amplifier gains of between 100
and 300 are possible. In reality, obtaining gains of this magnitude is not easy. While one
stage may have an amplification figure in the range of 100 to 300, stability and
predictability of signal shape are sacrificed. By using the simple cascade configuration, very high
gain is possible without any loss in stability or signal predictability.
18 NED University of Engineering & Technology, Department of Electronic Engineering
The cascade amplifier configuration is obtained by simply connecting the output of one
amplifier to the input of the next amplifier. No doubt, your question is, "Why?" In
answer, there are two important advantages in doing so: a much larger voltage gain and
stability / signal predictability.
First, a much larger voltage gain is obtained by using multiple stages. The resulting gain
is not additive; rather, it is the product of the individual gains.
AV represents the total voltage gain of several stages of amplification, and AV1 through
AV3 represent the gain of each individual stage. Because of this relationship, the gain of
an individual stage is not critical. Therefore, designers usually set the gain of the
individual stages relatively low. That low gain setting provides the second advantage
with cascade amplifiers - stability and signal predictability. If the gain of one amplifier
section isn't high enough, more stages are simply added.
Fig. 1 illustrates a typical two stage cascade amplifier. The circuit can be easily
expanded by taking the output of the final stage and connecting it to the input of another
amplifier stage. Gain stable cascade amplifiers usually have gains in the range of 5 to 20.
When dealing with a cascade amplifier section containing several stages, the typical gain
of one amplifier is around 10. There is an excellent reason for designing output gains of
that figure. The final output of any cascade amplifier section is always a multiple of ten.
Therefore, if you need a final gain of 1,000,000, then six stages of amplification would be
required. Remember, the final amplification figure is the product of each individual stage.
Fig.1. Typical 2 Stage Cascade Amplifier
Cascade amplifiers are RC coupled. The R refers to the collector resistor and the C refers
to the coupling capacitor. By using RC coupling, each stage of an amplifier is
19 NED University of Engineering & Technology, Department of Electronic Engineering
independently biased. The capacitor isolates the DC voltages from one stage to the next
while passing the AC signal. That way, only the AC signal variations are passed from one
stage to the next.
PRELAB ASSIGNMENT:
Use the computer software tool Orcad PSPICE to simulate the cascaded circuit by connecting
the output of first stage to the input of the other through a coupling capacitor. Make sure to
bring the PSPICE results to the laboratory. In addition to being an aid in immediately
verifying measured results, they will be the basis of your Pre-lab grade for this lab.


Specifically, the Circuit drawings with the nodes labeled and with DC node voltages
and all branch currents.
Transient response (time-domain) with Vin = 30mV, showing waveforms of Base
voltage (input voltage) and output voltage of first stage and output voltage of
second stage waveforms separately. Also mark label to the maximum output
voltage (using PSpice)
Fill in all entries in the tables provided below that are labeled “simulated.
The general circuit for the design is given below:
Fig. 2: Cascaded circuit to be implemented
20 NED University of Engineering & Technology, Department of Electronic Engineering
PROCEDURE:
1) Implement the simulated circuit on the bread board.
2) Apply the 12V supply voltage to the beard board .With a VOM or DMM, individually
measure the transistor DC base, emitter, and collector voltages with respect to ground,
recording your results in Table 1. Also measure the emitter and the collector current.
3) Connect channel 1 of your Oscilloscope to the input of first stage and channel 2 to the
output of first stage. Then connect the signal generator to the input of first stage, and
adjust the sine wave out-put level of the generator at 30mV peak-to-peaks at a frequency
of 10 kHz (Use a voltage divider if required).You should observe that the output signal
level (output of first stage) is greater than the input level .In addition, this output is
inverted or 180° out-of-phase, with respect to the input.
4) Now use a coupling capacitor to connect the output of first stage to the input of second
stage. Check the final output.
OBSERVATIONS:
Table 1
Parameter
Measured Value
Simulated Value
VB1
VE1
VC1
IC1
IE1
VB2
VE2
VC2
IC2
IE2
21 % Error
NED University of Engineering & Technology, Department of Electronic Engineering
Table 2
Parameter
Measured Value
Simulated Value
vin
vout1
vout2
Calculations:
Av1: vout1 /vin =
Av2: vout2 /vout1 =
Av: Av1 *Av2 =
RESULT:
The gain of the cascaded circuit is found out to be: ----------------
22 % Error
NED University of Engineering & Technology, Department of Electronic Engineering
Lab No. 4
OBJECTIVE:


To demonstrate the factors that contribute to the low-frequency response of a commonemitter transistor amplifier.
The low- frequency response of a typical common-emitter amplifier is determined by the
input and output coupling capacitors and the emitter by pass capacitor.
This Experiment examines individually the effect of each capacitor on the common-emitter
amplifiers Law-frequency response. In all case, the values of the capacitors are intentionally
made abnormally small in order to allow the frequency response to be easily measured.
EQUIPMENT REQUIRED:
Protoboard
Function Generator
Digital Multimeter
Power Supply
Resistors
Capacitors 2.2µF,10µF,1µF,0.033µF
Transistors: 1xQ2N3904
INTRODUCTION
COMMON EMITTER AMPLIFIER:
Fig1: Common Emitter Amplifier
23 NED University of Engineering & Technology, Department of Electronic Engineering
A Common-Emitter amplifier is one of three basic single-stage bipolar-junction-transistor
(BJT) amplifier topologies, typically used as a voltage amplifier. In this circuit the base
terminal of the transistor serves as the input, the collector is the output, and the emitter is
common to both (for example, it may be tied to ground reference or a power supply rail),
hence its name. The analogous field-effect transistor circuit is the common-source amplifier.
In fig.1 C1 and C3 are coupling capacitors while C2 is bypass capacitor.
EFFECT OF COUPLING CAPACITORS:
As we know that
П
, hence the capacitive reactance varies inversely with
frequency. At lower frequencies the reactance is greater, and it decreases as the frequency
increases. At lower frequencies –for e.g. audio frequencies below 10Hz-capacitively coupled
amplifiers such as the one shown in Fig.1 have less voltage gain than they have at higher
frequencies. The reason is that at lower frequencies more signal voltage is dropped across C1
and C3 because their reactances are higher. This higher signal voltage drop at lower
frequencies reduces the voltage gain. Also, a phase shift is introduced by the coupling
capacitors because C1 forms a lead circuit with the Rin of the amplifier and C3 forms a lead
circuit with RL in parallel with RC.
EFFECT OF BYPASS CAPACITORS:
At lower frequencies, the reactance of the bypass capacitor, C2 in Fig.1 becomes significant
and the emitter is no longer at ac ground. The capacitance reactance XC2 in parallel with RE
creates an impedance that reduces the gain.
LOW FREQUENCY AMPLIFIER RESPONSE:
The BJT amplifier in Fig.1 has three high pass RC circuits that affect its gain as the
frequency is reduced below midrange. These are shown in the low frequency ac equivalent
circuit in Fig.2.
Fig.2: The low frequency ac equivalent circuit of the amplifier in fig.1 consists of three high-pass RC circuits
24 NED University of Engineering & Technology, Department of Electronic Engineering
The low frequency equivalent circuit retains the coupling and bypass capacitors because XC
is not small enough to neglect when the signal frequency is sufficiently low.
One RC circuit is formed by the input coupling capacitor C1 and the input resistance of the
amplifier. The second RC circuit is formed by the output coupling capacitor C3, the
resistance looking in at the collector, and the load resistance .The third RC circuit that affects
the low frequency response is formed by the emitter by-pass capacitor C2 and the resistance
looking in at the emitter.
THE INPUT RC CIRCUIT:
Fig 3: Input RC Circuit formed by the input coupling capacitor and the amplifier’s input resistance
The input RC circuit for the BJT amplifier in Fig.1 is formed by C1 and the amplifier’s input
resistance and is shown in Fig.3.As the signal frequency decreases, XC1 increases. This
causes less voltage across the input resistance of the amplifier at the base because more
voltage is dropped across C1 and because of this; the overall voltage gain of the amplifier is
reduced .The base voltage for the input RC circuit in Fig.3 (neglecting the internal resistance
of the input signal source) can be stated as:
The critical point in the amplifier’s response occurs when the output voltage is 70.7% of its
midrange value. This condition occurs in the input RC circuit in the input RC circuit when
XC1=Rin.
2
25 √2
1
√2
NED University of Engineering & Technology, Department of Electronic Engineering
Therefore
0.707
In terms of measurement in decibels,
20 log
= 20 log (0.707) = -3dB
LOWER CRITICAL FREQUENCY:
The condition where the gain is down 3dB is logically called the -3dB point of the amplifier
response; the overall gain is 3 dB less than at midrange frequencies because of the attenuation of
the input RC circuit. The frequency, fc , at which this condition occurs is called the lower critical
frequency (also known as the lower cutoff frequency, lower corner frequency or lower break
frequency) and can be calculated as follows :
1
2
1
2 If the resistance of the input source is taken into account, the above equation becomes
1
2 THE OUTPUT RC CIRCUIT:
Fig.4: Development of the equivalent low-frequency output RC circuit
The second high pass RC circuit in the BJT amplifier of fig.1 is formed by the coupling capacitor
C3, the resistance looking in at the collector, and the load resistance RL, as shown in Fig.4 (a).In
26 NED University of Engineering & Technology, Department of Electronic Engineering
determining the output resistance, looking in at the collector, the transistor is treated as an ideal
current source (with infinite internal resistance), and the upper end of RC is effectively at ac
ground, as shown in figure 4(b).therefore thevenizing the circuit to the left of capacitor C3
produces an equivalent voltage source equal to the collector voltage and a series resistance equal
to RC , as shown in fig.4(c).The critical frequency of this output RC circuit is
1
2 The effect of the output RC circuit on the amplifier voltage gain is similar to that of the input RC
circuit. .As the signal frequency decreases, XC3 increases .This causes less voltage across the
load resistance because more voltage is dropped across C3.The signal voltage is reduced by a
factor of 0.707when frequency is reduced to the lower critical value,fc for the circuit. This
corresponds to a 3dB reduction in voltage gain.
THE BYPASS RC CIRCUIT:
The third RC circuit that affects the low-frequency gain of the BJT amplifier in Fig.1 includes
the bypass capacitor C2 as shown in fig.5.
Fig.5: At low frequencies XC2 in parallel with RE creates an impedance that reduces the voltage gain.
The critical frequency for this equivalent bypass RC circuit is:
1
∥
2П ∥
27 NED University of Engineering & Technology, Department of Electronic Engineering
PRELAB ASSIGNMENT:
Use the computer software tool Orcad PSPICE to simulate the circuit.

AC Response (output voltage Vs Frequency )with Vin = 50mV .For this purpose
Replace C1 (2.2µF) with a 0.033-µF. Determine the lower critical frequency due to C1
Again replace C1 with 2.2µF.
Next Replace C2 (10µF) with a 1-µF. Determine the lower critical frequency due to C2. Again
replace C2 with 10µF.
Replace C3 (2.2µF) with a 0.033-µF. Determine the lower critical frequency due to C3. Again
replace C3 with 2.2µF.
Note: Read the procedure in case you are unable to unable to perform the pre-lab.
Make sure to bring the PSPICE results to the laboratory. In addition to being an aid in
immediately verifying measured results, they will be the basis of your Pre-lab grade for
this lab.
Mention the lower critical frequencies on the simulations.
The circuit for the design is given below:
Fig. 6: circuit to be implemented
28 NED University of Engineering & Technology, Department of Electronic Engineering
PROCEDURE
1. Wire the circuit shown in figure
2. Apply the 15V supply voltage to the breadboard. Measure the transistors quiescent DC
emitter voltage with respect to ground. Determine the transistors ac internal emitter
resistance re using Equation 4, then determine the expected mid band voltage gain of the
Amplifiers in decibels
3. Connect channel 1 of your Oscilloscope at the input and channel 2 at the output then
connect the signal generator to the circuit and adjust the sine wave output level of the
generator at a frequency of 50 kHz, 50mV.
4. In order to determine the amplifiers low frequency 3-db point solely due to the effects of
the input coupling capacitor C , replace C (2.2µF) with a 0.033-µF capacitor. Adjust
the sine wave output level of the generator at a frequency of 50 KHz and record the
output voltage then slowly reduce the input frequency until the peak-to-peak output
voltage is 0.707 of the maximum value,using oscilloscope, measure the frequency at
which this value occurs, and record this frequency (f ) in table along with the expected
value for comparison assuming a typical beta of 150 for the 2N3904 transistors. Then
replace C with a 2.2-µF capacitor.
5. In order to determine the amplifiers low-frequency 3-db point due solely to the effects of
the emitter by pass capacitor C2, replace C2 (10µF) with a 1-µF capacitor .again adjust the
sine wave output level of the generator at a frequency of 50 kHz then reduce the input
frequency until the peak-to-peak output voltage drops to 0.707 of the maximum value.
Measure the frequency at which this value occurs (f2) and record this frequency in table
again assume that beta is typically 150. Then replace C2 with a 10-µF capacitor.
6. In order to determine the amplifiers low-frequency 3-db point due solely to the effects of
the output coupling capacitor C3 .Replace C3 (2.2µF) with 0.033-µF capacitor. Again
adjust the sine wave output level of the generator at a frequency of 50 kHz then reduce
the input frequency until the peak-to-peak output voltage drops to 0.707 of the maximum
value. Measure the frequency at which this value occurs and record this frequency in
table along with the expected value for comparison.
29 NED University of Engineering & Technology, Department of Electronic Engineering
30 NED University of Engineering & Technology, Department of Electronic Engineering
OBSERVATION:
(a) Amplifier Midband Response
Parameter
Measured Value
VE (Measured)
re (Measured)
Vin
Vout
Av(dB) (Measured)
Av(dB)( calculated)
% Error
(b) Amplifier low Frequency Response
Parameter
f1
Measured
Calculated % Error
f2
f3
31 NED University of Engineering & Technology, Department of Electronic Engineering
CALCULATIONS:
Show all the calculations for determining gain, f1, f2, f3
RESULT:
32 NED University of Engineering & Technology, Department of Electronic Engineering
Lab No. 5
OBJECTIVE:
 To demonstrate the design and operation of a class A Common emitter power amplifier.
EQUIPMENT REQUIRED:
Protoboard
Function Generator
Digital Multimeter
Power Supply
Resistors
Capacitors 2x10µF, 220uF
Diodes: 2x 1N914 or 1N4148
Transistors: 1xQ2N3904.
1xQ2N3906
POT 5KΩ
INTRODUCTION:
POWER AMPLIFIER:
Power Amplifiers are large signal amplifiers .This generally means that a much larger portion of
the load line is used during signal operation than in a small signal amplifier.
Power amplifiers are normally used as the final stage of a communications receiver or transmitter
to provide signal power to speakers or to transmitting antenna.
CLASS A POWER AMPLIFIERS:
Class A Common Emitter Power Amplifier is biased such that Collector Current always flows
during the entire cycle of the input wave form. Ideally, the amplifiers Q point should be biased at
the center of the ac Load line so that the output signal have the max. Possible swing in both
directions. Consequently clipping will occur simultaneously on both peaks of the output signal if
the amplifier is overdriven.
If the Q point is not centerd on the ac loand line , output waveform will clipping either at
saturation or cut off. The max. Efficiency that can be expected for it with a capacitive coupled
load is only 25 %.
33 NED University of Engineering & Technology, Department of Electronic Engineering
Power Amplifier Efficiency




Where:
η% - is the efficiency of the amplifier.
Pout - is the amplifiers output power delivered to the load.
Pdc - is the DC power taken from the supply.
For a power amplifier it is very important that the amplifiers power supply is well designed to
provide the maximum available continuous power to the output signal.
Class A Amplifier
The most commonly used type of power amplifier configuration is the Class A Amplifier. The
Class A amplifier is the most common and simplest form of power amplifier that uses the
switching transistor in the standard common emitter circuit configuration as seen previously. The
transistor is always biased "ON" so that it conducts during one complete cycle of the input signal
waveform producing minimum distortion and maximum amplitude to the output.
This means then that the Class A Amplifier configuration is the ideal operating mode, because
there can be no crossover or switch-off distortion to the output waveform even during the
negative half of the cycle. Class A power amplifier output stages may use a single power
transistor or pairs of transistors connected together to share the high load current. Consider the
Class A amplifier circuit below.
34 NED University of Engineering & Technology, Department of Electronic Engineering
Single Stage Amplifier Circuit
This is the simplest type of Class A power amplifier circuit. It uses a single-ended transistor for
its output stage with the resistive load connected directly to the Collector terminal. When the
transistor switches "ON" it sinks the output current through the Collector resulting in an
inevitable voltage drop across the Emitter resistance thereby limiting the negative output
capability. The efficiency of this type of circuit is very low (less than 30%) and delivers small
power outputs for a large drain on the DC power supply. A Class A amplifier stage passes the
same load current even when no input signal is applied so large heatsinks are needed for the
output transistors.
35 NED University of Engineering & Technology, Department of Electronic Engineering
PRELAB ASSIGNMENT:
Use the computer software tool Orcad PSPICE to simulate the circuit .Make sure to bring the
PSPICE results to the laboratory. In addition to being an aid in immediately verifying
measured results, they will be the basis of your Pre-lab grade for this lab.
Specifically, the following items must be addressed using Orcad PSPICE as part of the prelab
assignment:
For the circuit in Fig 1.
 Transient response (time-domain) with vin = 3 V (peak), showing plots of input
and output voltage waveforms separately.
Fig. 1: Class A Common emitter Power amplifier circuit to be implemented
36 NED University of Engineering & Technology, Department of Electronic Engineering
PROCEDURE
7. Wire the circuit shown in figure 9(a).
8. Connect channel 1 of your oscilloscope at the input and channel 2 at the output.
9. Apply power to the bread board and adjust the sine the wave output level of the generator at 6 V
peak-to-peak at a frequency of 1 kHz .Observe amplifier’s input and output waveform. Measure
the base-to-emitter voltages required for the transistor to become forward biased, recording these
values in table
10. With a VOM or DMM individually measure the transistor dc base and emitter voltages with
respect to ground recording your results in table 2.
11. Now carefully increase the peak-to-peak input signal so that the output peaks just clip off. With
VOM or DMM measure the rms voltage across the 1kΩ load resistor {Vo(rms)},and compute
the rms output power of the amplifier record these result is table 3.
12. In order to measure the dc power supplied to the amplifier while amplifying an input
signal, use VOM or DMM to measure the dc collector current Icc of the transistor.
Compute the dc power supplied (Equation 3) recording your results in table 3.
13. Finally, compute the percent efficiency (%η) of your amplifier, and compare it with the
theoretical maximum of 25% of a class A amplifier. Record your result in table 3. If a
value greater than 25% is calculated, then repeat steps 5 and 6, trying to determine the
source of your error.
37 NED University of Engineering & Technology, Department of Electronic Engineering
USEFUL FORMULAS:
38 NED University of Engineering & Technology, Department of Electronic Engineering
Observation:
Class A Amplifier Bias Parameter
Parameter
Measured Value
Expected Value
VB
VE
VCEQ
ICQ
Class A Amplifier Efficiency
Parameter
Vo
Parameter
Calculated
Value
Vo
Po
Pdc
%η
39 % Error
NED University of Engineering & Technology, Department of Electronic Engineering
Calculation:
Conclusion:
40 NED University of Engineering & Technology, Department of Electronic Engineering
Lab No. 6
OBJECTIVE:
 To demonstrate the design and operation of a class B and class AB push-pull emitterfollower power amplifier.
EQUIPMENT REQUIRED:
Protoboard
Function Generator
Digital Multimeter
Power Supply
Resistors
Capacitors 2x10µF, 220uF
Diodes: 2x 1N914 or 1N4148
Transistors: 1xQ2N3904.
1xQ2N3906
INTRODUCTION:
POWER AMPLIFIER:
Power Amplifiers are large signal amplifiers .This generally means that a much larger portion of
the load line is used during signal operation than in a small signal amplifier.
Power amplifiers are normally used as the final stage of a communications receiver or transmitter
to provide signal power to speakers or to transmitting antenna.
CLASS B AND CLASS AB PUSH-PULL AMPLIFIERS:
When an amplifier is biased at cut-off so that it operates in the linear region for 180o of the input
cycle and is in cutoff for 180o, it is a class B amplifier. Class AB amplifiers are biased to conduct
for slightly more than 180o .The primary advantage of a class B or class AB amplifier over a
class A amplifier is that either one is more efficient than a class A amplifier; you can get more
output power for a given amount of input power. A disadvantage of class B or class AB is that it
is more difficult to implement the circuit in order to get a linear reproduction of the input
waveform.
41 NED University of Engineering & Technology, Department of Electronic Engineering
CLASS B OPERATION:
The class B operation is illustrated in fig.1. where the output is shown relative to the input in
terms of time (t).
Fig 1. Basic Class B Amplifier operation.
THE Q-POINT IS AT CUTOFF:
The class B amplifier is biased at the cutoff point so that ICQ=0 and VCEQ=VCE (cutoff) .It is brought
out of cutoff and operates in its linear region when the input signal drives the transistor into
conduction. This is illustrated in fig.2 with an emitter-follower circuit where, the output is not
replica of the input.
CLASS B PUSH-PULL OPERATION:
The circuit in fig.2 only conducts for the positive half cycle of the cycle. To amplify the entire
cycle, it is necessary to add a second class B amplifier that operates on the negative half of the
cycle. The combination of two class B amplifiers working together is called push-pull operation.
There are two common approaches for using for using push-pull amplifiers to reproduce the
entire waveform. The first approach uses transformer coupling. The second uses two
complementary symmetry transistors; these are a matching pair of npn/pnp BJTs or a matching
pair of n-channel/p-channel FETs.
Fig.2: Common collector class B amplifier
42 NED University of Engineering & Technology, Department of Electronic Engineering
TRANSFORMER COUPLING:
Transformer coupling is illustrated in fig.3.The input transformer is center-tapped secondary that
is connected to ground, producing phase inversion of one side with respect to the other. The
input transformer thus converts the input signal of two out-of-phase signals for the transistors.
Notice that both transistors are npn types. Because of the signal inversion, Q1 will conduct on the
positive part of the cycle and Q2 will conduct on the negative part. The output transformer
combines the signals by permitting current in both the directions, even though one transistor is
always cut-off. The positive power supply signal is connected to the center tap of the output
transformer.
Fig.3: Transformer coupled push-pull amplifiers
COMPLEMENTARY SYMMETRY TRANSISTORS:
Fig.4 shows a push-pull class B amplifier using two emitter-followers and both positive and
negative power supplies. This is a complementary amplifier because one emitter-follower uses
an npn transistor and the other a pnp, which conduct on opposite alterations of the input cycle. In
this circuit there is no dc base bias voltage (VB=0) .Thus, only the signal voltage drives the
transistors into conduction. Tranisistor Q1conducts during the positive half of the input cycle,
and Q2 conducts during the negative half.
43 NED University of Engineering & Technology, Department of Electronic Engineering
Fig.4: Class B push-pull ac operation.
CROSSOVER DISTORTION:
When the dc base voltage is zero, both transistors are off and the input signal voltage must
exceed VBE before a transistor conducts. Because of there is a time interval between the positive
and negative alternations of the input when neither transistor is conducting as shown in fig.5.
The resulting distortion in the output waveform is called crossover distortion.
Fig.5: Crossover distortion in a class B push-pull amplifier
44 NED University of Engineering & Technology, Department of Electronic Engineering
BIASING THE PUSH-PULL AMPLIFIER FOR CLASS AB OPERATION:
To overcome crossover distortion, the biasing is adjusted to overcome the VBE of the transistors;
this results in a modified form of operation called class AB. In class AB operation, the push-pull
stages are biased into slight conduction, even when no input signal is present. This can be done
with a voltage-divider and diode arrangement, as shown in fig.6.When the diode characteristics
of both diodes are closely matched to the characteristics of the transistor emitter-base junctions,
the current in the diodes and the current in the transistors are the same; this is a current mirror. In
the bias path both the resistors are also of equal value.
Fig.6: Biasing the push-pull amplifier to eliminate crossover distortion
The collector current can be given as:
AC OPERATION:
The AC collector saturation current with a push-pull amplifier is given as:
45 NED University of Engineering & Technology, Department of Electronic Engineering
The AC load line for the class AB amplifier is shown in fig.7
Fig.7: Load lines for a complementary symmetry push-pull amplifier. Only the load lines for the npn transistor are shown
Under maximum condition, Q1and Q2 are alternatively driven from near cutoff to near saturation
that is for Q1 from 0V to +VCC and for Q2 from 0V and to –VCC. The main advantage of class
B/AB amplifier over the class A is that there is very little current in the transistor when there is
no input signal .This results in low power dissipation when there is no signal.
MAXIMUM OUTPUT POWER:
The maximum output power of class B/AB amplifier is given as:
Where
And
DC INPUT POWER:
The DC input power from VCC is given by:
46 NED University of Engineering & Technology, Department of Electronic Engineering
EFFICIENCY:
Efficiency is defined as the ratio of AC output power to DC input power .So
SINGLE-SUPPLY PUSH-PULL AMPLIFIER:
Push-Pull amplifiers using complementary symmetry transistors can be operated from a single
voltage source as shown in fig.8.The circuit operation is the same as described previously, except
the bias is set to force the output emitter voltage to be VCC/2 instead of 0v used with two
supplies. Because the output is not biased at 0V capacitive coupling for the input and output is
necessary to block the bias voltage from the source and the load resistor .Ideally the output
voltage can swing from zero to VCC , but in practice it does not quite reach these ideal values.
Fig.8:Single-ended push-pull amplifier
47 NED University of Engineering & Technology, Department of Electronic Engineering
PRELAB ASSIGNMENT:
Use the computer software tool Orcad PSPICE to simulate the two circuits .Make sure to
bring the PSPICE results to the laboratory. In addition to being an aid in immediately
verifying measured results, they will be the basis of your Pre-lab grade for this lab.
Specifically, the following items must be addressed using Orcad PSPICE as part of the prelab
assignment:
For the circuit in Fig 9(a) and 9(b).
 Transient response (time-domain) with vin = 3 V (peak), showing plots of input
and output voltage waveforms separately.
Fig. 9 (a) : Class B push-pull Power amplifier circuit to be implemented
48 NED University of Engineering & Technology, Department of Electronic Engineering
Fig. 9 (b): Class AB push-pull Power amplifier circuit to be implemented
PROCEDURE
14. Wire the circuit shown in figure 9(a).
15. Connect channel 1 of your oscilloscope at the input and channel 2 at the output.
16. Apply power to the bread board and adjust the sine the wave output level of the generator at 6 V
peak-to-peak at a frequency of 1 kHz .Observe amplifier’s input and output waveform. Measure
the base-to-emitter voltages required for both transistor to become forward biased, recording
these values in table 1
17. Disconnect the power and signal generator leads from the bread board and replace the resistance
R2 and R3 with two 1N914 (or 1N4148) compensating diodes in series between the two transistor
base leads as shown in figure 9(b). Again connect the power and signal generator to the bread
board and observe the input and output waveforms.
18. With a VOM or DMM individually measure the transistor dc base 1, base 2 and emitter voltages
with respect to ground recording your results in table 2.
19. Now carefully increase the peak-to-peak input signal so that the output peaks just clip off. With
VOM or DMM measure the rms voltage across the 1kΩ load resistor {Vo(rms)},and compute
the rms output power of the amplifier (Equation 2) record these result is table 3.
20. In order to measure the dc power supplied to the amplifier while amplifying an input
signal, use VOM or DMM to measure the dc collector current Icc of either transistor.
Compute the dc power supplied (Equation 3) recording your results in table 3.
21. Finally, compute the percent efficiency (%η) of your amplifier, and compare it with the
theoretical maximum of 78.5% of a class B amplifier. Record your result in table 3. If a
value greater than 78.5% is calculated, then repeat steps 6 and 7, trying to determine the
source of your error.
49 NED University of Engineering & Technology, Department of Electronic Engineering
USEFUL FORMULAS:
OBSERVATION:
Table 1:
Voltage Divider Bias with crossover distortion
Parameter
Measured Value
VBE1
VBE2
Table 2:
Diode (Current Mirror) bias with no crossover distortion
Parameter
Measured Value
VB1
VB2
VE
50 NED University of Engineering & Technology, Department of Electronic Engineering
Table 3:
Class B Amplifier Efficiency
Parameter
Vo(rms)
Icc
Parameter
Measured Value
Calculated
Value
Po(rms)
Pdc
%η
CALCULATIONS:
CONCLUSIONS
51 NED University of Engineering & Technology, Department of Electronic Engineering
Lab No. 7
OBJECTIVE:
 The purpose of this experiment is to demonstrate the operation and characteristics of a
Butterworth Sallen and Key 2nd-order low-pass active filter.
EQUIPMENT REQUIRED:
Protoboard
Function Generator
Digital Multimeter
Power Supply
Resistors
Capacitors 2x0.0033-µF
741op-amp (8-pin mini DIP)
INTRODUCTION:
FILTERS:
Filters are circuits that are capable of passing signals with certain selected frequencies while
rejecting signals with other frequencies. This property is called selectivity.
TYPES OF FILTERS:
Active filters use transistors or op-amps combined with passive RC, RL or RLC circuits. The
active devices provide voltage gain, and the passive circuits provide frequency selectivity. In
terms of general response the four basic categories of active filters are low-pass , high-pass,
band-pass and band-stop.
PASSBAND OF FILTER:
The passband of a filter is the range of frequencies that are allowed to pass through the filter with
minimum attenuation (usually defined as less than -3dB of attenuation).
CRITICAL FREQUENCY:
The critical frequency, fc also called the cutoff frequency defines the end of pass band and is
normally specifies at the point where the response drops -3dB (70.7%) from the pass band
response.
52 NED University of Engineering & Technology, Department of Electronic Engineering
As shown in fig.1(a) following the pass band is a region called the transition region that leads
into a region called the stop band.
Fig 1(a): Practical low-pass filter response
Fig 1(b): First order (one-pole) low pass filter
The critical frequency is determined by the values of the resistors and capacitors in the frequency
selective RC circuit .For a single pole (first order) filter as shown in fig 1(b).the critical
frequency is:
1
2П
The same formula is used for the fc of a single pole high pass filter. The number of poles
determines the roll-off rate of the filter. A Butterworth response produces -20dB/decade/pole. So
53 NED University of Engineering & Technology, Department of Electronic Engineering
a first order one pole filter has a roll-off of -20dB/decade; a second order (two pole ) filter has a
roll-off of -40dB/decade; a third order (two pole ) filter has a roll-off of -60dB/decade and so on.
LOW-PASS FILTER RESPONSE:
Fig. 1 (c ): Idealized low-pass filter responses
A low-pass filter is one that passes frequencies from dc to fc and significantly attenuates all other
frequencies. The passband of ideal low-pass filter is shown in fig.1.(c); the response drops to
zero at frequencies beyond the passband. This ideal response is sometimes referred to as the
“brick-wall“because nothing gets through beyond the wall. The bandwidth of ideal lowpass filter
is equal to fc.
The ideal filter response is shown in fig.1(c)is not attainable by any practical filter .Actual filter
responses depend on the number of poles , a term used with filters to describe the number of RC
circuits contained in the filter.
The most basic low-pass filter is a simple RC circuit consisting of just one resistor and one
capacitor, the output is taken across the capacitor as shown in fig.1 (d).
Fig 1(d) : Basic low-pass circuit
54 NED University of Engineering & Technology, Department of Electronic Engineering
The basic RC filter has a single pole, and it rolls off at -20dB/decade beyond the critical
frequency. The -20dB/decade roll-off rate for the gain of a basic RC filter means that at a
frequency of 10fc , the output will be -20dB (10%) of the input.
The critical frequency of a low-pass RC filter occurs when Xc =R, where
1
2П
In order to produce a filter that has a steeper transition region (and hence from a more effective
filter) , it is necessary to add additional circuitry to the basic filter. Responses that are steeper
than-20dB/decade in the transition region cannot be attained by simply cascading ideal RC
stages .However by combining an op-amp with frequency selective feedback circuits filters can
be designed with roll-off rates of -40, -60 or more dB/decade .Filters that include one or more
op-amps in the design are called active filters. These filters can optimize the roll-off rate or other
attribute with a particular filter design. In general the more poles the filter uses the steeper its
transition region will be. The exact response depends on the type of filter and the number of
poles.
FILTER RESPONSE CHARACTERISTICS:
Each type of filter response can be tailored by circuit component values to have either a
Butterworth, Chebyshev or Bessel characteristics. Each of these characteristics is identified by
the shape of the response curve, and each has an advantage in certain applications. A general
comparison of the three response characteristics for a lo-pass filter response curve is shown in
fig.2
Fig. 2:Comparative plots of three types of filter response characteristics
55 NED University of Engineering & Technology, Department of Electronic Engineering
BUTTERWORTH CHARACTERISTICS:
The Butterworth characteristics provides a very flat amplitude response in the passband and a
roll-off rate of -20dB/decade/pole .the phase response is not linear , however and the phase shift
(thus time delay) of signals passing through the filter varies nonlinearly with frequency. Filters
with the Butterworth response are normally used when all frequencies in the passband must have
the same gain. The Butterworth response is often referred to as a maximally flat response.
THE CHEBYSHEV CHARACTERISTIC:
Filters with the chebyshev response characteristics are useful when a rapid roll-off is required
because it provides a roll-off rate greater than -20dB/decade/pole .This is a greater rate than that
of the butterworth , so filters can be implemented with the chebyshev response with fewer poles
and less complex circuitry for a given roll-off rate .This type of filter response is characterized
by overshoot or ripples in the passband (depending on the number of poles) and an even less
linear phase response than the butterworth.
THE BESSEL CHARACTERISTIC:
The Bessel response exhibits a linear phase characteristic, meaning that the phase shift increases
linearly with frequency. The result is almost no overshoot on the output with a pulse input . For
this reason, filter with Bessel response are used for filtering pulse waveforms without distorting
the shape of the waveform.
DAMPING FACTOR:
Fig. 3: General diagram of an active filter
56 NED University of Engineering & Technology, Department of Electronic Engineering
The damping factor (DF) of an active filter circuit determines which response characteristics the
filter exhibits. For the circuit in fig.3 the DF is given by :
2
Basically the damping factor affects the filter response by negative feedback action .Any
attempted increase or decrease in the output voltage is offset by the opposing effect of the
negative feedback. This tends to make the response curve flat in the passband of the filter if the
value of the damping factor is precisely set.
The value of the damping factor required to produce a desired response characteristic depends on
the order (number of poles) for the filter. A pole for our purpose is simply a circuit with one
resistor and one capacitor .The more poles a filter has ,the faster its roll-off rate is .To achieve a
second order butterworth response , for example the damping factor must be 1.414 .To
implement this damping factor the feedback resistor ratio must be
2
2
1.414
0.586
This ratio gives the closed loop gain of the non-inverting filter amplifier Acl(NI) a value of 1.586,
derived as follows :
1
1
1
0.586
1
1.586
BUTTERWORTH SALLEN AND KEY 2ND-ORDER LOW-PASS FILTER:
Fig. 4: Basic Sallen-Key low pass filter
57 NED University of Engineering & Technology, Department of Electronic Engineering
Fig.4 shows a 2nd order Butterworth low pass filter. There are two low pass RC circuits that
provide a roll-off of -40dB/decade above the critical frequency. One RC circuit consists of RA
and CA and the second circuit consists of RB and CB. A unique feature is the capacitor CA that
provides feedback for shaping the response near the edge of the pass-band. The critical
frequency of the 2nd order Butterworth low pass filter is:
1
2П
For simplicity the component values can be made equal so that RA =RB = R and CA = CB =C. In
this case the expression for the critical frequency simplifies to:
1
2П
The op-amp in the second-order Butterworth filter acts as a non-inverting amplifier with the
negative feedback provided by the R1/R2 circuit. The damping factor is set by the values of R1
and R2 , which must be set as 1.414 in order to make as second order Butterworth Filter.
SCHEMATIC:
Fig.5: Low-pass filter circuit to be implemented
58 NED University of Engineering & Technology, Department of Electronic Engineering
Fig 6: 741 op-amp pin configuration
PRELAB ASSIGNMENT:
Use the computer software tool Orcad PSPICE to simulate the two circuits .Make sure to
bring the PSPICE results to the laboratory. In addition to being an aid in immediately
verifying measured results, they will be the basis of your Pre-lab grade for this lab.
Specifically, the following items must be addressed using Orcad PSPICE as part of the prelab
assignment:
 AC Response (output voltage Vs Frequency) with vin (p-p) = 1V .
PROCEDURE
1. Wire the circuit shown in the schematic diagram.
2. Apply power to the breadboard, and adjust the input signals voltage to 1V peak-to-peak
at frequency of 100 Hz.
3. From the formulas for the cut off frequency, calculate the cut-off frequency.
4. With the input frequency set at 100 Hz, calculate the peak-to-peak output voltage.
5. Now the very generator’s frequency (fin), keeping the input voltage constant at 1 V peakto-peak in order to complete the required data. At higher frequencies you may have to
increase the input voltage to obtain a measureable output level .Using the dB frequency
response formula (Equation 5) calculate the expected dB response using the cutoff
frequency as calculated from the formula. Then plot the experimental results on the
graph paper.
6. The filter’s cut-off frequency is the frequency at which the dB frequency response is 3dB
less than the dB passband gain. This value is equivalent to an output voltage that is 0.707
times the input voltage of the filter. From your graph, estimate the filter’s cutoff
frequency, and compare it with the value calculated in step 4.
59 NED University of Engineering & Technology, Department of Electronic Engineering
FORMULAS
TABLE :
Input
Frequency(Hz)
100
Vin
Vout / Vin
Vout
1V
200
300
400
500
600
800
1000
2000
4000
5000
6000
8000
10,000
60 Experimental
dB Gain
Expected dB
Gain
NED University of Engineering & Technology, Department of Electronic Engineering
CALCULATIONS:
CONCLUSION:
The cutoff frequency of the filter as calculated is: ________
The cutoff frequency of the filter as simulated is: ________
The cutoff frequency of the filter as measured is: ________
61 NED University of Engineering & Technology, Department of Electronic Engineering
Lab No. 8
OBJECTIVE:
 The purpose of this experiment is to demonstrate the operation and characteristics of a
Butterworth 2nd-order Sallen and Key 2nd-order high-pass active filter.
EQUIPMENT REQUIRED:
Protoboard
Function Generator
Digital Multimeter
Power Supply
Resistors
Capacitors 2x0.0047µF
741op-amp (8-pin mini DIP)
INTRODUCTION:
HIGH-PASS FILTER RESPONSE:
Fig 1(a): Practical high-pass filter response
A high pass filter is one that significantly attenuates or rejects all frequencies below fc and passes
all frequencies above fc.The critical frequency is again the frequency at which the output is
62 NED University of Engineering & Technology, Department of Electronic Engineering
70.7% of the input (or -3dB) as shown in figure 1(a).Ideally the passband of a high pass filter is
all frequencies above the critical frequency. The high frequency response of practical circuits is
limited by the op-amp or other components that make up the filter.
Fig 1(b): Basic High-pass circuit
A simple RC circuit consisting of single resistor and capacitor can be configured as high-pass
filter by taking the output across the resistor as shown in figure 1(b).As in the case of low-pass
filter the basic RC circuit has a roll-off rate of -20dB/decade .Also the critical frequency for the
basic high-pass filter occurs when Xc= R where,
1
2П
BUTTERWORTH 2ND-ORDER SALLEN AND KEY 2ND-ORDER HIGH-PASS
FILTER:
Fig 2: Basic Sallen-Key high pass filter
63 NED University of Engineering & Technology, Department of Electronic Engineering
Figure 2 shows a second order butterworth high pass filter .The components RA, CA, RB, CB form
the two-pole frequency-selective circuit. The position of the resistors and capacitors in the
frequency selective circuit is opposite to those in the low-pass configuration.
SCHEMATIC:
Fig.3: High pass filter circuit to be implemented
Fig. 4: 741 op-amp pin configuration
64 NED University of Engineering & Technology, Department of Electronic Engineering
PRELAB ASSIGNMENT:
Use the computer software tool Orcad PSPICE to simulate the two circuits .Make sure to
bring the PSPICE results to the laboratory. In addition to being an aid in immediately
verifying measured results, they will be the basis of your Pre-lab grade for this lab.
Specifically, the following items must be addressed using Orcad PSPICE as part of the prelab
assignment:
 AC Response (output voltage Vs Frequency) with Vin = 1V.
PROCEDURE:
7. Wire the circuit shown in the schematic diagram.
8. Apply power to the breadboard, and adjust the input signals voltage to 1V peak-to-peak
at frequency of 10 kHz.
9. From the formulas for the cut off frequency, calculate the cut-off frequency.
10. With the input frequency set at 10 kHz, calculate the peak-to-peak output voltage.
11. Now the very generator’s frequency (fin), keeping the input voltage constant at 1 V peakto-peak in order to complete the required data in table 1. At lower frequencies you may
have to increase the input voltage to obtain a measureable output level .Using the dB
frequency response formula (Equation 5) calculate the expected dB response using the
cutoff frequency as calculated from the formula. Then plot the experimental results on the
graph paper.
12. The filter’s cut-off frequency is the frequency at which the dB frequency response is 3dB
less than the dB pass band gain. This value is equivalent to an output voltage that is 0.707
times the input voltage of the filter. From your graph, estimate the filter’s cutoff
frequency, and compare it with the value calculated in step 4.
65 NED University of Engineering & Technology, Department of Electronic Engineering
TABLE
:
Input Frequency (Hz)
100
Vin
Vout
1V
200
300
400
500
600
800
1000
2000
4000
5000
6000
8000
10,000
66 Vout / Vin
Experimental
dB Gain
Expected dB
Gain
NED University of Engineering & Technology, Department of Electronic Engineering
CALCULATIONS:
CONCLUSION:
The cutoff frequency of the high pass filter as calculated is: ________
The cutoff frequency of the high pass filter as simulated is: ________
The cutoff frequency of the high pass filter as measured is: ________
67 NED University of Engineering & Technology, Department of Electronic Engineering
Lab No. 9
OBJECTIVE:
 The purpose of this experiment is to demonstrate the operation and characteristics of a
multiple-feedback active band-pass filter.
EQUIPMENT REQUIRED:
Protoboard
Function Generator
Digital Multimeter
Power Supply
Resistors
Capacitors 2x0.01µF
741op-amp (8-pin mini DIP)
INTRODUCTION:
BAND-PASS FILTER RESPONSE:
Fig. 1: General Band-pass response curve
A band-pass filter passes all signals lying within a band between a lower frequency limit and an
upper frequency limit and essentially rejects all other frequencies that are outside this specified
band. A generalized band-pass response curve is shown in fig.1. The bandwidth is defined as the
difference between the upper critical frequency (fc2) and the lower critical frequency (fc1) .
68 NED University of Engineering & Technology, Department of Electronic Engineering
The critical frequencies are of course the points at which the response curve is 70.7% of its
maximum.
The frequency about which the pass-band is centered is called the centre frequency fo, defined as
the geometric mean of the critical frequencies.
QUALITY FACTOR:
The quality factor (Q) of a band-pass filter is the ratio of the centre frequency to the bandwidth.
The value of Q is an indication of the selectivity of a band-pass filter. The higher the value of Q ,
the narrower the bandwidth and the better the selectivity for a given value of fo . Band-pass filters
are sometimes classified as narrowband (Q>10) or wide-band (Q<10) .The quality factor can
also be expressed in terms of the damping factor (DF) of the filter as
1
ACTIVE BAND-PASS FILTERS:
Band-pass filters pass all frequencies bounded by a lower frequency limit and an upper
frequency limit and reject all others lying outside this specified band .A band-pass response can
be thought of as the overlapping of a low-frequency response curve and a high frequency
response curve.
CASCADED LOW-PASS AND HIGH-PASS FILTERS:
Fig 2(a): Band-pass filter formed by cascading a two-pole high pass and a two-pole low pass circuit
69 NED University of Engineering & Technology, Department of Electronic Engineering
Fig 2(b): band-pass filter response
One way to implement a band-pass filter is a cascaded arrangement of a high-pass filter and a
low-pass filter , as shown in figure 2(a) as long as the critical frequencies are sufficiently
separated .The roll-off rate for each filter is -40dB/decade which is as indicated in the composite
response curve of figure 2(b).The critical frequency of each filter is chosen so that the response
curves overlap sufficiently. The critical frequency of the high pass filter must be sufficiently
lower than that of the low pass stage. The filter is generally limited to wide bandwidth
applications.
The lower critical frequency fc1 of the band-pass is the critical frequency of the high-pass filter.
The upper frequency fc2 is the critical frequency of the low-pass filter .Ideally the centre
frequency fo of the passband is the geometric mean of fc1 and fc2 .The following formulas express
the three frequencies of the band-pass filter in figure 2(a).
1
2П
1
2П
If equal-value components are used in implementing each filter, the critical frequency equations
simplify to the form
П
70 NED University of Engineering & Technology, Department of Electronic Engineering
MULTIPLE-FEEDBACK BAND-PASS FILTER:
Fig. 3: Multiple-feedback band-pass filter
Another type of filter configuration shown in fig.3 is a multiple feedback band-pass filter .The
two feedback paths are through R2 and C1 . Components R1 and C1 provide the low pass response,
and R2 and C2 provide the high-pass response .The maximum gain Ao occurs at the centre
frequency.
An expression for the centre frequency is developed as follows, recognizing that R1 and R3
appear in parallel as viewed from C1 feedback path (with the Vin source replaced by a short).
1
‖
2П
Making C1 =C2 = C yields
1
2П
71 NED University of Engineering & Technology, Department of Electronic Engineering
SCHEMATIC:
Fig 4:Band-pass filter circuit to be implemented
Fig. 5: 741 op-amp pin configuration
PRELAB ASSIGNMENT:
Use the computer software tool Orcad PSPICE to simulate the two circuits .Make sure to
bring the PSPICE results to the laboratory. In addition to being an aid in immediately
verifying measured results, they will be the basis of your Pre-lab grade for this lab.
Specifically, the following items must be addressed using Orcad PSPICE as part of the prelab
assignment:
 AC Response (output voltage Vs Frequency) with Vin = 1V.
72 NED University of Engineering & Technology, Department of Electronic Engineering
PROCEDURE
13. Wire the circuit shown in the schematic diagram.
14. Apply power to the breadboard, and adjust the output of the signal generator at 1V peakto-peak at frequency of 1kHz.
15. Now vary the signal generator’s frequency to the point at which the output voltage of the
filter as displayed on the channel 2 of the oscilloscope reaches its maximum peak to peak
amplitude. Measure the peak-to-peak output voltage and then determine the center
frequency voltage gain Vout/Vin recording your data in table 1.
16. Using oscilloscope, determine the filter’s output frequency without disturbing the
frequency setting of the signal generator, recording your result in Table 1.
17. Now determine the filter’s bandwidth by measuring both the upper and the lower 3-dB
frequencies at which the output voltage drops to 0.71 v peak-to-peak (1.0v×0.707≃0.71).
Determine the frequency at this point, called the lower 3-dB frequency (fL) and record
your result in Table 2.
18. Now increase the signals generator’s frequency beyond the center frequency, and stop at
the point at which the filter’s peak-to-peak output voltage is gain 0.71 V. determine the
frequency at this point, called the upper 3-dB frequency (fH) and record your result in
Table 2.
19. Subtract the lower 3-dB frequency from the upper 3-dB frequency, obtaining the 3-dB
bandwidth of the filter. Record your result in Table 2.Calculate the filter’s Q, or quality
factor, and record your resulting Table 2.
20. From the two measured 3-dB frequencies, you can determine the filter’s center frequency
by taking the geometric average:
fo = (fLfH)1/2
73 NED University of Engineering & Technology, Department of Electronic Engineering
FORMULAS
Observation:
Table 1
V
Input Voltage Vin
Input Voltage Vout
V
Center Frequency
Voltage Gain Ao
V
Center Frequency Fo
V
74 NED University of Engineering & Technology, Department of Electronic Engineering
Table 2
Lower 3dB
Frequency , fL
Hz
Upper 3dB
Frequency , fH
Hz
3dB Bandwidth BW
Hz
Quality Factor, Q
Table 3
Input Frequency
(Hz)
100
Vin
Vout/ Vin
Vout
1V
200
400
600
800
1000
2000
4000
6000
8000
10000
75 Measure dB
Gain
NED University of Engineering & Technology, Department of Electronic Engineering
CALCULATIONS:
CONCLUSION:
The centre frequency of the band pass filter as measured is: ________
The lower critical frequency of the band pass filter as measured is: ________
The upper critical frequency of the band pass filter as measured is: ________
76 NED University of Engineering & Technology, Department of Electronic Engineering
Lab No. 10
OBJECTIVE:
To demonstrate the design and operation of an op-amp based Wien-Bridge oscillator.
EQUIPMENT REQUIRED:
Protoboard
Function Generator
Digital Multimeter
Power Supply
Resistors
Capacitors 2x1nF
741op-amp (8-pin mini DIP)
THEORY:
THE OSCILLATOR
Oscillators are electronic circuits that generate an output signal without the necessity of an input
signal. It produces a periodic waveform on its output with only the DC supply voltage as an
input. The output voltage can be either sinusoidal or non-sinusoidal, depending on the type of
oscillator. Different types of oscillators produce various types of outputs including sine waves,
square waves, triangular waves, and sawtooth waves. A basic oscillator is shown in Figure 1.
TYPES OF OSCILLATOR:
Oscillators can be of 2 types.
1) Feedback Oscillators
2) Relaxation oscillators
77 NED University of Engineering & Technology, Department of Electronic Engineering
FEEDBACK OSCILLATORS :
One type of oscillator is the feedback oscillator, which returns a fraction of the output signal to
the input with no net phase shift, resulting in a reinforcement of the output signal. After
oscillations are started, the loop gain is maintained at 1.0 to maintain oscillations.
A feedback oscillator consists of an amplifier for gain (either a discrete transistor or an op-amp)
and a positive feedback circuit that produces phase shift and provides attenuation, as shown in
Figure 2.
RELAXATION OSCILLATORS :
A second type of oscillator is the relaxation oscillator. Instead of feedback, a relaxation oscillator
uses an RC timing circuit to generate a waveform that is generally a square wave or other
nonsinusoidal waveform. Typically, a relaxation oscillator uses a Schmitt trigger or other device
that changes states to alternately charge and discharge a capacitor through a resistor.
FEEDBACK OSCILLATORS:
Feedback oscillator operation is based on the principle of positive feedback. Feedback
oscillators are widely used to generate sinusoidal waveforms.
POSITIVE FEEDBACK:
In positive feedback, a portion of the output voltage of an amplifier is fed back to the input with
no net phase shift, resulting in a strengthening of the output signal. This basic idea is illustrated
in Figure 3(a).
78 NED University of Engineering & Technology, Department of Electronic Engineering
As you can see, the in-phase feedback voltage is amplified to produce the output voltage,
which in turn produces the feedback voltage. That is, a loop is created in which the signal
maintains itself and a continuous sinusoidal output is produced. This phenomenon is called
oscillation.
In some types of amplifiers, the feedback circuit shifts the phase and an inverting amplifier is
required to provide another phase shift so that there is no net phase shift. This is illustrated in
Figure 3(b).
CONDITIONS FOR OSCILLATION :
Two conditions, illustrated in Figure 4, are required for a sustained state of oscillation:
1. The phase shift around the feedback loop must be effectively .
2. The voltage gain,Acl , around the closed feedback loop (loop gain) must equal 1 (unity).
79 NED University of Engineering & Technology, Department of Electronic Engineering
The voltage gain around the closed feedback loop, Acl , is the product of the amplifier gain,Av ,
and the attenuation B , of the feedback circuit.
Acl = Av x B
If a sinusoidal wave is the desired output, a loop gain greater than 1 will rapidly cause the output
to saturate at both peaks of the waveform, producing unacceptable distortion. To avoid this,
some form of gain control must be used to keep the loop gain at exactly 1 once oscillations have
started.
For example, if the attenuation of the feedback circuit is 0.01, the amplifier must have a gain of
exactly 100 to overcome this attenuation and not create unacceptable distortion(100 x0.01=1).
An amplifier gain of greater than 100 will cause the oscillator to limit both peaks of the
waveform.
START-UP CONDITIONS:
The unity-gain condition must be met for oscillation to be maintained.
For oscillation to begin, the voltage gain around the positive feedback loop must be greater than
1 so that the amplitude of the output can build up to a desired level.The gain must then decrease
to 1 so that the output stays at the desired level and oscillation is sustained.The voltage gain
conditions for both starting and sustaining oscillation are illustrated in Figure 5.
OSCILLATION WITH RC FEEDBACK CIRCUITS:
Three types of feedback oscillators that use RC circuits to produce sinusoidal outputs are the
 Wien-bridge oscillator
 Phase-shift oscillator
 Twin-T oscillator
Generally, RC feedback oscillators are used for frequencies up to about 1 MHz.
The Wien-bridge is by far the most widely used type of RC feedback oscillator for this range of
frequencies.
80 NED University of Engineering & Technology, Department of Electronic Engineering
WIEN-BRIDGE OSCILLATOR
One type of sinusoidal feedback oscillator is the Wien-bridge oscillator.A fundamental part of
the Wien-bridge oscillator is a lead-lag circuit like that shown in Figure 6(a). R1 and C1 together
form the lag portion of the circuit; R2 and C2 form the lead portion.
The operation of this lead-lag circuit is as follows.
o At lower frequencies, the lead circuit takes over due to the high reactance of C2 .
o As the frequency increases, XC2 decreases, thus allowing the output voltage to
increase.
o At some specified frequency, the response of the lag circuit takes over, and the
decreasing value of XC1causes the output voltage to decrease.
The response curve for the lead-lag circuit shown in Figure 6(b) indicates that the output voltage
peaks at a frequency called the resonant frequency,fr . At this point, the attenuation (Vout/Vin) of
the circuit is 1/3 if R1=R2 and XC1 =XC2 as stated by the following equation
The formula for the resonant frequency is
To summarize, the lead-lag circuit in the Wien-bridge oscillator has a resonant frequency, , at
which the phase shift through the circuit is and the attenuation is 1/3.
Below , fr the lead circuit dominates and the output leads the input. Above, fr the lag circuit
dominates and the output lags the input.
81 NED University of Engineering & Technology, Department of Electronic Engineering
THE BASIC CIRCUIT :
The lead-lag circuit is used in the positive feedback loop of an op-amp, as shown in Figure 7(a).
A voltage divider is used in the negative feedback loop. The Wien-bridge oscillator circuit can be
viewed as a noninverting amplifier configuration with the input signal fed back from the output
through the lead-lag circuit. Recall that the voltage divider determines the closed-loop gain of the
amplifier.
The circuit is redrawn in Figure 7(b) to show that the op-amp is connected across the bridge
circuit. One leg of the bridge is the lead-lag circuit, and the other is the voltage divider.
POSITIVE FEEDBACK CONDITIONS FOR OSCILLATION:
As you know, for the circuit output to oscillate, the phase shift around the positive feedback loop
must be 0° and the gain around the loop must equal unity (1). The 0° phase-shift condition is met
when the frequency is fr because the phase shift through the lead-lag circuit is 0° and there is no
inversion from the noninverting input of the op-amp to the output. This is shown in Figure 8(a).
82 NED University of Engineering & Technology, Department of Electronic Engineering
The unity-gain condition in the feedback loop is met when
This offsets the 1/3 attenuation of the lead-lag circuit, thus making the total gain around the
positive feedback loop equal to 1, as shown in Figure 8(b). - To achieve a closed-loop gain of 3,
START-UP CONDITIONS
Initially, the closed-loop gain of the amplifier itself must be more than 3 (Acl > 3)until the output
signal builds up to a desired level. Ideally, the gain of the amplifier must then decrease to 3 so
that the total gain around the loop is 1 and the output signal stays at the desired level, thus
sustaining oscillation. This is illustrated in Figure 9.
83 NED University of Engineering & Technology, Department of Electronic Engineering
Initially, a small positive feedback signal develops from noise. The lead-lag circuit
permits only a signal with a frequency equal to to appear in phase on the noninverting
input. - This feedback signal is amplified and continually strengthened,resulting in a
buildup of the output voltage. When the output signal reaches the zener breakdown
voltage, the zeners conduct and effectively short out .This lowers the amplifier’s closedloop gain to 3. At this point, the total loop gain is 1 and the output signal levels off and
the oscillation is sustained.
PRELAB ASSIGNMENT:
Use the computer software tool Orcad PSPICE to simulate the circuit .Make sure to bring the
PSPICE results to the laboratory. In addition to being an aid in immediately verifying
measured results, they will be the basis of your Pre-lab grade for this lab.
Specifically, the following items must be addressed using Orcad PSPICE as part of the prelab
assignment:
 Transient response (time-domain) showing waveforms of output voltage.
84 NED University of Engineering & Technology, Department of Electronic Engineering
Fig. 11: Circuit to be implemented
PROCEDURE:
1.Wire the circuit
2. Apply + 15V supply connections to the bread board.
3.Turn 100kΩ potentiometer completely clock-wise
4. Connect one probe of the oscilloscope to the output of the circuit and the second
probe to the positive pin of op-amp.
5. Adjust the potentiometer to obtain a sine wave across the output.
6. Calculate the theoretical value of the frequency at which the circuit should oscillate as
given by the formula.
7. Measure the oscillation frequency with an oscilloscope.
USEFUL FORMULA:
85 NED University of Engineering & Technology, Department of Electronic Engineering
OBSERVATION:
Parameter
R2
fr
Measured
Expected
CALCULATIONS:
RESULT:
The resonant frequency as measured comes out to be: ___________
The resonant frequency as calculated comes out to be: ____________
R2 as measured comes out to be: ______________
R2 as calculated comes out to be: ______________
86 % error
NED University of Engineering & Technology, Department of Electronic Engineering
Lab No. 11
OBJECTIVE:
To demonstrate the design and operation of an op-amp based Phase-Shift oscillator.
EQUIPMENT REQUIRED:
Protoboard
Function Generator
Digital Multimeter
Power Supply
Resistors
5kΩ potentiometer
Capacitors 3x0.1uF
741op-amp (8-pin mini DIP)
THEORY:
THE PHASE-SHIFT OSCILLATOR:
Figure 12 shows a sinusoidal feedback oscillator called the phase-shift oscillator.
Each of the three RC circuits in the feedback loop can provide a maximum phase shift
approaching 90°.
Oscillation occurs at the frequency where the total phase shift through the three RC circuits is
180°. The inversion of the op-amp itself provides the additional 180° to meet the requirement for
oscillation of a 360° (or 0°) phase shift around the feedback loop. The attenuation, , of the threesection RC feedback circuit is
87 NED University of Engineering & Technology, Department of Electronic Engineering
To meet the greater-than-unity loop gain requirement, the closed-loop voltage gain of the op-amp
must be greater than 29 (set by R3and Rf).The frequency of oscillation fr is given as
PRELAB ASSIGNMENT:
Use the computer software tool Orcad PSPICE to simulate the circuit .Make sure to bring the
PSPICE results to the laboratory. In addition to being an aid in immediately verifying
measured results, they will be the basis of your Pre-lab grade for this lab.
Specifically, the following items must be addressed using Orcad PSPICE as part of the prelab
assignment:
Transient response (time-domain) showing waveforms of output voltage.

Fig. 11: Circuit to be implemented
88 NED University of Engineering & Technology, Department of Electronic Engineering
PROCEDURE:
1. Wire the circuit
2. Apply + 15V supply connections to the bread board.
3. Depending on the setting of the 5 kΩ potentiometer the circuit may or may not be
oscillating when power is applied. If a sine wave is not displayed on the oscilloscope ,
carefully adjust the 5 kΩ potentiometer until a sine wave starts to appear on the
oscilloscope’s display .
4. On the other hand, if a sine wave is seen when power is applied on the bread board ,
carefully decrease the resistance of the potentiometer to obtain the best looking sine
wave.
5. Measure the output frequency of the phase shift oscillator recording your result in table
.Compare this value with the expected frequency found using equation.
6. Measure the value of the feedback resistance that produced maximum oscillation.
USEFUL FORMULA:
Output Frequency:
1
2П
√6
For oscillation:
29
OBSERVATION:
Parameter
Output Frequency, fo
Rf
Measured
Expected
89 % error
NED University of Engineering & Technology, Department of Electronic Engineering
CALCULATIONS:
RESULT:
The output frequency as measured comes out to be: ___________
The output frequency as calculated comes out to be: ____________
Rf as measured comes out to be :______________
Rf as calculated comes out to be :______________
90 NED University of Engineering & Technology, Department of Electronic Engineering
Lab No. 12
OBJECTIVE:
To demonstrate the design and operation of Hartley Oscillator behavior.
EQUIPMENT REQUIRED:
Protoboard
Function Generator
Digital Multimeter
Power Supply
Oscilloscope
Transistor 2N3565
Resistor 220K , 1K2 , Potentiometer 25K Ohm
Inductor 2.5mH (02)
Capacitor 1nF ,10nf , 5nF
Switch SPDT.
THEORY:
The Hartley Oscillator
The main disadvantages of the basic LC Oscillator circuit is that they have no means of
controlling the amplitude of the oscillations and also, it is difficult to tune the oscillator to the
required frequency. If the cumulative electromagnetic coupling between L1 and L2 is too small
there would be insufficient feedback and the oscillations would eventually die away to zero.
Likewise if the feedback was too strong the oscillations would continue to increase in amplitude
until they were limited by the circuit conditions producing signal distortion. So it becomes very
difficult to "tune" the oscillator.
However, it is possible to feed back exactly the right amount of voltage for constant amplitude
oscillations. If we feed back more than is necessary the amplitude of the oscillations can be
controlled by biasing the amplifier in such a way that if the oscillations increase in amplitude, the
bias is increased and the gain of the amplifier is reduced. If the amplitude of the oscillations
91 NED University of Engineering & Technology, Department of Electronic Engineering
decreases the bias decreases and the gain of the amplifier increases, thus increasing the feedback.
In this way the amplitude of the oscillations are kept constant using a process known as
Automatic Base Bias.
One big advantage of automatic base bias in a voltage controlled oscillator, is that the oscillator
can be made more efficient by providing a Class-B bias or even a Class-C bias condition of the
transistor. This has the advantage that the collector current only flows during part of the
oscillation cycle so the quiescent collector current is very small. Then this "self-tuning" base
oscillator circuit forms one of the most common types of LC parallel resonant feedback oscillator
configurations called the Hartley Oscillator circuit.
Hartley Oscillator Tuned Circuit
In the Hartley Oscillator the tuned LC circuit is connected between the collector and the base of
the transistor amplifier. As far as the oscillatory voltage is concerned, the emitter is connected to
a tapping point on the tuned circuit coil. The feedback of the tuned tank circuit is taken from the
centre tap of the inductor coil or even two separate coils in series which are in parallel with a
variable capacitor, C as shown.
The Hartley circuit is often referred to as a split-inductance oscillator because coil L is centretapped. In effect, inductance L acts like two separate coils in very close proximity with the
current flowing through coil section XY induces a signal into coil section YZ below. An Hartley
Oscillator circuit can be made from any configuration that uses either a single tapped coil
(similar to an autotransformer) or a pair of series connected coils in parallel with a single
capacitor as shown below.
92 NED University of Engineering & Technology, Department of Electronic Engineering
FORMULA :
The frequency of Hartley oscillator is given below.
SCHEMATIC:
Fig. 1: Circuit to be implemented
PRELAB ASSIGNMENT:
Use the computer software tool Orcad PSPICE to simulate the circuit .Make sure to bring the
PSPICE results to the laboratory. In addition to being an aid in immediately verifying
measured results, they will be the basis of your Pre-lab grade for this lab.
Specifically, the following items must be addressed using Orcad PSPICE as part of the prelab
assignment:
Transient response (time-domain) showing waveforms of output voltage.

PROCEDURE:
7. Wire the circuit
8. Apply + 15V supply connections to the bread board.
9. Place S1 to 1 position and observe the frequency. Compare your measured value of
frequency to your calculated value.
93 NED University of Engineering & Technology, Department of Electronic Engineering
10. Place S1 to 3 position and observe the frequency. Compare your measured value of
frequency to your calculated value.
11. Observe the output wave form at the collector, base and emitter by adjusting the
potentiometer R3.
OBSERVATION:
Place S1 to the 1 position.
Measured frequency = __________________________
Calculating frequency = _________________________
Compare your measured value of frequency to your calculated value.
Place S1 to the 3 position.
Measured frequency = __________________________
Calculating frequency = _________________________
Compare your measured value of frequency to your calculated value
94 NED University of Engineering & Technology, Department of Electronic Engineering
CALCULATION:
RESULT:
95 NED University of Engineering & Technology, Department of Electronic Engineering
Lab No. 13
OBJECTIVE:
The purpose of this experiment is to demonstrate the operation of the 555 timer as an monostable
multivibrator.
EQUIPMENT REQUIRED:
Protoboard
Function Generator
Digital Multimeter
Power Supply
Resistors
Capacitors 2x0.01uF
1x1uF
555 timer (8-pin mini DIP)
THEORY:
INTRODUCTION
The proper operation of modern digital electronic systems require accurate timing signals. A
digital integrated circuit that was designed to provide accurate timing signals is the 555 Timer.
To properly maintain complex digital electronic systems, the technician must be familiar with the
types of circuits he will encounter. The 555 Timer is a simple, yet vital, IC that you will use in
many advanced electronic devices. By understanding how this circuit operates, you will be better
able to maintain digital systems.
555 TIMER
The importance of accurate timing in digital systems cannot be overemphasized. Without ccurate
timing, everyday appliances such as TVs, VCRs, stereos, and even cars would be unable to
function. With digital circuitry becoming more common every day, a low cost effective digital
timer had to be developed. The 555 Timer is that digital circuit.
The 555 integrated circuit is a very stable device that produces accurate time delays or
oscillations. The output waveform of a 555 Timer is a square wave. Depending upon the number
and location of external components, the 555 can be configured as an astable multivibrator,
monostable multivibrator, pulse width modulator, pulse position modulator, or linear ramp
generator. To accomplish all of those configurations, the 555 must have timing that is adjustable
96 NED University of Engineering & Technology, Department of Electronic Engineering
from microseconds to hours, operate in both the oneshot and free running modes, have an
adjustable duty cycle, and be compatible with TTL circuitry. This lesson shows you how the
timer is configured for an astable and monostable multivibrator. Figure 1 is the schematic
symbol for the 555. As you can see from the diagram, it is available in both the DIP and can case
styles. Pin 1 is ground, pin 3 is the output, and pin 8 is Vcc. In keeping with the versatile nature
of the circuit, Vcc can vary from 5 VDC to 15 VDC without affecting circuit operation. The
output current can be up to 200 mA, so the device can operate relays or lamps.
Figure 1. 555 Timer Schematic Symbol
555 TIMER CIRCUITRY
Figure 2 illustrates the internal circuitry of the 555 Timer to the block level. The heart of the
timer is an RS flip-flop. The RS (Reset-Set) flip-flop is a very common digital circuit. It is
basically a bistable multivibrator that has two inputs, R and S, and two outputs, Q and Q’. In
addition, the RS flip-flop has a RESET input. In general, the operation of the RS F/F is as
follows:
97 NED University of Engineering & Technology, Department of Electronic Engineering



If R and S are opposites of one another, then Q follows S and Q' is the inverse of Q.
If both R and S are switched to 1 simultaneously, then the circuit remembers what was
previously presented on R and S.
There is also the funny illegal state. In this state, R and S both go to 0, which has no
value in the memory sense
Figure 3. RS Flip-Flop
The RS inputs are provided by two comparators. Each comparator has two inputs. Comparator 1
has a threshold voltage applied to the + input and a control voltage applied to the - input. The
purpose of comparator 1 is to compare the input threshold voltage to a fixed voltage. Because of
the inputs, comparator 1 is called the threshold comparator.
Comparator 2 has a trigger applied to the input and a fixed voltage applied to the + input. The
function of comparator 2 is to compare the input trigger to a fixed voltage. Comparator 2 is
called the trigger comparator. How the 555 Timer operates depends upon the external
components, voltages, and signals that are applied to the two comparators.
Under normal operation, the voltage on the threshold input (pin 6) is 2/3 Vcc and the trigger
input (pin 2) is 1/3 Vcc. These voltage levels can be altered through external components and
connections to the control voltage input (pin 5). When the voltage on the trigger input goes
below the reference voltage (comparator 2 positive input), a HIGH is developed by the
comparator and sent to the S input of the flip-flop. The flip-flop produces a HIGH Q output and a
LOW Q’ output. The Q’ output is inverted, changed to a HIGH, and the output of the timer is
HIGH.
When the voltage on the threshold input goes above the reference voltage (comparator 1 negative
input), a HIGH is developed by the comparator and sent to the R input of the flip-flop. The flip98 NED University of Engineering & Technology, Department of Electronic Engineering
flop produces a LOW Q output and a HIGH Q’ output. The Q’ output is inverted, changed to a
LOW, and the output of the timer is LOW.
Q1 is used as a switch to supply a ground to pin 7 (DISCHARGE). When the Q’ output of the
flip-flop is HIGH, Q1 is forward biased, connecting the ground on pin 1 to pin 7. When the Q’
output of flip flop is LOW, Q1 is reverse biased, breaking the ground connection to pin 7. By
using external components, specifically resisters and capacitors, to produce an RC time constant,
the circuit in Figure 2 can be configured in many different ways. The following discussion
describes two, the astable and monostable multivibrator.
555 TIMER MONOSTABLE MULTIVIBRATOR OPERATION
Figure 4 is the schematic diagram of a 555 Timer configured as a monostable multivibrator. The
only time the monostable, or one-shot, changes state is when it receives an input trigger (also
refer to Figure 2). When the trigger input goes LOW, the one-shot is triggered and the output
goes HIGH. That action removes an internal ground by driving Q1 into cut- off, allowing C1 to
charge (pin 7). When the charge on C1 nears Vcc, the output of the internal flip-flop is reset, and
the output goes back LOW (pin 6). The time constant of C1 and R1 determines the amount of
time the output pulse remains HIGH.
Figure 4. 555 Timer Configured as a Monostable Multivibrator
99 NED University of Engineering & Technology, Department of Electronic Engineering
0
V1
10Vdc
R1
1k
4
2
V2
3
R2
1k
V
8
U1
RESET
VCC
DISCHARGE
TRIGGER
THRESHOLD
CONTROL
OUTPUT GND
555alt
1
7
6
5
C3
1n
C2
0.01uF
0
0
Figure 5. Circuit to be implemented
PRELAB ASSIGNMENT:
Use the computer software tool Orcad PSPICE to simulate the two circuits .Make sure to
bring the PSPICE results to the laboratory. In addition to being an aid in immediately
verifying measured results, they will be the basis of your Pre-lab grade for this lab.
Specifically, the following items must be addressed using Orcad PSPICE as part of the prelab
assignment:
 Transient Response showing waveform of output voltage.
100 NED University of Engineering & Technology, Department of Electronic Engineering
PROCEDURE
21. Wire the circuit shown in the schematic using a 10 V supply.
22. Use R1= 1 kΩ, and C= 1μF, C=0.01μF.Using the power supply set VCC= 10 V.
23. Compute the expected values of the pulse duration.
24. Apply the square wave input of frequency 1KHz at pin 2 of circuit diagram.
25. Connect output terminal (pin 3) to the oscilloscope also feed the voltage across capacitor
to channel 2.
26. Power on the circuit and observe the output. Determine the values of pulse duration of
your observations and compare it with the theoretical values. Note the data.
27. Turn off the power of the experimental circuit.
USEFUL FORMULA:
T = RCln3 = 1.1RC
OBSERVATION:
Parameters
Pulse
Duration
Calculated Values
Observed Values
CALCULATIONS:
RESULT:
101 Error
NED University of Engineering & Technology, Department of Electronic Engineering
Lab No. 14
OBJECTIVE:
The purpose of this experiment is to demonstrate the operation of the 555 timer as an astable
multivibrator.
EQUIPMENT REQUIRED:
Protoboard
Function Generator
Digital Multimeter
Power Supply
Resistors
Capacitors 2x0.01uF
1x1uF
555 timer (8-pin mini DIP)
THEORY:
555 TIMER ASTABLE MULTIVIBRATOR OPERATION
Figure 1 illustrates a 555 Timer configured as an astable multivibrator. An astable
multivibrator is free running. That means as long as power is applied to the circuit, the
output (pin 3) constantly changes states or flips from HIGH to LOW. To configure the
device to operate as an astable multivibrator (also refer to Figure 2), the trigger and threshold
inputs are connected together (pins 2 and 6). C charges through RA and RB. C discharges through
RB by the action of the discharge output (pin 7) going LOW. The frequency of the multivibrator's
output waveform is determined by the RC time constant of C, RA, and RB. If a potentiometer is
connected to the discharge path of the capacitor, the frequency of the output waveform becomes
variable over a range of frequencies.
102 NED University of Engineering & Technology, Department of Electronic Engineering
Figure 1: Astable Multivibrator using 555 timer
Fig. 2: Circuit to be implemented
103 NED University of Engineering & Technology, Department of Electronic Engineering
PROCEDURE
28. Wire the circuit shown in the schematic using a 5 V supply.
29. Apply power to the breadboard. Measure the output frequency, and compare it to the
value that you would expect based on the value of R1, R2 and C (Equation1). Record
your result in table 1.
30. Determine the percent duty cycle of the output waveform of the 555 timer astable
multivibrator. Compare your result with the expected vale (Equation 2).
31. Disconnect the power form the breadboard, and reverse the 3.3-kΩ and 15-kΩ timing
resistors so that the 15-kΩ resistor is now R1. Again connect power to the breadboard,
and compare the measured output frequency with the expected value (Equation1),
recording your result.
32. Measure the percent duty cycle, comparing it to the excepted value (Equation2), and
record your result. Observe that if resistor R2 is much greater than R1, the percent duty
cycle will approach 50%. On the other hand, if R1 is much larger than R2, then the
percent duty cycle approaches 99%.
104 NED University of Engineering & Technology, Department of Electronic Engineering
OBSERVATION:
Component
values
Output frequency
Measured Calculated
%Duty Cycle
%Error
Measured
Calculated
Steps 2 and 3:
R1 = 3.3 kΩ
R2 =15 kΩ
C = 0.001 µF
Steps 4 and 5:
R1=15 kΩ
R2 = 3.3 kΩ
C = 0.001 µF
CALCULATIONS:
RESULT:
The duty cycle when R1= 3.3kΩ and R2 = 15kΩ as calculated is: --------------------The duty cycle when R1= 3.3kΩ and R2 = 15kΩ as measured is: --------------------The duty cycle when R1= 15kΩ and R2 = 3.3kΩ as calculated is: --------------------The duty cycle when R1= 15kΩ and R2 = 3.3kΩ as measured is: --------------------105 %Error