Electronics I - Laboratory 6 Rev C
Transistor Amplifier
I. Objectives
1. Understand the operation of a common emitter transistor amplifier.
2. Understand the purpose of a coupling capacitor and a bypass capacitor.
3. Design and build a transistor amplifier
II. Pre-Lab Requirements
1. Transistor Amplifier
In the previous lab, you set the Q-point of a BJT in this lab you will design and build a
transistor amplifier that operates around your designed Q-point. In a nutshell, a transistor
amplifier takes an input current, usually very small, and amplifies it to a larger value that
can be used in some way i.e. connected to a speaker as in sound amplification. For an
amplifier to operate effectively, its transistor must operate within the active region of the
transistor’s characteristic curves. To ensure this, the designer must bias it properly and
also ensure that the input signal current (IB) does not place it out of the active region. In
addition to maintaining the transistor in the active region, the designer must also ensure
that the amplifier is designed to operate properly in the frequency range of the input
signals.
A. Biasing the transistor.
In the previous lab, a transistor was biased into its active region using base
biasing and voltage divider biasing. In this lab, a common emitter amplifier
using voltage divider biasing will be developed. The Q-point used for the
previous lab’s design can be used for this lab’s design.
B. Determining the amplifier input current.
Generally an input signal to an amplifier is define as a voltage; however, a
transistor’s input and output are defined by the equation:
IB*DC = IC
To convert the value of the input signal voltage to current, the input
impedance of the proposed amplifier must be computed. This is done by
developing a small signal AC model of the transistor since the input signal is
an alternating current. Figure 2 shows the amplifier circuit and its AC
equivalent. This circuit equivalency is derived by understanding that to the
AC signal the amplifier’s power source (Vcc) offers negligible resistance to
ground and can be approximated by a shunt, RB1 and RB2 are in parallel to
ground, and the series resistor combination, r’e and RE, are in parallel with
RB1 and RB2. r’e is the dynamic emitter resistance and its value is related to the
emitter current (IE in mA) by the equation:
r’e = 25mV/IE
This value is small and for RE values (the non-bypassed RE values) greater
than 100Ω it can generally be disregarded.
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Figure 2. Common Emitter Amplifier Input Impedance
From Figure 1 and Ohm’s law the base current (iB) resulting from the input
signal (the dynamic current) is defined by the equation:
iin = Vin / (RB1|| RB2 || ac*(r’E + RE) so
iB = Vin / ac*(r’E + RE)
ac is defined as the dynamic common-emitter current gain and the difference
between it and the common-emitter current gain, DC, is small in most cases.
The value for DC can be used for ac in common emitter amplifier design
without introducing appreciable error.
On transistor specification sheets, DC is generally referred to as HFE and ac
as hfe. hfe may also be displayed by a graph as a function of VCE and IC for
given input frequencies.
C. Coupling Capacitors.
A capacitor exhibits the property of passing an AC signal while blocking DC.
This serves two purposes in an amplifier. In the input, it isolates the signal
source from the DC current used to bias the transistor to its designed operating
point and it blocks any offset voltage that maybe be included in the input
signal. In the output, it isolates the amplifier’s load from the power supply
voltage thus passing only the amplified signal. Figure 3 shows a common
emitter amplifier with coupling capacitors included in the circuit.
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Figure 3. Common Emitter Amplifier with Input and Output Capacitors
Selection of the values for the input and output capacitors is determined by the
frequency or frequency band of the signal at which the amplifier is designed
to operate. In reality, the input and output capacitors are components of high
pass filters which have their cut-off frequency at or below the lowest
operating frequency of the amplifier. Figure 4 shows the high pass filter
equivalent of the input and output capacitor filter network. RL is the
amplifier’s load. If the output should be coupled to another amplifier stage,
the load, RL shown in Figure 4, would not be included in the first stage’s
output coupling high pass filter but instead, the second stage amplifier’s input
impedance would become the high pass filter’s “resistance.” Figure 5 shows
the methodology for selecting the value of the coupling capacitor.
Figure 4. Input and Output Coupling Capacitor Filter Circuit Model
ac used in Figure 4, is
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Figure 5. Coupling Capacitor Selection Methodology.
D. Bypass Capacitor.
To increase the amplifiers gain and stability a capacitor is often inserted in
parallel with the emitter resistor (RE) to provide an AC short or bypass to
ground. This is called a bypassed common emitter amplifier. If the emitter
resistor actually consists of two resistors in series and one is bypassed to
ground the configuration is referred to as a partially bypassed common emitter
amplifier. In your design, you will use a partially bypassed configuration. See
Figure 6. The value of CE is generally chosen to have a reactance
[XC = 1/(*CE) = 1/(2**f*CE)] that is less than or equal to 10% of the
bypassed emitter resistor’s resistance at the lowest operating frequency of the
amplifier. Remember, the total RE is used in DC biasing the amplifier’s
transistor while the un-bypassed portion of RE is used for determining the
voltage gain of the amplifier according to the relation:
Figure 6. Bypassed Emitter Resistor Methodology.
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E. Developing the Operating Load Line
When a transistor amplifier operates the collector current is the output and it is
controlled by relationship of the product of the input base current and the *DC
of the transistor. The relationship can be easily understood by observing the
movement of IC in response to the movement of IB on the transistor’s
characteristic curves. Remember, the input is some fluctuating information
signal that is to be amplified and reproduced at the amplifier’s output. In
Figure 7 a Q-point is shown along with the upper and lower values of IB’s
range. By translating the location of these IB values horizontally to the Y-axis,
the corresponding IC values (the output current) can be observed. In the
example shown in Figure 7, input current swing from 18µA to 60 µA
produces an output current swing from 3mA to 9.6mA. These current swings
are centered around the Q-point.
The input/output currents move through the Q-point in a line called the load
line. This line has an X-intercept that is the value of IC at cutoff. IC at this
point of course is 0. The load line has a Y-intercept when the transistor is in
saturation. When in saturation the transistor can be said to emulate a closed
switch between the collector-emitter junction this results in an infinitesimal
voltage drop across that junction resulting (VCE of 0) while all the supply
voltage drops across the collector resistor (VRC = Vcc). The slope of this line
is equal to the inverse of the resistance of collector current path. This inverse
relationship of the load line is because the collector characteristic curves
graph (on which the load line is plotted) is oriented with voltage on the X-axis
and current on the Y-axis.
In the amplifier configuration that we are using the emitter resistor is partially
bypassed by the bypass capacitor. As previously explained, this results in
really two resistances: One for DC which goes through both emitter resistors
and one for AC which goes through the first emitter resistor but is then
shunted around the second emitter resistor through the bypass capacitor to
ground. This results in 2 load lines; a DC load line and an AC load line. Both
load lines pass through the Q-point; however, they have different slopes. For
the AC load line, the Y-axis intercept, which is IC at transistor saturation, has
increased because the resistance, as experienced by the AC signal, is smaller.
The X-axis intercept, VCE at cutoff, has decreased for the same reason. The
X-axis and Y-axis intercepts can be computed using the following formulas:
Y-axis intercept = ICsat= ICQ +VCEQ/Rac
X-axis intercept = VCE(cutoff) = VCEQ + ICQ*Rac
Where: ICsat is the collector current at saturation.
ICQ is the collector current at the Q-point
VCEQ is VCE at the Q-point
Rac = r’e + RE1 + (RC RL)
Where RL is the value of the output load
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With the AC load line developed and plotted on the transistor characteristic
curves, the operation of the amplifier, i.e the changing values of Iin (IB) and Iout
(IC) moves along the load line giving a visual representation of the amplifier’s
operating region which should be all in the active region.
Figure 7. Amplifier Operating Points
2.
III. Laboratory Requirements
1. Required Parts and Equipment
A.
B.
C.
D.
E.
F.
G.
H.
1 - DC power supplies
1 - Bench DMM
1 - Fluke hand-held DMMs
1 - Proto-Board (PB-103)
1 – 2N3904 Transistor
Resistors as required by student’s design
Capacitors as required by student design
Wires and leads for circuit connections.
2. Required Information
A. Transistor Data Sheets
The following is a link to the specification sheet for the 2N3904:
http://www.fairchildsemi.com/ds/2N/2N3904.pdf
B. 2N3904 collector characteristic curves developed from Lab 4.
C. 2N3904 Pinout
Figure 4 shows the pin orientation for the 2N3904
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Figure 4. 2N3904 Pin Orientation
3. Laboratory Procedure
A. Construction of a one stage transistor amplifier
Using your 2N3904, its characteristic curves, and the Q-point and voltage dividerbiasing scheme, developed in the previous two laboratory exercises, construct a
single stage BJT common emitter transistor amplifier with a load of 1000 ohms, an
input and output coupling capacitor, and an emitter resistor bypass capacitor.
Design your amplifier to operate with input signals of an amplitude of 0.4V and
frequencies above 100 Hz. The transistor parameters will be measured to verify
compliance with the designed parameters.
a. Model your amplifier using PSpice.
b. Construct your designed circuit on a Protoboard.
c. Test your circuit at 100Hz and record the parameters in Table 1.
Parameter
Measured Value
Designed Value
Vcc
Vin p-p
Vout p-p
Vin-freq
Vout-freq
IC p-p
IB p-p
VC p-p
VE p-p
VB p-p
VCE p-p
Vgain
Vgain w/o Cbypass
Table 1. Parameter Table for 2N3904 Amplifier
d. Demonstrate your amplifier’s performance to the lab instructor.
4. Data Reduction and Lab Report
This Lab submittal will be an informal report. Your report should be in Word with
graphics pasted in.
A. For your 2N3904 amplifier submit the following:
a. PSpice schematic of the circuit with all circuit components labeled.
b. A populated Table 1.
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c. A PSpice analysis of operation of your amplifier to include:
1. Dynamic response plot (gain in dB and phase)
2. Transient analysis at 1000 Hz.
d. An Excel plot of your measured dynamic response (gain in dB and phase)
e. An Excel graph showing your transistor amplifier’s designed and measured
characteristic curves, Q-point, AC load line and operating points along the
load line.
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