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iC-MN EVAL MN1D
EVALUATION BOARD DESCRIPTION
Rev A2, Page 1/14
ORDERING INFORMATION
Type
Order Designation
Evaluation Board
iC-MN EVAL MN1D
Description Options
iC-MN Evaluation Board
ready to operate, accessible through GUI via PC adapter
Software
iC-MN GUI
GUI software for Windows PC (freeware)
stores setup to file, communication to iC-MN, Download
iC-MN DLL
iC-MN Product specific Dynamic Link Library (DLL)
Available on request
PC Adapter
iC-MB4 iCSY MB4U
High Performance BiSS-to-PC Adapter (USB)
See also RELATED PRODUCTS AND DOCUMENTATION
BOARD MN1D
PLUG
CONFIGURATION
J1
J2
J3
BiSS Interface input (to master)
BiSS Interface output (to slaves)
Multiturn Interface
J4
J5
J6
I2 C Interface
Signal inputs
Power supply terminals
J7...J10
J11
iC-MN’s pin signals
Optional
Figure 1: Evaluation board MN1D
Copyright © 2011 iC-Haus
http://www.ichaus.com
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iC-MN EVAL MN1D
EVALUATION BOARD DESCRIPTION
Rev A2, Page 2/14
Figure 2: Component side (size 140 mm x 100 mm)
TERMINAL
DESCRIPTION
TERMINAL
DESCRIPTION
VB
+8 V to +15 V Supply Voltage
(100mA)
+5 V Supply Voltage (100mA)
0 V Ground
PSOUT
NSOUT
PCOUT
NCOUT
T0
T1
NERR
Signal Output Sine +
Signal Output Sine Signal Output Cosine +
Signal Output Cosine Test Pin
Test Pin
Error Message Output /
System Error Message Input
Sense of Rotation Preselection
Input
Preset Input
VDD
GND
VDDA
GNDA
LED_C
ACOS
ACOM
ACON
Sub-System Positive Supply Output
(+5 V, 20 mA max, for sensors and periphery)
Sub-System Ground Output
(for Sensors and Periphery)
LED Cathode Ground Path
(for encoder LED powered via ACOM)
Signal Level Controller Output and
VREFin Reference Voltage
Input/Output
Signal Level Controller Output
(to encoder LED anode)
Signal Level Controller Output
DIR
PRES
J11 8
J11 10
J11 12
J11 14
J11 16
J11 18
J11 20
J11 7
J11 9
J11 11
J11 13
J11 15
J11 17
J11 19
Figure 3: Circuit diagram including optional components
PCINSI
NCINSI
J5 3
J5 4
PSINNI
NSINNI
PCINNI
NCINNI
J5 9
J5 10
J5 11
J5 12
ACON
NSINSI
J5 2
J5 17
ACOS
NCINMI
J5 8
PSINSI
PCINMI
J5 7
J5 1
NSINMI
J5 6
47
JP12
J5 18
PSINMI
J5 5
A
ACOM
J5 15
J5 13
J5 14
VCC
J5 16
R8
J11 6
J11 5
LED_C
J11 4
J11 3
LED_C
J11 2
1
14
IF6-R1
1
14
IF5-R1
1
14
IF4-R1
1
14
IF3-R1
1
14
IF2-R1
1
14
IF1-R1
3
13
3
13
3
13
3
13
3
13
3
13
2
4
2
2
IF6-R3
0
11
IF6-C1
4
12
IF6-R2
0
4
IF5-R3
0
11
IF5-C1
12
IF5-R2
0
2
4
IF4-R3
0
11
IF4-C1
12
IF4-R2
0
2
IF3-R3
0
11
IF3-C1
4
12
IF3-R2
0
4
IF2-R3
0
11
IF2-C1
12
IF2-R2
0
2
IF1-R3
0
11
IF1-C1
12
IF1-R2
0
VDDA
GND1
A
A
A
A
A
A
A
A
A
A
A
A
IF1-C3
IF2-C3
IF3-C3
IF4-C3
IF5-C3
IF6-C3
10
IF6-C2
5
6
9
10
IF5-C2
5
6
9
10
IF4-C2
5
6
9
10
IF3-C2
5
6
9
10
IF2-C2
5
6
9
10
IF1-C2
5
6
9
NSLO
SLO
MTSLI
T3
MTMA
T2
GND
VDD
NERR
U1_34
U1_35
U1_36
NSINS
PSINS
PCINS
NCINS
NSINM
PSINM
PCINM
NCINM
NSINN
PSINN
PCINN
NCINN
IF3-GNDA
7
IF3-ACO
8
IF2-GNDA
7
IF2-VDDA
8
IF5-GNDA
7
IF5-ACO
8
IF4-GNDA
7
IF4-VDDA
8
A
IF6-GNDA
7
IF6-VDDA
8
VDDA
A
A
NSOUT
PSOUT
NCOUT
PCOUT
T0
T1
ACOM
VDD
ACON
ACOS
GNDA
VDDA
U1_13
U1_14
U1_15
U1_16
DIR
PRES
SCL
SDA
MAO
SLI
NMA
MA
IF1-GNDA
7
VDDA
A
A
J9
J9
J9
J9
J9
J9
J9
J9
J9
J9
J9
J9
J7
J7
J7
J7
J7
J7
J7
J7
J7
J7
J7
J7
IF1-ACO
8
VDDA
A
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
11
12
J10
J10
J10
J10
J10
J10
J10
J10
J10
J10
J10
J10
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
J8
GNDA
ACON
ACOS
ACOM
C8
100nF
VDD
A
A
iC-MN
29
VDD
A
GNDA
47
11
12
10
9
17
16
14
15
32
SDA
SCL
DIR
PRES
NERR
iC-MN
32
VDD
T1
T0
26
25
24
23
22
21
20
19
SLO
NSLO
MA
NMA
SLI
MAO
SDA
SCL
I2C
T0
T1
T2
NSOUT
PSOUT
PCOUT
NCOUT
VDD
T0
T1
T3
A
JP13
17
DIR
PRES
18
33 NERR
29
27
MTMA
MT MTSLI
DIR
PRES
NERR
38
37
I/O
40
39
PSOUT
NSOUT
C11
1uF
T3
T2
DIR
PRES
NERR
SDA
SCL
SLO
NSLO
MA
NMA
SLI
MAO
MTMA
MTSLI
PSOUT
NSOUT
PCOUT
NCOUT
PCOUT
NCOUT
QFN48
TEST
INTERFACE
SUB GND T0 T1 T2 T3
EPAD
31 41 42 30 28
GNDA
PCINN
NCINN
PSINN
NSINN
ACON
PCINS
NCINS
45
PSINS
NSINS
3
4
PCINM
NCINM
PSINM
NSINM
ACOM
VACO
VDDA
2
1
7
8
6
5
43
44
48
U1
PCINS
NCINS
PCINN
NCINN
23
22
21
20
19
18
SLO
NSLO
MA
NMA
SLI
MAO
TEST
INTERFACE
GND T0 T1 T2 T3
28 37 38 27 25
PSINS
NSINS
PSINN
NSINN
26
24
MTMA
MT MTSLI
I2C
ACOS
ACON
34
33
PSOUT
NSOUT
C1
100nF
36
35
MQFP44
PCOUT
NCOUT
I/O
46
ACOS
ACOM
C9
1uF
C10
1uF
GNDA
PCINN
NCINN
11
12
43
PSINN
NSINN
10
9
ACON
PCINS
NCINS
3
4
41
PSINS
NSINS
2
1
ACOS
PCINM
NCINM
7
8
42
PSINM
NSINM
ACOM
VACO
VDDA
6
5
39
40
44
PCINM
NCINM
NSINM
PSINM
C2
100nF
VDDA
VDDA
GND
GNDA
PCINN
NCINN
PSINN
NSINN
ACON
PCINS
NCINS
PSINS
NSINS
ACOS
PCINM
NCINM
PSINM
NSINM
ACOM
VDD
VDDA
U7
ANALOG
OUT
VDD
ANALOG
IN M
ANALOG
IN S
ANALOG
IN N
J11 1
NONIUS
socket adapter
NONIUS
to redefine iC-MN
input / sensor signals
to a 20pol joint ribbon cable
ANALOG
OUT
CONFIG.
ANALOG
IN M
ANALOG
IN S
ANALOG
IN N
NERR
PRES
DIR
1K
R7
C4
100nF
VDD
VB
+
D3
RD
MTSLI
3
8
7
14
1
C12
100nF
6
5
U3-A
75LBC179
VDD
2
MTVDD
2
R9
1k
7
8
A
A
J3-VDD
4
J3-VB
1
VDDA
VDDA
J3-NSL
8
J3-SL
7
J3-NMAO
3
J3-MAO
2
J3-S2
S2
J3-S1
S1
J3-GND
6
R6
10k
1
3
C13
100nF
S1
PRES
S2
MTNSL
MTSL
R3
120
MTNMAO
MTMAO
SLD_J3
MT_VB
JP6
GND2
NSOUT
PSOUT
NCOUT
PCOUT
JP5
JP16
VDD
NSOUTO
PSOUTO
NCOUTO
PCOUTO
U3-B
75LBC179
1
VCC
U3-S
75LBC179
GND
4
MTMA
VN
11
4
VP
U6-S
-
9
U6-C
+
-
U6-B
+
-
10
5
6
12
13
+
U6-D
-
3
U6-A
2
SDA
SCL
VB_OUT
MAO_OUT
SLD_J2
R4
10k
R5
10k
VDDA
A
5
6
3
2
1
7
2
6
5
3
2
SDA
SCL
C7
100nF
JP7
JP8
1
1
3
C3
100nF
MAO
U4
SCL
SDA
GND_I2C
VDD_I2C
JP11
NSL
SL
7805
1
VOUT VIN
GND
2
8
VDD
U2-S
24LC02B
GND
4
JP10
VB
3
J6
1
D2
J6
2
GND
1N5819
J6
3
VB
VDD
NSLO
MA
NMA
SLI
SLO
U5-B
75LBC179
JP15
JP4
JP3
U2-A
24LC02B
A2
A1
A0
WP
3
J2-NMAO NMAO_OUT
3
J2-MAO
2
J2-NSLO
5
J2-SLO
9
J2-NSL
8
J2-SL
7
J2-S2
S2
J2-S1
S1
J2-GND
6
J2-VDD VDD_OUT
4
J2-VB
1
VDD
VB
VDD
A
J4 1
J4 7
J4 9
J4 2
J4 10
J4 4
2
VDD
R1
120
NSLI_IN
SLI_IN
R2
120
SLD_J1
VDD_IN
VB_IN
J1-VB
1
J1-NMA
3
J1-MA
2
J1-NSLI
5
J1-SLI
9
J1-NSL
8
J1-SL
7
J1-S2
S2
J1-S1
S1
J1-GND
6
J1-VDD
4
dra_mn1dz_spec_schem
1
VCC
U5-S
75LBC179
GND
4
7
8
JP14
JP2
JP1
U5-A
75LBC179
1N5819
D1
JP9
C5
100nF
1
2
3
C6
330nF
EVALUATION BOARD DESCRIPTION
CONFIG.
iC-MN EVAL MN1D
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Rev A2, Page 3/14
CIRCUIT DESCRIPTION
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iC-MN EVAL MN1D
EVALUATION BOARD DESCRIPTION
Rev A2, Page 4/14
ASSEMBLY PART LIST
Device
C1 - C5, C7, C8, C12,
C13
C6
C9 - C11
D1, D2
D3
IF1 - IF6
J1
J2, J3
J4
J5
J11
J6
J7 - J10
JP1 - JP6, JP10 - JP13
JP7 - JP9
R1 - R3
R4 - R6
R7, R9
R8
S1
S2
U2
U3, U5
U4
U6
X1, X2
Value (typical)
100 nF
330 nF
1 µF
1N5819
LED red 3mm
Socket DIL 14
SUB-D9F
SUB-D9M
WSL10G
WSL20G
WSL20G
ALK059-03
BL10-12U
SL LP1/097 2G
SL LP1/097 3G
120 Ohm
10 kOhm
1 kOhm
47 Ohm
Switch B3F1000
Switch ATE1E
IC 24LC02B
IC 65LBC179
IC 7805
Socket DIL 14
Socket MK015G
Comment
Indicator LED (red) for NERR Pin
Optional equipment
Serial input connector
Serial output connector
I2 C interface
Sensor input signals
Conncetor for individual wiring
Screwing terminal for power supply VB, VDD and GND
Socket for optional adapter PCB (PC129)
Jumper
Jumper
Line termination resistors
Measurement resistor for LED current
Preset taster
Direction switch
EEPROM
Line driver for serial interface
Voltage reglulator (5V)
Optional equipment
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iC-MN EVAL MN1D
EVALUATION BOARD DESCRIPTION
Rev A2, Page 5/14
BOARD, CONNECTOR PINOUT AND TERMINAL DESCRIPTION
Figure 4: Top view
Figure 5: Board-to-board connection
Setup (MN1D connected via USB Adapter - MB3U)
The MN1D evaluation board is equipped with the iC-MN 25-bit Nonius Encoder. The board features two 9-pin SUB-D (J1 and J2) connectors for serial communication and one 9-pin SUB-D (J3) connectors for the multiturn interface. The PC-USB Adapter enables the
evaluation board to be connected to a common Windows PC. Figure 4 shows a single board connected via the IN junction (J1).
Figure 5 shows another example where two MN1D evaluation
boards are used at the same time. Here, the IN junction (J1) of the
second board is plugged to the OUT junction (J2) of the first board.
An external power supply for MB3U (12 V - inner contact: negative
pole - outer contact: positive pole) is required when operating two
boards. iC-MN software can be used to access both boards from
a Windows PC (see section "APPLICATION SOFTWARE" for more
details).
Note: Please install the latest USB and/or LPT driver before you
attach the PC Adapter to the PC.
Refer to "JUMPER DESCRIPTION" for the required jumper configuration marked by yellow circles.
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iC-MN EVAL MN1D
EVALUATION BOARD DESCRIPTION
Rev A2, Page 6/14
J1: BiSS Interface input
9-pin Sub D Connector - female
PIN
Name
Function
1
VB
+12 V supply voltage
2
MA +
Clock input
3
MA Clock input (inverted)
4
VDD
+5 V supply voltage
5
SLI Data input (inverted)
6
GND
0 V ground
7
SL +
Data line
8
SL Data line (inverted)
9
SLI +
Data input
J2: BiSS Interface output
9-pin Sub D Connector - male
PIN
Name
Function
1
VB
+12 V supply voltage
2
MAO +
Clock output
3
MAO Clock output (inverted)
4
VDD
+5 V supply voltage
5
SLO Data output (inverted)
6
GND
0 V ground
7
SL +
Data line
8
SL Data line (inverted)
9
SLO +
Data output
J3: Multiturn Interface
9-pin Sub D Connector - male
PIN
Name
Function
1
VB
+12 V supply voltage
2
MAO +
Clock output
3
MAO Clock output (inverted)
4
VDD
+5 V supply voltage
5
n. c.
6
GND
0 V ground
7
SL +
Data input
8
SL Data input (inverted)
9
n. c.
J11: Free configurable
20-pin Connector - male
PIN
Name
Function
1 - 20
n. c.
reserved for customised configuration
J4: I2 C Interface
10-pin Connector - male
PIN
Name
1
SCL
2
GND_I2 C
3
n. c.
4
VDD_I2 C
5
n. c.
6
n. c.
7
SDA
8
n. c.
9
SDA
10
GND_I2 C
J5: Signal inputs
20-pin Connector - male
PIN
Name
1
PSINSI
2
NSINSI
3
PCINSI
4
NCINSI
5
PSINMI
6
NSINMI
7
PCINMI
8
NCINMI
9
PSINNI
10
NSINNI
11
PCINNI
12
NCINNI
13
GNDA
14
VDDA
(VCC)
15
ACOM
16
17
18
LED_C
ACON
ACOS
19
20
n. c.
n. c.
Note:
n. c. pin not connected
Function
I2 C clock
I2 C ground
I2 C +5 V supply voltage
I2 C data
I2 C data
I2 C ground
Function
Signal Input Sine + (Segment)
Signal input Sine - (Segment)
Signal Input Cosine + (Segment)
Signal Input Cosine - (Segment)
Signal Input Sine + (Master)
Signal Input Sine - (Master)
Signal Input Cosine + (Master)
Signal Input Cosine - (Master)
Signal Input Sine + (Nonius)
Signal Input Sine - (Nonius)
Signal Input Cosine + (Nonius)
Signal Input Cosine - (Nonius)
Sub-system ground output
Sub-system positive supply output
Signal level controller output (Master
channel, LED anode)
LED cathode ground path
Signal level controller output
Signal level controller output
Reference voltage input/output (VREFin)
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iC-MN EVAL MN1D
EVALUATION BOARD DESCRIPTION
Rev A2, Page 7/14
JUMPER DESCRIPTION
Voltage supply options with adapter MB3U
Voltage supply
via board
via board
terminal1
terminal4
VB
VDD
X
X
via J1
plug2
via J2
plug
X
X
-
X
X
-
Component supply
iC-MN
Jumper configuration
JP1 (VB)
JP2 (VDD)
+12 V via J1 +5 V via J1
Jumper configuration
JP3 (VB)
JP4 (VDD)
+12 V via J2 +5 V via J2
via J1 (VB)
via J1 (VDD)
via J2 (VB)
via J2 (VDD)
via board terminal VB
via board terminal VDD
bridged
open
open
open
open
open
don’t care
don’t care
bridged
open
don’t care
don’t care
open
bridged
open
open
open
open
don’t care
don’t care
open
bridged
don’t care
don’t care
Voltage supply options with adapter MB3A
Voltage supply
via board
via board
terminal1
terminal4
VB
VDD
X
X
via J1
plug3
via J2
plug
none
none
none
none
X
X
-
Component supply
iC-MN
MB3A
Jumper configuration
JP1 (VB)
JP2 (VDD)
Jumper configuration
JP3 (VB)
JP4 (VDD)
via J2 (VB)
via J2 (VDD)
via board terminal VB
via board terminal VDD
open
open
open
open
bridged
open
don’t care
don’t care
Communication chain
Board 1
Information
Jumper configuration
JP10
JP11
bridged
bridged
Jumper configuration
JP10
JP11
N/A
N/A
open
open
bridged
bridged
open
open
bridged
bridged
open
open
bridged
bridged
N/A
open
open
bridged
N/A
open
open
bridged
Single-Board connection (see
Figure 4)
Board-to-Board connection. Set
board 2 as the last slave in the
line (see Figure 5)
Notes 1 )
2)
3)
4)
5)
I2 C Interface configuration
Pin 1
n. c.
VDD_J4
Pin 2
GND_I2 C
VDD_I2 C
Pin 3
GNDA
VDDA
Serial data input configuration (SLI)
Jumper
JP9
Pin 1
GNDA
Pin 2
SLI
open
bridged
don’t care
don’t care
Board 2
Supply of +8 V to +15 V required to board terminals VB and GND
Supply voltage sourced from J1 plug out of PC adapter
MB3A needs to be externally supplied via the MN1D evaluation board
Supply of +5 V required to board terminals VDD and GND
Connect the two boards as shown in Figure 5
Jumper
JP8
JP7
open
open
bridged
bridged
Pin 3
extern
JP12 is for disconnecting and current measuring at VDDA.
Comments
shipment setup
(only one board)
Adapter → Board 1 (J1)
Board 1 (J2) → Board 2 (J1)5
don’t use
don’t use
don’t use
don’t use
iC-MN EVAL MN1D
EVALUATION BOARD DESCRIPTION
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Rev A2, Page 8/14
APPLICATION SOFTWARE
iC-MN’s GUI software for PCs running on Windows operating systems, as well as the required USB and/or LPT driver are available as a ZIP
file.
Installation
After unzipping the "iC-MN_xx.zip", the following files are located in the selected directory.
(xx is a placeholder for revisions)
→ iC-MN_xx.msi
→ mb3u_usb_driver.exe
→ mb3_lpt_driver.exe
→ Mn1d_a1es.pdf
→ readme.txt
Note : Administrator rights are essential to run installation.
1. The installation of the software starts by executing the iC-MN_xx.msi installation package.
→ Follow the on-screen instructions to finish the installation procedure.
2. USB and/or LPT driver need to be installed to access the evaluation board via the PC Adapter.
→ Execute the mb3u_usb_driver.exe and/or mb3_lpt_driver.exe installation package and follow the on-screen instructions. This process can
take a few minutes.
3. Installation will make the software "iC-MN_xx.exe" available in the selected working directory. The execution of this file will start the
software. Figure 6 shows a screenshot of the startup window.
iC-MN EVAL MN1D
EVALUATION BOARD DESCRIPTION
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Rev A2, Page 9/14
Figure 6: iC-MN software after startup
Instructions
The iC-MN software features:
•
•
•
•
•
Manual setup of iC-MN configuration parameters
Save configuration parameters to EEPROM.
Export of configuration parameter to Hex-files.
Import of predefined configurations from Hex-files.
Position data readout and display.
The iC-MN software will start up in "No Hardware" mode. This state can be used to configure parameters without any hardware connected,
for example to save the configuration into a Hex-file for later use. Connecting to iC-MN: Choose a <Mode> and then <Initialize> the BiSS
bus. For example with MB3U: Choose <Mode> = <BiSS Master / USB-SPI-Mode> and then press <Initialize>.
iC-MN EVAL MN1D
EVALUATION BOARD DESCRIPTION
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Main Window
Menu Section
Button
Exit
Load File
Save
Description
Quit program
Load configuration from file, Intel Hex file format (*.hex)
Save configuration into file, Intel Hex file format (*.hex)
No Hardware
BiSS Master / Intel Mode
BiSS Master / Motorola-Mode
BiSS Master / SPI-Mode
BiSS Master / USB-SPI-Mode
Operation without connected adapters
(resets adapter communication)
Eval board MB3D-P
Eval board MB3D-P
BiSS PC-LPT adapter MB3A / eval board MB3D-S
BiSS PC-USB adapter MB3U
<BiSS>
Master Configuration
Initialize
Read RAM
Write RAM
Read Output
BiSS and SSI Interface configuration
Initializes the BiSS bus
Reads in iC-MN’s current configuration (RAM to PC)
Transfers the displayed configuration to iC-MN (PC to RAM)
Reads out and displays position data of iC-MN
<Extra>
Enable Output Window
Enables separate display window (hexadecimal, decimal, binary, degree). Display is shown after starting <Read Output>
Additional information
<File>
<Mode>
LPT/USB-Port-Info
Upper Section
Button
BiSS-ID
Mode
Description
BiSS device manufacturer ID and product code. Can be edited and stored to the
configuration EEPROM (WRITE_CONF)
Shows hardware connection mode
Middle Section
Button
mm / ST
Sens
MT
Error
Warning
Description
Select sensor unit (Sens output field)
Single turn per mm (only with <Output Format> = Lin (Linear))
Position data
Multiturn data
Error bit (green = ’0’ / red = ’1’)
Warning bit (green = ’0’ / red = ’1’)
Read Output
Single
Write File
Err → Stop
SOFT_RES
WRITE_CONF
SOFT_PRES
CRC_CHECK
TOG_BISS
Write MN_CMD
Starts cyclic readout sequences
Single readout sequence
Writes sensor data to file with extension *.dat
Read output is halted in case of error
Soft reset (new startup of iC-MN from RAM data)
Transfers RAM data to the EEPROM
Calls preset routine
Calls CRC verification routine (for iC-MN RAM data)
Temporal toggle of interface protocol: SSI → BiSS Ce
Writes selected command
Button
Load File
Save File
Read RAM
Write RAM
Initialize
CRC
Description
See <File>
See <File>
See <File>
See <File>
See <File>
Calculated CRC value
(CRC_E2P for EEPROM adresses 0x4E and 0x4F)
<Output Format>
<Read Sens>
<MN_CMD>
Bottom Section
For all parameter settings, please refer to iC-MN data sheet for a detailed description.
iC-MN EVAL MN1D
EVALUATION BOARD DESCRIPTION
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Status bar
This area shows the following parameters:
S/D Conversion Mode
MODE_ST
NBISS
DL_ST
DL_MT (MODE_MT)
Master configuration
Figure 7: Master configuration
Button
Slave-ID
AutoGetSens
Enable Internal Clock
FrequSens
AutoGetSens Cycletime
SCD Length
SCD CRC-Poly
Datalength ST-MN
MODE
Test Comm.
Description
Use “0” when only one iC-MN is connected. By a higher slave ID a r/w access to
registers of further iC-MN’s connected in chain is possible (BiSS network).
Releases the BiSS Master to automatically repeat data readout cycles (Slave →
BiSS Master)
Selects for on-chip clock oscillator
Sensor mode clock frequency
Interval time for sensor mode cycles
Total length of Single Cycle Data (SCD)
Used CRC polynomial
default 0
See description of Menu section
Test communication to BiSS Master
green = successful; red = failed
When moving the mouse cursor to a parameter input box, a tool tip is displayed identifying the corresponding parameter name as described
in the specification. For a detailed description of the parameter settings please refer to iC-MN‘s Data Sheet.
iC-MN EVAL MN1D
EVALUATION BOARD DESCRIPTION
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APPLICATION EXAMPLE
Figure 8: iC-MN EVAL MN1D connected to iC-PNxxxx EVAL LSH2M
Figure 9: Encoder test application with iC-PNxxxx EVAL LSH2M
iC-MN EVAL MN1D
EVALUATION BOARD DESCRIPTION
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RELATED PRODUCTS AND DOCUMENTATION
Item
Description
Documentation and Information
iC-PN2656
LSHC4S 26-256N
Phased Array Nonius Encoder 26-256
Code disc for iC-PN2656
http://www.ichaus.de/product/iC-PNxxxx
iC-PN2612
LSHC11S 26-512N
Phased Array Nonius Encoder 26-512
Code disc for iC-PN2612
iC-PN2624
LSHC1S 26-1024N
Phased Array Nonius Encoder 26-1024
Code disc for iC-PN2624
iC-PN3312
LSHC9S 33-512N
Phased Array Nonius Encoder 33-512
Code disc for iC-PN3312
iC-PN3324
LSHC10S 33-1024N
Phased Array Nonius Encoder 33-1024
Code disc for iC-PN3324
iC-PN3924
LSHC12S 39-1024N
Phased Array Nonius Encoder 39-1024
Code disc for iC-PN3924
iC-TL85 TO46-2L1
iC-SD85 BLCC SD1C
Encoder IR LED, 850 nm, with lens
Encoder IR LED, 850 nm, with lens, SMT
http://www.ichaus.de/product/iC-TL85
http://www.ichaus.de/product/iC-SD85
iC-MN QFN48
iC-MN EVAL MN1D
Nonius Interpolator
Evaluation Board of iC-MN
http://www.ichaus.de/product/iC-MN
iC-MB4 iCSY MB4U
High Performance BiSS-to-PC Adapter (USB)
http://www.ichaus.de/product/MB4U
iC-SCY SinCosYzer
SinCosYzer Workstation - Sine Encoder
Signal Acquisition with Graphical Analysis
http://www.ichaus.de/product/SinCosYzer
Figure 10: Evaluation kit iC-PN2656 EVAL LSH2M
iC-MN EVAL MN1D
EVALUATION BOARD DESCRIPTION
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REVISION HISTORY
Rev
A1
A2
Notes
Initial version
Update Ordering Information,
New Chapter Application Example, Related Products and Documentation
Pages affected
1
13 - 14
iC-Haus expressly reserves the right to change its products and/or specifications. An info letter gives details as to any amendments and additions made to the
relevant current specifications on our internet website www.ichaus.de/infoletter; this letter is generated automatically and shall be sent to registered users by
email.
Copying – even as an excerpt – is only permitted with iC-Haus’ approval in writing and precise reference to source.
iC-Haus does not warrant the accuracy, completeness or timeliness of the specification and does not assume liability for any errors or omissions in these
materials.
The data specified is intended solely for the purpose of product description. No representations or warranties, either express or implied, of merchantability, fitness
for a particular purpose or of any other nature are made hereunder with respect to information/specification or the products to which information refers and no
guarantee with respect to compliance to the intended use is given. In particular, this also applies to the stated possible applications or areas of applications of
the product.
iC-Haus conveys no patent, copyright, mask work right or other trade mark right to this product. iC-Haus assumes no liability for any patent and/or other trade
mark rights of a third party resulting from processing or handling of the product and/or any other use of the product.
As a general rule our developments, IPs, principle circuitry and range of Integrated Circuits are suitable and specifically designed for appropriate use in technical
applications, such as in devices, systems and any kind of technical equipment, in so far as they do not infringe existing patent rights. In principle the range of
use is limitless in a technical sense and refers to the products listed in the inventory of goods compiled for the 2008 and following export trade statistics issued
annually by the Bureau of Statistics in Wiesbaden, for example, or to any product in the product catalogue published for the 2007 and following exhibitions in
Hanover (Hannover-Messe).
We understand suitable application of our published designs to be state-of-the-art technology which can no longer be classed as inventive under the stipulations
of patent law. Our explicit application notes are to be treated only as mere examples of the many possible and extremely advantageous uses our products can
be put to.