A two switch topology with interleaved buck-boost
converter for low stress PFC applications
1
Aoun Muhammad, 2Awang Jusoh and 3M. Salem
Department of Power Engineering
Faculty of Electrical Engineering
University Technology Malaysia
Johor, Malaysia
1
aounsunny786@hotmail.com, 2awang@fke.utm.my, 3smohamed3@live.utm.my
Abstract— When the universal-input applications are dealt with
the power-factor-correction (PFC), there is always the problem
of higher switch voltage stresses and higher inductor conduction
losses. The paper has a topology namely buck-interleaved buckboost (BuIBB) converter has lower switch voltage stresses and
lower inductor conduction losses compared to other single-switch
or two-switch converter topologies. In the paper, the analysis of
the converter operation, component stresses and the total rootmean-square (RMS) currents is shown.
with the two-switch configuration. Fig. 1 shows (a) the
standard buck-boost converter and the two-switch buck-boost
configurations, (b) the buck-cascaded buck-boost (BuCBB)
converter, (c) the boost-cascaded buck-boost (BoCBB)
converter and (d) the boost-interleaved buck-boost (BoIBB)
converter. The two-switches may be operated independently,
the converters may be used as a buck or boost converter that
has a minimum indirect energy processing. So, by using
additional switches and controls, the two-switch buck-boost
topologies may have reduced component stresses [11]. The
complete families of two-switch buck-boost converters having
minimum indirect energy delivery are discussed in [12].
The New Proposed Buck-Interleaved Buck-Boost (NP
BuIBB) converter shown in Fig. 2 is identified as a
configuration which has lower switch stresses, the conduction
losses are lower and inductor stresses are reduced compared to
the conventional buck-boost converter in Fig. 1(a) and other
two-switch buck-boost converters in Fig. 1(b), (c) and (d). It
can also be used in power factor correction (PFC)
applications. The operating modes of the NP BuIBB are
shown in Fig. 3.
The purpose of this paper is to present the analysis of the
operation and the component stresses in the new proposed
BuIBB converter. Operating modes are described in Section
II. Analysis of the stresses is described in Section III. The total
RMS currents are discussed in Section IV. The comparison of
stresses is described in Section V.
Keywords—Buck-interleaved buck-boost (BuIBB) converter; rootmean-square(RMS); Component stresses; Conduction losses.
I.
INTRODUCTION
Interleaving concept is very popular in power electronics.
High efficiency can be achieved by using the interleaving
technique [1]. Interleaving can also be used for the power
factor correction (PFC)[2]. Interleaved converters are used for
sharing the load current in high power applications. It also has
the advantage of high equivalent switching frequency and
reduced output current ripples. It also provides fast dynamic
response [3]. So, the interleaving technique provides a number
of features. When interleaving is used with the two-switches
in the buck boost converters, it also reduces the inductance in
synchronization control strategy and also resolves the control
complexity [4]. Further interleaving not only provides the
power factor correction but also improves the power quality
and reduces the interference levels [5].
The conventional single-switch buck-boost topologies have
the problem of an increase in the component stresses and
component sizes [6]-[10]. So, based on the previous
discussion, it will be beneficial to use interleaving technique
978-1-4799-4848-2/14/$31.00 ©2014 IEEE
101
L2
Q2
D1
+
L1
Vg
C1
DC
Q1
Ro
C2
V(t)
D2
_
(d)
Fig. 1. (a) Standard buck-boost converter, (b) the buck-cascaded buck-boost (BuCBB) converter, and (c) the boost-cascaded bu
uck-boost (BoCBB) converter,
(d) Boost-interleaved buck-boost (BoIBB) converter.
Fig. 2 New Proposed Buuck-interleaved buck-boost (NP BuIBB) converter.
IL1(t)
IL1(t)
+
L1
L1
IQ1(t)
IQ2(t)
Q1
Q2
Vg
IL2(t)
C1
DC
L2
IL2(t)
D2
+
D1
Ro
V(t) Vg
C1
DC
L2
Ro
V(t)
C2
C2
_
_
(a)
(b)
Fig. 3. Operatting modes of the NP BuIBB converter: (a) boost and (b) buck.
102
II.
OPERATING MODES OF THE BUCK-INTERLEAVED
BUCK-BOOST CONVERTER
4
The proposed new buck-interleaved buck-boost (BuIBB)
converter with two switches is shown in Fig 2. Here, the boost
switch cell is interleaved with the buck switch cell. Suppose d
and d2 be the duty ratios of switches Q1 and Q2, respectively.
The overall DC voltage conversion ratio is given as:
M=
V
d1
= d2 +
Vg
1-d1
sin
1
10
Vin,rms
Converter
IQ1,rms(A)
IQ2,rms(A)
IL1,rms(A)
120 V
Buck-boost(Fig 1(a))
1.102
1.092
1.448
BuCBB(Fig 1(b))
0.450
0.848
0.848
N/A
BoCBB(Fig 1(c))
0.450
0.515
0.848
0.515
BoIBB(Fig 1(d))
0.450
0.627
0.277
0.627
BuIBB(Fig 2)
0.432
0.606
0.246
0.606
Buck-boost(Fig 1(a))
0.660
0.650
1.034
1.024
BuCBB(Fig 1(b))
0.073
0.519
0.632
N/A
BoCBB(Fig 1(c))
0.073
0.595
0.431
0.713
BoIBB(Fig 1(d))
0.073
0.512
0.054
0.627
BuIBB(Fig 2)
0.056
0.489
0.031
0.604
IL2,rms(A)
1.438
2
.
3
0
4
240V
5
6
sin
The comparison of RMS current is shown briefly in Table I.
IV.
/
TABLE I. COMPONENT RMS CURRENTS AT LOW V (120VRMS)
AND HIGH V (240VRMS) COMPARISON WITH THE OUTPUT DC
VOLTAGE V = 220V AND THE POWER OUTPUT P = 120 W
ANALYSIS OF STRESSES
sin
9
sin
4
The analysis of stresses for the buck and the boost modes
are as shown below:
:
,
/
4
When Q2 is on, then d2 = 1. As a result, M = d1 and the
converter operates in the boost mode, which is shown in Fig.
3(a). In this mode, the input current is divided into L1 and L2.
When Q1 is off, then d1 = 0. Therefore, M = d2/(1-d2) and the
converter operates in the buck mode, which is shown in Fig.
3(b). The low-frequency filter is performed by the
combination of L2 and C2.
III.
8
2
TOTAL RMS CURRENTS
The total RMS currents equations for the buck and the
boost mode are as shown below:
4
sin
V.
COMPARISON OF STRESSES
It is observed in Table I that the component RMS currents
stresses of the interleaved two switch buck-boost converters
are the least then the two switch cascaded buck-boost
converters and the standard buck-boost converter has the
maximum component RMS current stresses. Apart from that,
it can also be observed that the new proposed BuckInterleaved Buck-Boost (BuIBB) converter has the minimum
7
103
RMS current stresses compared to the other thhree topologies.
Suppose, the transistor switch on-resistance inn the standard
buck-boost converter is two times lower compaared to the onresistance of the two-switch buck-boost convverters because
when two switches are used, then the on-resistannce will be two
times more for the single switch. Additionally, it is assumed
that the series resistance of the inductor in the standard buckboost converter and the BuCBB is two times lower than the
series resistance of BoCBB, BoIBB and BuIBB converters
because when two inductors are used then the inductor series
resistance will be two times more for the single inductor. After
these assumptions were made, Fig. 4 and Figg. 5 show the
inductor and switch conduction losses arre normalized
compared to the losses in the standard buck-booost converter,
as functions of the conversion ratio V/VM respeectively.
In Fig. 4, at a low value of V/VM up to 0.6 New Proposed
Buck-Interleaved Buck-Boost (NP BuIBB) convverter is not the
best of all but it is better than the BoIBB
B and BoCBB
converters. In this case, BuCBB converterr is the best
compared to the other three topologies. But, forr the other low
values of V/VM after 0.6 to 1 and also for the high values of
V/VM>1, New Proposed Buck-Interleaved Buuck-Boost (NP
BuIBB) converter has the lowest inductor connduction losses
compared to the other three topologies including BoIBB
converter.
Fig. 5 Comparison of the total conduction losses of the switch in the twoswitch
converters normalized to the buck-boost convverter,(I2Q1,rms+I2Q2,rms)/(I2Q,rms/2)
VI.
CONCLUSIO
ON
A new topology is proposed namely
y Buck-interleaved buckboost (BuIBB) converter. When itt is compared with the
conventional buck-boost or other coonverters, even with the
Boost-interleaved buck-boost (BoIBB), the proposed
witch voltage stresses and
converter showed that it has lower sw
lower inductor conduction losses. It is shown that it has lower
losses compared to the other topologgies, which consequently
offer better efficiency compared to thee other topologies.
ACKNOWLEDGM
MENT
The authors would like to express gratitude to Ministry of
Education (MOE) and Universiti Tekknologi Malaysia (UTM)
for the financial support provided unnder Research University
Grant (RUG) Q.J.130000.2523.03H440 and also to Research
Management Centre (RMC) for suppport and co-operation of
the research work.
Fig. 4 Comparison of the inductor conduction losses in
i the two-switch
converters normalized to the buck-boost converter,(I2L1,rms+I2L2,rms)/(I2L,rms/2)
REFERENCESS
In Fig. 5 at a low value of V/VM<1, New Prroposed BuckInterleaved Buck-Boost Converter (NP BuIB
BBC) has the
lowest switch conduction losses compared to the
t other three
topologies including the BoIBB converter. At high value of
t other three
V/VM>1, although BoCBB is the best of all the
topologies but New Proposed Buck-Interleaveed Buck-Boost
Converter (NP BuIBBC) has the lower swittch conduction
losses compared to the other two topologies including the
BoIBB converter.
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