Power Factor Corrected Bridgeless Buck–Boost Converter-Fed
with Adjustable-Speed BLDC Motor Drive
P.Anil Kumar
MTech Student
Department of EEE
AnuBose Institute of Technology(ABIT)
Paloncha, Khammam, India
ABSTRACT:
This paper presents a power factor corrected (PFC)
bridgeless (BL) buck–boost converter-fed brushless
direct current (BLDC) motor drive as a cost-effective
solution for low-power applications. An approach of
speed control of the BLDC motor by controlling the
dc link voltage of the voltage source inverter (VSI) is
used with a single voltage sensor. This facilitates the
operation of VSI at fundamental frequency switching
by using the electronic commutation of the BLDC
motor which offers reduced switching losses. A BL
configuration of the buck–boost converter is
proposed which offers the elimination of the diode
bridge rectifier, thus reducing the conduction losses
associated with it. A PFC BL buck–boost converter is
designed to operate in discontinuous inductor current
mode (DICM) to provide an inherent PFC at ac
mains. The performance of the proposed drive is
evaluated over a wide range of speed control and
varying supply voltages (universal ac mains at 90–
265 V) with improved power quality at ac mains. The
obtained power quality indices are within the
acceptable limits of international power quality
standards such as the IEC 61000-3-2. The
performance of the proposed drive is simulated in
MATLAB/Simulink environment, and the obtained
results are validated experimentally on a developed
prototype of the drive.
Index Terms—Bridgeless (BL) buck–boost converter,
brushless
direct
current
(BLDC)
motor,
discontinuous inductor current mode (DICM), power
factor corrected (PFC), power quality.
C.Ch Mohan Rao
Associate Professor & HoD
Department of EEE
AnuBose Institute of Technology(ABIT)
Paloncha, Khammam, India
INTRODUCTION:
Efficiency and cost are the major concerns in the
development of low-power motor drives targeting
household applications such as fans, water pumps,
blowers, mixers, etc. The use of the brushless direct
current (BLDC) motor in these applications is
becoming very common due to features of high
efficiency, high flux density per unit volume, low
maintenance requirements, and low electromagnetic
interference problems.
These BLDC motors are not limited to household
applications, but these are suitable for other
applications
such
as
medical
equipment,
transportation, HVAC, motion control, and many
industrial tools. A BLDC motor has three phase
windings on the stator and permanent magnets on the
rotor.
The BLDC motor is also known as an electronically
commutated motor because an electronic commutation
based on rotor position is used rather than a
mechanical commutation which has disadvantages like
sparking and wear and tear of brushes and commutator
assembly. Power quality problems have become
important issues to be considered due to the
recommended limits of harmonics in supply current by
various international power quality standards such as
the International Electro technical Commission (IEC)
61000-3-2. For class-A equipment (< 600 W, 16 A per
phase) which includes household equipment, IEC
61000-3-restricts the harmonic current of different
order such that the total harmonic distortion (THD) of
the supply current should be below 19%.
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Existing System:
The parameters of the BL buck–boost converter are
designed such that it operates in discontinuous
inductor current mode (DICM) to achieve an inherent
power factor correction at ac mains. The speed control
of BLDC motor is achieved by the dc link voltage
control of VSI using a BL buck–boost converter. This
reduces the switching losses in VSI due to the low
frequency operation of VSI for the electronic
commutation of the BLDC motor.
The performance of the proposed drive is evaluated for
a wide range of speed control with improved power
quality at ac mains. Moreover, the effect of supply
voltage variation at universal ac mains is also studied
to demonstrate the performance of the drive in
practical supply conditions. Voltage and current
stresses on the PFC converter switch are also evaluated
for determining the switch rating and heat sink design.
Finally, a hardware implementation of the proposed
BLDC motor drive is carried out to demonstrate the
feasibility of the proposed drive over a wide range of
speed control with improved power quality at ac
mains.
Proposed System:
The operation of the PFC BL buck boost converter is
classified into two parts which include the operation
during the positive and negative half cycles of supply
voltage and during the complete switching cycle.
Operation During Positive and Negative Half Cycles
of Supply Voltage
In the proposed scheme of the BL buck boost
converter, switches Sw1 and Sw2 operate for the
positive and negative half cycles of the supply voltage,
respectively. During the positive half cycle of the
supply voltage, switch Sw1, inductor Li1, and diodes
D1 and Dp are operated to transfer energy to dc link
capacitor Cd as shown in Fig. 2(a)–(c). Similarly, for
the negative half cycle of the supply voltage, switch
Sw2, inductor Li2, and diodes D2 and Dn conduct.
Operation During Complete Switching Cycle
Three modes of operation during a complete switching
cycle are discussed for the positive half cycle of supply
voltage as shown here in after.
Mode I: In this mode, switch Sw1 conducts to charge
the inductor Li1; hence, an inductor current iLi1
increases in this mode as shown in Fig. 2(a). Diode Dp
completes the input side circuitry, whereas the dc link
capacitor Cd is discharged by the
VSI-fed BLDC motor
DESIGN OF PFC BL BUCK–BOOST
CONVERTER
A PFC BL buck–boost converter is designed to operate
in DICM such that the current in inductors Li1 and Li2
becomes discontinuous in a switching period. For a
BLDC of power rating 251 W (complete specifications
of the BLDC motor are given in the Appendix), a
power converter of 350 W (Po) is The proposed
converter is designed for dc link voltage control from
50 V (Vdc min) to 200 V (Vdcmax) with a nominal
value (Vdc des) of 100 V; hence, the minimum and the
maximum duty ratio (dmin and dmax) corresponding
to Vdc min and Vdc max are calculated as 0.2016 and
0.5025, respectively
SIMULATED PERFORMANCE OF PROPOSED
BLDC MOTOR DRIVE
The performance of the proposed BLDC motor drive is
simulated in MATLAB/Simulink environment using
the Sim Power System toolbox. The performance
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evaluation of the proposed drive is categorized in
terms of the performance of the BLDC motor and BL
buck–boost converter and the achieved power quality
indices obtained at ac mains. The parameters
associated with the BLDC motor such as speed (N),
electromagnetic torque (Te), and stator current (ia) are
analyzed for the proper functioning of the BLDC
motor. Parameters such as supply voltage (Vs), supply
current (is), dc link voltage (Vdc), inductor’s currents
(iLi1, iLi2), switch voltages (Vsw1, Vsw2), and switch
currents (isw1, isw2) of the PFC BL buck–boost
converter are evaluated to demonstrate its proper
functioning.
Steady-State Performance
The steady-state behavior of the proposed BLDC
motor drive for two cycles of supply voltage at rated
condition (rated dc link voltage of 200 V) is shown in
Fig. 6. The discontinuous inductor currents (iLi1 and
iLi2) are obtained, confirming the DICM operation of
the BL buck boost converter. The performance of the
proposed BLDC motor drive at speed control by
varying dc link voltage from 50 to 200 V is tabulated
in Table III. The harmonic spectra of the supply
current at rated and light load conditions, i.e., dc link
voltages of 200 and 50 V, are also shown in Fig. 7(a)
and (b), respectively, which shows that the THD of
supply current obtained is under the acceptable limits
of IEC 61000-3-2.
COMPARATIVE ANALYSIS OF DIFFERENT
CONFIGURATIONS
A comparative analysis of the proposed BL buck–
boost converter-fed BLDC motor drive is carried out
with conventional schemes. Two conventional
schemes of the DBR-fed.
HARDWARE VALIDATION OF PROPOSED
BLDC MOTOR DRIVE
A digital signal processor (DSP) based on TITMS320F2812 is used for the development of the
proposed PFC BL buck–boost converter-fed BLDC
motor drive. The necessary circuitry for isolation
between DSP and gate drivers of solid state switches is
developed using the opto coupler 6N136. A
prefiltering and isolation circuit for the Hall-Effect
sensor is also developed for sensing the Hall-effect
position signals. Test results are discussed in the
following sections.
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performance, and it is a recommended solution
applicable to low-power BLDC motor drives.
REFERENCES
[1] C. L. Xia, Permanent Magnet Brushless DC Motor
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Table VII shows a comparative analysis of three
different configurations of the BLDC motor drive. The
evaluation is based on the control requirement, sensor
requirement, and losses in the PFC converter and VSIfed BLDC motor. The proposed scheme has shown a
minimum amount of sensing requirement and cost with
the highest efficiency among the three configurations,
and hence, it is a recommended solution for low-power
applications.
CONCLUSION
A PFC BL buck–boost converter-based VSI-fed
BLDC motor drive has been proposed targeting lowpower applications. A new method of speed control
has been utilized by controlling the voltage at dc bus
and operating the VSI at fundamental frequency for
the electronic commutation of the BLDC motor for
reducing the switching losses in VSI. The front-end
BL buck–boost converter has been operated in DICM
for achieving an inherent power factor correction at ac
mains. A satisfactory performance has been achieved
for speed control and supply voltage variation with
power quality indices within the acceptable limits of
IEC 61000-3-2. Moreover, voltage and current stresses
on the PFC switch have been evaluated for
determining the practical application of the proposed
scheme. Finally, an experimental prototype of the
proposed drive has been developed to validate the
performance of the proposed BLDC motor drive under
speed control with improved power quality at ac
mains. The proposed scheme has shown satisfactory
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Author Details:
Mr.Pathuri Anil Kumar, PG Scholar and Completed
B.Tech degree in Electrical & Electronics Engineering
in 2012 from JNTUH, presently pursuing M.Tech in
“Power Electronics ”
in Anubose institute of
technology,palvancha,india.
Mr.Chettumala Ch Mohan Rao was born in 1980.
He graduated from kakatiya University, warangal in
the year 2002. He received M.Tech degree from
Jawaharlal Nehre Technological University, Hyderabad
in the year 2012. He is presently working as Associate.
Professor in the Department of Electrical and
Electronics Engineering at Anubose Institute Of
Technology, Paloncha, India. His research area
includes DTC and Drives.
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A. J. Sabzali, “New ‘real’ bridgeless high efficiency
ac-dc converter,” in Proc. 27th Annu. IEEE APEC
Expo., Feb. 5–9, 2012, pp. 317–323.
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