A New Low-Stress Buck-Boost Converter for
Universal-Input PFC Applications
-LQJTXDQ&KHQ'UDJDQ0DNVLPRYLüDQG5REHUW(ULFNVRQ
Colorado Power Electronics Center
Department of Electrical and Computer Engineering
University of Colorado at Boulder
Boulder, CO 80309-0425, USA
Abstract – In converters for power-factor-correction (PFC),
universal-input capability (ability to operate from any AC line
voltage, world-wide) comes with a heavy price in terms of
component stresses and losses, size of components, and
restrictions on the output DC voltage. A new two-switch
topology is proposed to offer very significant performance
improvements over the single-switch buck-boost converters
(including flyback, SEPIC, and Cuk topologies) and
conventional two-switch buck-boost cascaded converters. The
proposed converter has buck-boost conversion characteristic,
switch conduction losses comparable to the boost converter, no
inrush current problem, and potential for smaller inductor size
compared to the boost converter.
I.
L1
Vg
D1
Q1
Q2
C1
L2
D2
C2
Ro
a)
Q2
Vg
L
D2
D1
Q1
C
Ro
INTRODUCTION
b)
It is well known that boost topology is highly effective in
PFC applications, provided that the dc output voltage is close
to, but slightly greater than the peak AC input voltage [1]. In
universal-input applications, with the RMS input line voltage
in the 90-305V range, the output voltage has to be set to
about 450V. At low line (90Vrms), the switch conduction
losses are high because the input RMS current has the largest
value, and the largest step-up conversion is required. The
inductor has to be oversized for large RMS current at low line
input, and for the highest volt-seconds applied throughout the
input-line range. As a result, a boost converter designed for
universal-input PFC applications is heavily oversized
compared to a converter designed for a narrow range of input
line voltages. Furthermore, because of the large energy
storage filter capacitor at the output, the boost converter has
inrush current problem that can only be mitigated using
additional components.
In universal-input PFC applications, the capability of
providing both step-up and step-down conversion is attractive
because the output DC voltage can be set to any value.
However, conventional single-switch buck-boost topologies,
including the plain buck-boost, flyback, SEPIC, and Cuk
converters [2, 3] have greatly increased component stresses,
component sizes, and reduced efficiency compared to the
boost converter.
1
Fig.1. Cascaded two-switch buck-boost topologies: a) boost-buckcascaded, b) buck-boost-cascaded
Q2
L2
D1
L1
C1
Vg
C2
Ro
Q1
D2
Fig. 2. Boost Interleaved Buck-Boost Converter (BoIBB).
The boost and the buck converter are known to have the
potentials for highest efficiency and lowest component
stresses if their conversion characteristics meet the
input/output specifications. Based on this observation, our
objective was to construct a converter topology with two
independently controllabe switches such that it can operate as
a buck or as a boost in portions of the AC line cycle. Such
two-switch topologies could offer higher efficiency, reduced
size, and ability to arbitrarily choose the DC output voltage.
This work is supported by Philips Research, Briarcliff Manor, NY, through Colorado Power Electronics Center
L2
iL2 (t)
D1
TABLE I
BASIC FUNTIONS IN BOOST AND BUCK MODES
iL1 (t)
L1
C1
C2
Ro
Q1
Q2
M
vg(t)
iQ1(t)
Q1
IL1
(a)
iQ2(t)
Q2
L2
IL2
iL2 (t)
VC1
Boost Mode
active
always on
1 /(1 − d1 )
Buck Mode
always off
active
d2
d1 V
1 − d 1 Ro
0
V / Ro
0
V / Ro
Vg − V
iL1 (t)
L1
v g(t)
C1
C2
II. OPERATING MODES AND STEADY-STATE
CHARACTERISTICS OF THE BOOST INTERLEAVED
BUCK-BOOST CONVERTER
Ro
The proposed Boost-Interleaved Buck-Boost (BoIBB)
converter is shown in Fig. 2. Unlike the cascaded topologies,
the boost switch cell (Q1 and D1) is interleaved with the buck
switch cell (Q2 and D2). In continuous conduction mode
(CCM), the converter has the following overall voltage
conversion ratio:
D2
(b)
Fig. 3. Operating modes of BoIBB: (a) boost, (b) buck.
Two simple examples illustrated in Fig. 1 (a) and (b) are the
conventional cascade connections of the buck and the boost
converters [4, 5]. These converters can operate as a boost
when Q2 is always on, and as a buck when Q1 is always off.
In continuous conduction mode, the overall voltage
conversion ratio is:
M = d 2 (1 − d1 )
(1)
where d1 and d2 are the duty ratios of Q1 and Q2 respectively.
We have found that other two-switch topologies with buckboost characteristic are possible by adopting the converter
synthesis approach described in [6]. One of these new DCDC converters is the “Boost Interleaved Buck-Boost”
(BoIBB) converter shown in Fig. 2. Operating modes and
basic steady-state characteristics of this converter are
described in Section II. Operation of the BoIBB converter as
a low-harmonic rectifier is discussed in Section III. The
results for transistor and inductor conduction losses are
derived in this section. Comparisons in terms of component
stresses, component conduction losses and magnetic sizes
among the new two-switch topology and boost, single-switch
buck-boost, and cascade connections of buck and boost
converters are presented in Section IV. Section V describes a
prototype of the new converter operating as a PFC rectifier
with universal-line input. Experimental results are provided
for both high-line and low-line input.
M = d 2 + d1 (1 − d1 )
(2)
If Q2 is always on, the converter operates in boost mode,
which is shown in Fig. 3(a). The average voltage on C1 is
zero. In this mode, the input current is divided through L1 and
L2. As a result, the total RMS current in L1 and L2 is smaller
than the current in a single inductor.
If Q1 is always off, the converter operates in the buck mode
as shown in Fig. 3(b). L1 and C1 form a low-frequency filter.
The average current through L1 and C1 is zero and the voltage
on C1 is equal to the difference between the input and the
output voltage. The inductor L2 in the buck mode takes the
same role as the inductor in the simple buck converter. The
basic steady-state results for both modes of operation are
summarized in TABLE I.
III.
OPERATION OF THE BOIBB CONVERTER AS AN
IDEAL RECTIFIER
In this section, we analyze operation of the BoIBB
converter as a low-harmonic rectifier. Expressions for RMS
currents of both transistors and inductors, and volt-seconds of
inductors are derived so that conduction losses and magnetic
sizes can be evaluated.
In PFC applications, the rectified input voltage is:
v g (t ) = V M sin(ϖ t )
(3)
It is desired that the output voltage is regulated at a constant
voltage V and that the input current ig(t) is proportional to the
input voltage:
i g (t ) =
vg(t)
VM
V
v g (t )
(4)
Re
where the emulated resistance Re is constant for a given
output power.
Fig. 4(a) shows the waveforms of the input and the output
voltage in one half of a line period, for the case when the
output voltage is chosen to be lower than the peak of the
input voltage. The converter operates in boost or buck modes
according to the condition of the input and the output DC
voltage. In the following analysis, CCM operation is
assumed.
d1(t), d2(t)
(a)
1
d2(t)
d1(t)
V/VM
t
Boost
Buck
Boost
(b)
A. Boost mode
In the time period [0, tm], shown in Fig. 4, the input voltage
is lower than the output voltage, the boost switch cell (Q1, D1)
is active, and the buck cell (Q2, D2) is inactive (Q2 is always
on).
In quasi steady-state operation, the duty ratios of the
transistors as functions of time are:
V

d 1 (t ) = 1 − M sin(ω t )

V

d 2 (t ) = 1
(5)
(6)
When Q1 is conducting, its current is the sum of the two
inductors current.
In the buck mode, Q1 is always off, and the current through
L1 equals to a small current ripple. Therefore, the RMS
currents of Q1 and L1 are found from (5) and (6) in the boost
mode. The results are given by (7) and (8) respectively:
4 
Tac 
4
=
Tac



∫ [d (t )(i
0
∫
tm
0
1
L1 (t ) + iL2 (t ))
2
]

boost dt 


( 2 sin 2 (ω t )dt − 2 sin 3 (ω t ))dt 
Re
VRe

VM2
I L1 , rms =
4
Tac



∫
tm
0
(
VM sin(ω t ) VM2 sin 2 (ω t ) 2 
−
) dt 
Re
VRe

VM3
(7)
(8)
The volt-seconds applied to L1 and L2 during a switching
period are the same as the volt-seconds applied to the
inductor in a simple boost converter, and are given by
v ⋅ s = d 1 (t )Ts ⋅ v g (t )
= (V M sin(ω t ) −

V M sin(ω t ) V M2 sin 2 (ω t )
−
i L1 (t ) =
Re
VRe

2
V M sin 2 (ω t )

i L2 (t ) =

VRe
tm
Fig. 4. (a) Rectified input voltage and DC output voltage waveforms,
(b) duty ratios of the boost and the buck cells in the BoIBB converter
operated as a low-harmonic rectifier.
V M2
sin 2 (ω t )) ⋅ Ts
V
where Ts is the switching period.
The average inductor currents are:
I Q1 , rms =
t
Tac /4
tm
(9)
B. Buck mode
In the time period [tm, Tac/4], where Tac is the line period, the
instantaneous input voltage is greater than the output voltage,
the buck cell becomes active and the boost cell goes inactive
(Q1 is always off). L1 and C1 form a low frequency filter
between the input and the output. They have insignificant
effects in quasi steady-state operation.
The duty ratios of Q1 and Q2 can be expressed as:
d 1 (t ) = 0


V
d (t ) =
2

V M sin(ω t )

(10)
The inductor currents are:
i L1 (t ) = 0



V M2 sin 2 (ω t )
i L2 (t ) =
VRe

(11)
TABLE II
Transistor(s) Conduction Losses
Compared to Boost Converter
2.5
COMPONENT RMS CURRENT AT LOW LINE AND HIGH LINE
Vin,rms(V)
IQ1,rms(A)
IQ2,rms(A)
IL1,rms(A)
IL2,rms(A)
120
0.22
0.417
0.25
0.306
240
0.032
0.245
0.076
0.306
BoIBB and
boost-buckcascaded
2
single-switch
buck-boost
1.5
buck-boostcascaded
1
0.5
Vo=200V, Po=100W
Vo(V)
0
150
200
250
300
325
350
400
450
(a)
TABLE III
Inductor(s) Conduction Losses
Compared to Boost Converter
3.5
COMPARISON OF SWITCH VOLTAGE STRESSES
Q1
Q2
D1
Vo
Vo
Single-switch buck-boost
VM+Vo
VM+Vo
single-switch
buck-boost
3
D2
Boost
BoIBB
2.5
buck-boostcascaded
2
boost-buckcascaded
1.5
1
Buck-boost-cascaded
Vo
VM
Vo
VM
Boost-buck-cascaded
VM
VM
Vo
VM
0.5
Vo(v)
0
150
200
250
300
325
350
400
450
(b)
BoIBB
VM
VM
Vo
VM
Fig. 5. (a) Worst-case transistor conduction losses comparisons (b)
worst-case inductor conduction losses comparisons
Vo: output DC voltage, VM: input peak voltage
v ⋅ s = (1 − d 2 (t ))Ts ⋅ V
The duty ratios of Q1 and Q2 during one half of a line cycle
are plotted in Fig. 4(b). The transitions between the boost and
buck modes are continuous. Both Q2 and L2 are conducting
currents in both boost and buck modes, and the RMS currents
are found from (5), (6), and (11):
I Q2 , rms =
4 
Tac 
4 
=

Tac 
∫ [d (i
tm
2 L1
0
tm V 2
M
0 R2
e
∫
+ iL2 ) 2
]
+
boost dt
sin 2 (ω t )dt +
∫
Tac / 4
tm
∫
Tac / 4
[d i ]
2
2 L2
tm

buck dt 


VM3
sin 3 (ω t )dt 
2
Re Vo

(12)
I L2 ,rms =
=
4 

Tac 
∫
tm
0
VM4
V
2
Re2
sin 4 (ω t )dt +
Tac / 4
∫
tm
VM4
V
2
Re2

sin 4 (ω t )dt 

= (V −
V2
) ⋅ Ts
VM sin(ω t )
(14)
The volt-seconds applied to L1 are close to zero in the buck
mode.
As an example, the component RMS currents are evaluated
and shown in TABLE II for two different lines.
IV. PERFORMANCE COMPARISONS
In this section, the BoIBB converter is compared to the
boost, the single-switch buck-boost, and cascaded buck-boost
topologies in terms of switch voltage stresses, conduction
losses, and size of magnetics. All results are obtained under
the assumption that the converters operate in continuous
conduction mode (CCM).
A. Switch voltage stresses
3 V
8 Ro
(13)
Ro in (13) is the load resistance.
The volt-seconds applied to L2 during a switching period
are the same as those on the inductor of a simple buck
converter:
The comparison of worst-case switch voltage stresses is
summarized in Table II. The output voltage Vo in the boost
converter must be greater than the maximum peak input
voltage VM, while in all buck-boost converters, the output
voltage can be arbitrarily set to any value. All two-switch
topologies, including the BoIBB converter, have lower
voltage stresses than the single-switch buck-boost converters,
Vin=90Vrms
Vin=220Vrms
vs
Vin=90Vrms
vs
0.002
Vin=220Vrms
Vin=305Vrms
0.0012
0.0008
Vin=90Vrms
vs
Vin=220Vrms
0.001
Vin=305Vrms
Vin=305Vrms
0.0016
0.0008
0.0012
0.0006
0.0008
0.0004
0.0004
0.0004
0.0002
Radian
Radian
0
Radian
0
0
0
0.5
1
1.5
2
2.5
3
0
0.5
1
(a)
1.5
2
2.5
0
3
0.5
1
1.5
2
(b)
2.5
3
(c)
Fig. 6. The volt-seconds applied to the inductors (a) boost, (b) single-switch buck-boost, (c) two-switch buck-boost
and have almost the same voltage stress as the boost
converter (at the expense of more switching devices).
voltage, the loss can be as low as 50% of the inductor
conduction loss in the boost converter.
B. Transistor conduction losses
2.
In this comparison, we assume that all devices have the
same on-resistance, and so we compare the total transistor
RMS currents defined as the sum of the squares of the
individual transistor RMS currents. In practice, for the same
die size, the on-resistance for the transistor in single-switch
buck-boost converters would be higher because of the higher
voltage rating. The worst case for switch conduction losses
occurs at the minimum ac line input (90Vrms). Switch
conduction losses for all buck-boost topologies are found as
functions of the DC output voltage and normalized to the
switch conduction losses in a boost converter operating with
fixed DC output voltage equal to 450V. The results are
shown in Fig. 5(a). The proposed converter and the boostbuck-cascaded converter have the total transistor conduction
losses very close to the boost converter, and much smaller
losses than in the single-switch buck-boost or the buck-boostcascaded converters. For example, at 300V output, the
transistor conduction losses in the single-switch buck-boost
converter and the buck-boost-cascaded converter are 1.78 and
2.15 times of the transistor conduction losses in the new
topology.
The volt-seconds applied to the inductor in the singleswitch buck-boost converters are given by (15). For a twoswitch buck-boost converter, an inductor can play the role as
part of a low-frequency filter in one of the modes. In this
case, the volt-seconds applied during a switching cycle are
almost zero. When the input voltage is lower than the output
voltage, the inductor operates as in a boost converter and the
volt-seconds applied follow from (9). When the input voltage
is greater than the output voltage, the inductor operates as in a
buck converter, and the volt-seconds applied follow from
(14).
Volt-seconds applied to the inductors
v⋅s =
V + V M sin(ω t )
⋅ Ts
(15)
The total volt-seconds applied to the inductors for the
boost, single-switch buck-boost and two-switch buck-boost
converters are plotted in Fig 6. as functions of time over one
half of the line cycle. Three curves are shown, based on
different rms input voltages and for a fixed switching
Q2
Lf
C. Comparison of magnetics
Worst-case inductor copper losses and volt-seconds
applied to inductors are two factors that determine the
inductor size.
VV M sin ω t
L2
D1
L1
Vac
C1
Cf
Q1
C2
Ro
D2
1. Inductor conduction losses
The worst-case inductor copper loss also occurs at the
minimum AC line input. The results for copper losses as
functions of the dc output voltage, normalized to the copper
losses in the boost converter with fixed Vo = 450V, are shown
in Fig. 5(b). Again, the same resistance is assumed for all
inductors, so that total RMS currents are compared. The new
converter has significantly lower losses than the other buckboost topologies; and by proper selection of the output DC
Current Shaping
Vcontrol
Dual PWM
Driver
Controller
Voltage
Compensator
Fig. 7. Experimental BoIBB converter,
L1=1.1mH, L2=2mH, C1=2.25uF, C2=150uF, fs=100KHZ, Vo=200V
1
Max(d1)=0.9
d2=1+Vcontrol
d1=Vcontrol
Vcontrol
-1
vcontrol(t)
1
1
(a)
vg(t)
V
t
-1+Vo/VM
(a)
(b)
Fig. 8. (a) Duty ratios as functions of Vcontrol , (b) Vcontrol(t) in half line
cycle
(b)
Fig. 9. Rectified input voltage and control voltage Vcontrol:
(a) 120Vrms low-line input, (b) 240Vrms high-line input.
Ch2: 100V/div, Ch3: 500mV/div
(a)
Efficiency
0.948
0.946
0.944
0.942
0.94
0.938
0.936
0.934
0.932
Vin,rms
0.93
90
(b)
Fig. 10. Rectified input voltage and input line current: (a) 120Vrms low-line
input, (b) 240Vrms high-line input
Ch2: 100V/div, Ch4: 0.5A/div
120
150
180
210
Fig. 11. Efficiency vs line input
240
270
frequency of 100KHz. For single-switch and two-switch
buck-boost converters, the output voltage is set to 325V,
while the boost dc output voltage is 450V. The peak voltseconds applied to the inductors for all two-switch buckboost converters has the smallest value of 0.812e-3(vs),
compared to 1.8e-3(vs) for all single-switch buck-boost
converters, and 1.125e-3(vs) for the boost converter.
As a result of low inductor conduction losses and low peak
volt-seconds applied, the BoIBB topology has the potential
for smaller inductor size compared to other buck-boost
topologies and the boost converter.
V. EXPERIMENTAL RESULTS
An experimental prototype (Fig. 7) has been built to verify
feasibility of the proposed converter. L1 and L2 are selected so
that the converter operates in CCM in both boost and buck
modes at full load. A single control voltage Vcontrol is used to
produce the switch control signals with the duty ratios d1 for
the switch Q1 and d2 for the switch Q2 as shown in Fig. 8(a).
The steady state value of Vcontrol as a function of time is
shown in Fig. 8(b). The control voltage is the input to a dual
PWM circuit that outputs drive signals for Q1 and Q2. The
experimental waveform of Vcontrol is shown in Fig. 9.
Average current control is applied to achieve PFC operation.
Experimental waveforms are shown in Fig 9. The output
power is 100W. In Fig. 10(a), the input line voltage has low
rms value 120Vrms and the converter operates in the boost
mode always. The efficiency is 93.8% and the total current
harmonic distortion is 1.9%. The waveforms of Fig. 10(b) are
for high input (240Vrms) and converter works in the boost
and buck mode in different parts of the line period. The
efficiency is 93.8% and the total current harmonic distortion
is 4.6%.
Fig. 11 shows the rectifier efficiency as a function of the
input line RMS voltage. Efficiency of over 93% is achieved
throughout the line voltage range (90Vrms-264Vrms).
VI. CONCLUSIONS
A new two-switch topology, named Boost Interleaved
Buck-Boost (BoIBB) converter, has been proposed for
universal-input PFC applications. The new converter has
advantages of low voltage stresses, low switch and inductor
conduction losses, potential for small inductor size, and the
ability to set the output dc voltage arbitrarily. Experimental
results are provided to verify the validity of the new
topology. High efficiency (over 93% throughout the whole ac
line voltage range), and low current harmonic distortion at
both high and low line inputs are demonstrated.
REFERENCES
[1]
[2]
[3]
[4]
[5]
[6]
R. Erickson, Fundamentals of Power Electronics, Kluwer 1997, ch17.
D.S.L. Simonetti, J.Sebastian, F.S.dos Reis and J.Uceda,"Design
criteria for SEPIC and CUK converters as power factor preregulators in
discontinuous conduction mode," IEEE IECON92, 1992, pp283-288.
R.Erickson, R.Madigan, and S.Singer," Design of a simple high power
factor rectifier based on the flyback converter," IEEE APEC90, 1990,
pp.792-801.
O. Lopez, L. Vicuna, M. Castilla, J. Matas and M. Lopez, "Slidingmode-control design of a high-power-factor buck-boost rectifier," IEEE
Trans. Indu. Elec., Vol. 46, No.3, June 1999, pp.604-612.
M.C.Ghanem, K. Al-Hassad, and G.Roy," A new control strategy to
achieve sinusoidal line in a cascade buck-boost converter," IEEE Trans.
Indu. Elec., Vol.43, pp. 441-449, May 1996.
D.Zhou, "Synthesis of PWM Dc-to-Dc Power Converters,” Ph.D.
thesis, California Institute of Technology, October 1995