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Int J Engg Techsci Vol 2(2) 2011,206-214
Design of Single-Phase DCM Integrated Buck-Flyback Converter
for High Power Factor
M.SubbaRao1 , Ch.Sai Babu2 , S.Satynarayana3 , S.L.V.Sravan Kumar4
1
M.subbarao ,Asst.Professor in Dept.of EEE,Vignan University, Vadlamudi,Guntur .
2.
Dr.Ch.SaiBabu,Professor in dept.of the EEE, college of Engineering,JNTU,Kakinada.
3.
Dr.S.Satyanarayana, principal, V.R.S.&Y.R.N.Engg. College,Chirala.
4.
S.L.V.Sravan Kumar is PG Student in Dept.of EEE,Vignan University,Vadlamudi.
Abstract:
This paper investigates the integrated buck-fly back converter as a good solution for
implementing low-cost high Power factor ac-dc converters with fast output voltage regulation. It
will be shown that, when both buck and fly back semi stages are operated in discontinuous
conduction mode(DCM), the voltage across the bulk capacitor, which is used to store energy at
low frequency, is independent of the output power. The offline operating modes of the IBFC are
also investigated to demonstrate that the control switch of the proposed converter handles lower
root mean square currents than those in similar integrated converters. In this paper voltage
mode control has been investigated to improve power factor. Finally, this paper presents a
design example and circuit analysis of a 90-250V input , 48V Output and 200W ac-dc converter
operating at 100kHz is presented .MATLAB/SIMULINK is used for implementation and
simulation results shows the performance improvement.
Keywords- Fast output regulation, integrated buck-fly back converter (IBFC), low cost, low current
stress, power factor correction, single-stage (SS) ac-dc converter.
I. INTRODUCTION
A single stage(SS) converter which can achieve high power factor correction and fast regulation
for power supplies. SS converters integrate an input current shaper (ICS) ac-dc converter with
second dc-dc conversion stage, and use a bulk capacitor between them to attain fast output
voltage regulation [1].
SS converter can operate either in continuous conduction mode or discontinuous conduction
mode to achieve high power factor, high efficiency and low stress. At light load the proposed
system is operated in discontinuous mode, while at heavy load the system is operated in the
continuous conduction mode. By using variable frequency control and PWM control in
discontinuous mode we can reduce the voltage stress high dc link voltage can be avoided
because the duty ratio can vary correspondingly at light load, i.e. in discontinuous mode the
output power, will depend on the duty cycle of the control switch. But the disadvantage in the
discontinuous operation is the higher rms current through the switches. In SS converters the rms
currents through the control switch is usually higher than the addition of the two rms currents of
the two stages. Also the voltage across the control switch is usually higher due to effect of the
integration process. Therefore these systems mostly suitable for low power offline Application
[3].
The main advantage in continuous mode conduction is it requires lower root mean square
currents through the power switches which yields higher efficiency. But the disadvantage in
continuous conduction mode is there is no relationship between the output power and the duty
cycle of the control switch, which results high capacitor voltage [2]. Up until now, two
topologies have been widely investigated as ICS, which are the boost and buck-boost based
converters. But less attention has been paid on the buck converters, especially for implementing
HPF off-line applications. The ICS Buck converter can be integrated with the fly back dc-dc
converter to obtain a very simple and well switched topology for this application. The major
advantage is that in this topology no centre-tapped transformer is Required, as not in the case of
Boost converter [ 5].
The main advantage of the IBFC that will be highlighted in this paper is that as opposed to other
SS integrated converters, the control switch handles a lower rms current, the current through the
control switch is either buck or the fly back inductor current, which ever higher, but not the
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addition of the two currents. The remaining current is handled by the diodes of the integrated
switch, which gives Lower losses due to their voltage-source equivalent behavior.
Hence, in this paper the IBFC for HPF offline applications is investigated [6]. The important
design characteristics such as bulk capacitor average voltage, bulk capacitor voltage ripple and
currents, and voltages in the switches will be obtained. A universal input(90–230V)48V-output
200W ac–dc converter operating at 100kHz will be designed to illustrate the application of the
derived characteristic and evaluate the possibilities of this converter. In the following, Section II
presents the offline operation of the IBFC. In Section III the analysis of the IBFC is expounded,
and the important design characteristics are derived. Section IV shows the design example of
proposed IBFC. Section V shows the closed loop feed back control scheme. Section VI shows
the matlab simulation of a 48V–200 W universal input converter and the Simulation results.
Finally, conclusions are provided in Section VII.
II.OFF-LINE OPERATION OF THE IBFC
The configuration of the IBFC when operated from an ac line is shown in Fig.1.As stated
previously, this converter has already been proposed for other power applications but has not
been analyzed and experimented for HPF dc power supplies[6].
Fig.1 HPF Integrated Buck-Flyback Converter
The equivalent circuits of the IBFC during a line-half period is shown in Fig.2. When the
instantaneous line voltage is lower than the bulk capacitor voltage, the rectifier bridges diodes
are reverse biased and no current flows through the buck inductance. Since line voltage is
greater than the bulk capacitor voltage diodes D1 and D3 are also open during time intervals.
The equivalent circuit shown in Fig. 2(a). In this mode only flyback converter is operating
through switch M1 and diodes D2 and D4.When the switch is on D4 is reverse bias, when the
switch is off D4 is forward bias. In this mode capacitor will gives energy to the load.Fig 2(b)
and (c) shows the equivalent circuits when the line voltage is higher than the bulk capacitor
voltage. In this mode the current starts build up in both buck and fly back inductances when the
control switch M1 is activated and also the current through the control switch is either buck and
fly back inductor current. In summary the current distribution as follows, when IB>IF current IB
will circulate through M1,D1 will handle the IB-IF, with D2 being off. When IB<IF the current IF
will circulate through M1,D2 will handle current IF-IB, with D1 being off. In this mode when the
switch is on D4 is off since reverse polarity of transformer and D3 is off since capacitor voltage
is greater than the line voltage. Fig 2(c) shows the equivalent circuit when the line voltage is
higher than the capacitor voltage and switch is open. During this interval, both buck and fly back
inductors are being de energized, and the energy is supplied to the bulk capacitor and load,
respectively. In this mode only diodes D3 and D4 will be conducting as long as energy is stored
III. ANALYSIS OF THE OFF-LINE IBFC
To derive the bulk capacitor voltage characteristic of the IBFC, Fig.4 illustrates the equivalent
circuit of the buck converter at a low frequency. The buck converter is loaded with the flyback
converter, which is represented by its equivalent resistance RF.
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Fig.2 Operating Modes Of IBFC
Resistance RB represents the equivalent resistance of the buck converter when operating in
DCM. It is well known that the values of these resistances are given as follows: [7], [8].
RB 
2L f
2LBfs
Bs
,
R

f
D2
D2
(1)
where fs is the switching frequency and D is the duty cycle with which the control switch M1 is
operated. In the circuit the instantaneous power consumed by the resistance RB and the voltage
source VB is transferred to the output section formed by the filter capacitor CB and equivalent
resistance of the flyback converter RF.
This power can be calculated as follows
vg  VB
T
p(t )  Vg 
t 1  t  - t1
(2)
R
2
B
p(t)
VB
V
T
Vg g

( sin 2 t  sint ) t1  t  - t1.
2
RB VB
iB 
(3)
where Vg is the peak line voltage, ω is the line angular frequency, and T is the line period. The
wave form of IB(t) has depicted in Fig 3. This expression can be normalized for the sake of
simplicity as:
ig (t)
iB_n(t)
Vg /RB

1
sin 2t - sint t 1  t  T - t 1 .
m
2
(4)
When m = VB/Vg is the ratio between the bulk capacitor voltage to the peak line voltage. It
must be noted that the current out of the time interval shown in (4) is equal to zero.
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To obtain the voltage VB, the average value of the current iB_ n(t) must be calculated. By
integrating (4) within a line period, the
following expression is obtained.
 
IB _n 
1
i
  
2

2
Bn
(t)d (t)

2
1
1
(1- sin-1m)- 1- m2
2m


(5)
Where it has been taken into account that the conduction angle θ can be calculated as follow
(see Fig 3)
  (  2 ) sin 1 ( m )
(6)
As can be understood from the circuit in Fig.4, the dc mean current IB will circulate through the
flyback equivalent resistance, thus giving a bulk capacitor voltage VB = IB/RF.
Then, the following equation must be solved to obtain the voltage VB:
V
- IBR
B
Which can be rearranged as follows:
m -
 
F
I B_n

 0
(7)
 0
(8)
L
R 
    
RF
LF
Using (5) in (8), the following expression is derived:
m-
1
2
1
(1 - sin -1m) 


2m
1 - m2  0
(9)
As can be noticed from (9), the voltage ratio m depends only On the inductance ratio α.
Equation(9)can easily be solved by Using numerical methods, and plotted as showninFig.6.
B. Bus voltage ripple
One more important parameter that must be Analyzed is the voltage ripple across the bulk
capacitor. In practical applications, this voltage ripple will effects the input current which results
increase its harmonic content.
The peak-to-peak voltage ripple across the bulk capacitor Can be calculated through the charge
injected into the capacitor (∆Q), as follows:

Q
1
VB 

iB (t )  I B d (t )

(10)
C B 2C B 0
This expression can be normalized, and rearranged in the following way:
VB
1
1 

  iBn (t) IB _ n d (t)
VB 2RBCB m 0
(11)
Now, the following ripple factor (ν) can be defined In order to simplify expressions:
v
VB
1 
2RBCB   iBn (t) IB_n d(t)
VB
m0
Which has been calculated and plotted as illustrated in fig7
VB
 v / 2 RB C B
VB
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(12)
(13)
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C. Output power
To complete the analysis , It is also necessary to calculate the required duty cycle for each
operating point. Neglecting losses in the converter, it can be assumed that the power delivered to
the load is equal to the input power of the fly back semi stage, which can be calculated as
follows:
V 2D 2
p0  B
(14)
2 LF f s
From (14) , the necessary duty cycle for each operating point is obtained.
1
D 
2 P0 L F f s
VB
(15)
The operation of the two inductors (buck and flyback) in DCM has been assumed, thus making
the bulk capacitor voltage independent of the load. The two semi stages (buck and flyback) will
operate with operate with the same duty cycle, therefore the maximum value will be the
following:
Fig.(5) Voltage Ratio m as a function
of Inductance Ratio α
Dmax  min{DBuckmax, DFlybackmax}
Fig.(6) Ripple Factor V as a function of the
voltage ratio m
(16)
where the maximum duty cycle for the buck and fly back semi stages can be calculated as
follows:
DBuckmax  m
DFlyback max
V0

nmv g  V0
(17)
(18)
Where n is the turn ratio of the fly back inductors.
Therefore, there is first maximum duty cycle given by the voltage ratio m, which is fixed by the
necessary conduction angle to assure a low current distortion. Then, the fly back turn ratio n
should be calculated to attain a maximum fly back duty cycle close to the voltage ratio m. This
will assure the shortest dead times in the fly back output current, thus decreasing peak currents,
improving efficiency, and reducing the necessary output filter capacitance.
IV.DESIGN EXAMPLE
A universal input (90-230Vrms), 48V output, 200W ac–dc converter operating at 100 kHz will
be designed to illustrate the application of the previous analysis. The conduction angle θ will be
designed to equal 120◦,which improves the input power factor. Therefore, the required value of
the voltage ratio for Conduction angle can be obtained from (6), as follows
 
m  sin
(19)
2
For the target conduction angle of 120◦,the necessary voltage Ratio obtained from(22) is m
=0.5.Besides, with the selected Voltage ratio, a maximum bulk capacitor voltage of
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VB_max=212V is obtained at250Vrms line voltage. Therefore ,a bulk capacitor with a rated
voltage of only 250V will be selected.
As expressed by (16)–(18),a maximum for the duty cycle is given by the voltage ratio m.
Therefore, the duty cycle should be maintained lower than 0.5 to achieve DCM operation. The
highest duty cycle is necessary at the lowest input voltage (90V) and full output power. Since
the voltage ratio is 0.5,the bulk capacitor voltage at the lowest line voltage will be VB_min =
63.63V.Therefore,based on(14), the flyback inductance can be Obtained as LF =50 µH. The fly
back turn ratio n is calculated based on (18). In this case, in order to have a maximum duty cycle
of 0.5 at the lowest line voltage, the necessary turn ratio is obtained as n =0.75.
Regarding the buck inductance, using the selected voltage ratio m =0.5 in Fig.5, a value of the
inductance ratio α =0.8 is obtained. Thus, the necessary buck inductance will be LB =40µH.
Finally, the design of the bulk capacitance is performed in this example based on the highest
voltage ripple allowed. From Fig.6,a ripple factor ν =2.3 is obtained for the selected voltage ratio
(m =0.5). The highest voltage ripple will rise At the lowest line voltage and full power. The
highest voltage ripple selected in this design is20% at 90Vand 200W.It should be noted that the
voltage ripple will be compensated by the closed-loop error amplifier ;thus a very low voltage
ripple is not necessary. Then, based on (13),a bulk capacitance CB =450 µF is obtained. Finally,
a standard value of 530µF is selected, thus giving a voltage ripple of around13%.
V.CONVERTER CONTROLLER
Fig. (7) control scheme
Fig(7) presents closed loop feedback control. In this control scheme the converter output
voltage is sensed and subtracted from an external reference voltage in an error amplifier. The
amplifier produces a Control voltage that is compare to a constant amplitude saw- tooth
waveform. The comparator produces a pwm signal that is fed to drivers of controllable switch’s
in the dc – dc converters The duty ratio of the pwm signal depends on the value of the control
voltage. The frequency of the pwm signal is the same as the frequency of the saw tooth
waveform. The control of the Switch duty ratio adjusts the voltage across the inductor and
hence the inductor current (which Feeds the output stage) and eventually brings the output
voltage to its reference value.
Fig (8) Simulink Model of IBFC
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Output Voltage(V)
Output Current(A) VI.SIMULATION AND RESULTS
Simulation studies were performed on proposed scheme using MATLAB simulation tools.
Fig(8) shows simulink model of IBFC. The output voltage and current and line current
waveforms are shown in Fig.(9), Fig(10)& Fig(11). The measured input power factor is around
0.92 is also shown in Fig (12). Fig (13) shows the bulk capacitor voltage. The dynamic behavior
of the proposed converter is shown Fig (14),15,16,17. Fig 14 shows the output voltage which
does not effect due to the step transient. Fig 15,16 shows the output current and input current
which are effected due to the step transient and load current changes from 8A to 4A for a line
voltage of 230V and output voltage of 48V. As can be seen , the error amplifier compensates
the output voltage very fast; no appreciable transient response is perceived in this voltage scale.
This converter is suitable for low-cost low power off-line applications.
Time(ms)
Fig(12) Bulk Capacitor Voltage
Time(ms)
Time(ms)
Time(ms)
input Current(A)
Out put Current(A)
Fig(11) Input Voltage(V) & Current(A)
Fig(10) Output Current(A)
Capacitor Voltage(V) Input Voltage(V) & Current(A) Fig(9) Output Voltge(V)
Fig(13) Output Current(A) with step change Time(ms) F Fig(14) Input Current(A) with step change
Time(ms)
Time(ms)
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VII.CONCLUSION
In this paper, the IBFC is proposed as a good solution to implement low-cost HPF ac-dc
converters with fast output regulation. The operation of both semi stages in DCM provides a
bulk capacitor voltage independent of the duty cycle and output power. The different operating
modes have been discussed showing that the control switch handles lower rms current than other
SS integrated topologies.
An input voltage of 230V and 48V output and 200w ac-dc converter operating at 100kHZ is
designed and simulation results proves that maximum amount of active power has been utilized
since power factor is 0.92. Due to high currents in this voltage mode control the efficiency of the
converter ranges from 40% to 50%. To improve the efficiency of the converter either switch
current or buck inductor current should be controlled and also choose the transformer
magnetizing resistance suitably.
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