Efficiency Improvement Research on Single-stage
Power Factor Correction
Xu Jun-Ming, Li Zhen-sen
Institute of Electronic Information,
Hang Zhou Dianzi University, Hang Zhou, China
lzs03068315@163.com
Abstract—Taking 50W fly-back single-stage PFC power supply
output rectifier loss, the loss of unreasonable control mode and
as a example, this paper researched the technologies of
the lines loss. These losses are the key factors to its efficiency.
synchronous
rectification,
transformer
optimizing,
clamp
circuits and fast soft turning off technology in order to improve
the power efficiency and reduce the power EMI. Experimental
test results show the efficiency can reach above 90% in wide
voltage range. With the addition of EMI filter, the power can
well meet international standards of conducted EMI
Keywords-
Single-stage
PFC;
Synchronous
rectifier;
high
A
MOSFET Loss Analysis and Designs
Common MOSFET process is shown in Figure 1a, the
losses are consisted of conduction loss PON, high-frequency
switching loss PSW and body diode loss PQrr. They are
expressed as (1), (2) and (3).
（1）
2
PON = IRMS
⋅ RDS( ON) ⋅ D⋅ KT
efficiency
I.
1
1
PSW ≈ U DS I PKp (t 7 − t6 ) + U DS I PKp (t8 − t7 )
2
2
INTRODUCTION
Single-stage PFC fly-back SMPS has the properties of
simple structure, small size, low cost and easy realization of
multi-channel output, so it is widely used[1]. Recently, the
higher demands with low cost, high efficiency, low
temperature rise, low EMI and high reliability
[2,3]
in LED
driver are required in order to accelerate Marketization of
LED’s universal lighting. However, at present, single-stage
PFC fly-back power supply have some disadvantages such as
low efficiency, low PF, high temperature rise, strong EMI and
larger mains frequency ripple, which result in low reliability
and is hard to apply EMC norms
PQrr = U DS ⋅ Qrr ⋅ f SW .
Where IRMS is operating current, RDS
（2）
（3）
(ON)
is on-state
resistance; D is duty cycle and KT is temperature coefficient.
Qrr is reverse recovery charges in body diode, UDS is the
voltage of Drain and Source and fSW is switching frequency.
It is cleared the MOSFET losses can be reduced with low
RON and Qrr from (1) and (3). Infineon Cool MOS,
IPB60R250CP which has low RON about 0.28Ω and Qrr only
4.5 μC is chosen in our designs.
[4,5]
. In this Paper,
single-stage PFC fly-back (24V / 2A) SMPS are theoretical
studied and optimization designed, results show the excellent
efficiency and EMC of this LED driver.
II.
THEORTICAL ANALYSIS AND DESIGNS OF
HIGH EFFICIENCY AND LOW EMI
Power losses in single-stage PFC fly-back SMPS [6,7]
Figure 1. MOSFET switching process (a: common; b: soft swithching )
include input rectifier loss, MOSFET switching loss, MOSFET
conduction loss, the clamp circuit loss, controller and
To reduce PSW, Soft-switching technology is used, which
test-driver loss, transformer loss, filter capacitors loss, the
can reduce the current overlay area with fast soft-turn off
978-1-4244-4813-5/10/$25.00 ©2010 IEEE
process like Figure 1b. High voltage porcelain capacitor 47pF
secondary windings UEWΦ0.42*5; the desired inductance by
is designed to parallel to MOSFET and a fast soft-shutdown
necessary air-gap. Moreover, assemblies are needed to meet
diodes is reverse parallel to MOSFET gate driver resistance.
safety requirements, maximize magnetic coupling and
It can greatly improve efficiency and EMC of the SMPS.
minimize parasitic high frequency effects. The final design of
B
our transformer is shown in Fig. 2. Transformer Constructions
Transformer Power Losses Analysis and Designs
Transformer of single stage PFC also has the function of
inductance. Its inductor current mode is different from PFC
and DC/DC Flyback power transformer. In order to achieve
for Margin Wound, Triple Insulated Transformer Types is
designed.
C
Filter Capacitors Loss Analysis and Designs
high transmission efficiency, the transformer needs to be
The Mains ripple current in single-stage PFC Flyback power
designed specially. The main losses of high-frequency
supply is larger and mainly absorbed by output filter capacitors.
transformer are core loss Pcore and windings loss Pwind. They
So a large output capacitance is required. As there is no
are expressed as (5), (6).
inductance between the Flyback switching power supply and
PCORE = PV ⋅ VC ⋅ f SW
（5）
the load, a large transient pulsating current will flow in and out
of the capacitors, which have parasitic ESR and ESL. When
current flow in and out of the capacitors [5,9], energy losses are
2
2
 Pwind = k ⋅ I RMSp ⋅ RDCp + k ⋅ I RMSs RDCs
（6）
PV is core power loss density that is unit volume core loss
inevitable. The loss of filter capacitor is as (8):
2
2
PC = PCin + PCo = I RMSCin
⋅ RESRCin + I RMSCo
⋅ RESRCo
(8)
under operating frequency and alternating magnetic flux; VC is
core volume; fSW is operating frequency of the core. k is
IRMSCin is current RMS of input filter capacitors; RESRCin is the
temperature coefficient of winding copper’s resistivity; IRMSp
equivalent series resistance of input filter capacitors. IRMSCo is
and IRMSs are current RMS of the primary and secondary
current RMS of the output filter capacitors and RESRCo is
windings; RDCp and RDCs are DC resistances of the primary and
equivalent series resistance of the output filter capacitors.
secondary windings.
To improve the PF of the single-stage PFC Flyback power
To reduce core loss, core with high saturation flux should
supply, input capacitors is usually with low capacitance less
be chosen. To reduce copper loss, skin effect and neighbor
than 1uF and low equivalent resistance. Due to high output
effect should be considered in windings. When the iron loss is
current 1~5A, the output capacitors with several thousands uF
equal to the copper loss, the loss of transformer is the smallest;
is required to reduce the amplitude of the mains ripple. Also
When losing balance, the transmission efficiency of the
low equivalent resistance and high-frequency characteristics
[6]
transformer will be reduced . so this ideal working condition
had better used. A method with many parallel small capacitors
should be carefully designed.
can reduce equivalent resistance and improve reliability.
Experiments use four parallel small capacitors as the output
rectifier filter.
D
Clamp Circuit Loss Analysis of Designs
RCD circuit has higher ability to improve efficiency and
depress EMI than TD circuit. The RCD clamp circuit stores
inductance energy leakage in the capacitor firstly, and then
Figure 2. Transformer Constructions
Our transformer design including: selecting core material
PC40 with geometry ETD29; the maximum peak magnetic
flux density 220mT; the primary windings UEWΦ0.42*2 and
discharges through the resistor. Part of the energy will be fed
to the input side to achieve re-uses of the energy [8,10].
Though calculation, R uses 72K/5W oxide film resistor, C
uses 4.7nF high-voltage tiles capacitor; D uses 800V ultrafast
recovery diode.
Synchronous Rectification for Flayback Single-stage PFC
Single-stage PFC efficiency and PFC Line Chart
Power efficiency and
PFC（%）
E
Synchronous rectification is usually used in low output
voltage and large output current to improve efficiency, reduce
EMI, improve reliability and lower switching frequency ripple
99
98
97
96
95
94
93
92
91
90
89
88
Power Efficiency
The PFC of Power
70
90
and output ripple amplitude due to extremely low on-resistance
[9,11]
.
Figure 4.
Synchronous rectifier technology was used in output
rectifier circuits. Self-start-up control chip IR1167 is used to
B
110
130
150 170 190
Voltage（V）
210
230
250
270
power efficiency and PFC
The Result and Analysis of the EMI
automatic detect low voltage of MOSFET Source and Drain in
the secondary low voltage parts with 50ns cut-off delays
directly. The resistance of MOSFET IRF7853 is about 20mΩ,
so the conduction resistance of rectifier circuits is lowered.
The loss of power is then about 0.08W. Addition the drive
Figure 5.
scanning interference spectrum distribution of the PCB
circuits and MOSFET parasitic diode losses, the total losses of
synchronous rectifier is about 0.5W.
Fig.5 is the interference spectrum distribution of the PCB
by the EMSCAN. It shows that the main interference
III.
A
EXPRIMENTAL RESULTS AND ANALYSIS
The Result and Analysis of the Efficiency and FFC
frequency section contains low frequency below 10MHz and
high frequency from 25MHz to 30MHz. From Fig.6, it’s clear
A single-stage PFC flyback 50W switching power supply
that in the range of 25MHz~30MHz the main interference
was designed in accordance with the above designs; the circuit
sources are the transformer’s primary side and MOSFET.
is shown in Fig.3. Its input voltage is AC 88 ~ 264V; Output
Below 10MHz, the main interference source is transformer’s
voltage is DC 24V and current is 2A.
secondary side. It can be coupled from the secondary side to
the primary side. To reduce EMI, a 0.22uF high frequency
filter capacitor is added to the secondary side and two 4.7nF
parallel capacitors are used as high and low voltage isolation
capacitors. The low frequency interference can be reduced by
the common-mode inductor filter. It also can be seen from
Fig.5 that the main interferences of high frequency are from
Figure 3.
Structure diagrams of synchronous rectifier circuits
The Fig.4 shows the efficiency of the single-stage PFC
clamp circuit, MOSFET and transformer’s primary side.
Bypass capacitors are added around the transformer according
to the performance of interference frequency.
flyback 50W switching power supply is above 90%. While the
Fig.7 is the EMI test results of power supply which have
input voltage increases, the efficiency becomes higher. When
added two-stage common-mode inductors. It shows that there
input voltage is lower and input current higher, the power
is sufficient margin according to international standards.
losses of input filter capacitors, current-measure resistor,
Fig.8 is an infrared thermal imaging of the power supply
transformer and MOSFET are higher, so the efficiency is
working for 2 hours at 28℃ in static air. It shows that the
reduced. The PF is about 95%~98% in the wide range voltage,
temperature rise of the primary MOSFET is low and heat sinks
so high PF and DC-DC is achieved in single-stage structure.
are reasonable. 27.3℃ transformer temperature rise shows
Also, the feedback loop is stable in wide voltage range and the
that the transformer is well-designed and has high transmission
output current remains basically unchanged. When load
efficiency. The highest temperature rise of the PCB board is
changes 50%，the current changes less than 2%.
about 50℃ in RCD clamp circuits but it is still reasonable.
paper. The efficiency can reach above 90%, which reduce the
temperature rise and the EMI of power supply.
Figure 9.
E
Figure 6.
The Output Result and Analysis of Single-stage PFC
power supply interference source’s distribution in the PCB
Figure 10.
Figure 7.
The Result and Analysis of Temperature Rise
Figure 8.
D
thermal image of the PCB in work condition (@28℃)
The Result and Analysis of Synchronous Rectification
Fig.9 is the waveform of the power supply with
synchronous rectification; the waveforms are primary (L6561)
and secondary (IR1167) PWM driving signals. It shows that
the circuit is working well. The secondary MOSFET turns on
with 50ns delay after the primary MOSFET turn off.
The output voltage signal diagram of the single-stage PFC
Flyback SMPS is shown in Fig.10. The voltage is about 24V.
The mains ripple is about 1V which is regular, and the
switching ripple is small with no burr that can meet LED
driver requirements.
IV.
CONCLUSION
In order to improve the efficiency of the single-stage PFC
Flyback power, Optimizing the transformer design, reducing
the loss of clamping circuit, using synchronous rectification
and fast soft turn-off technologies have been done in this
the output voltage waveform of the single-stage PFC
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C
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