19-4841; Rev 8/09 DS2726EVKIT+ 10-Cell Li-Ion Battery Protector Evaluation Kit www.maxim-ic.com CONNECTING THE DS2726 EVALUATION KIT BOARD Figure 1. CONNECTION DIAGRAM FOR DS2726EVKIT+ PACK+ BATT+ V10 V9 + V8 VCC CHARGER/ LOAD V7 DS2726 EV Board - V6 SLP V5 10 Cell Battery Pack V4 V3 V2 V1 VSS BATT- V0 V10 to V0 are voltage sense lines for the individual cells. For a 10-cell battery pack connect V10 to the positive terminal of the pack. V9 will be connected to the positive terminal of the next cell and so on down to the last cell. V0 connects to the negative terminal of the battery pack. These connections are for voltage sense and cell balancing only. The maximum amount of current they will sink is 200mA during cell balancing. The load current does not flow through these connections. For a connection diagram of a battery pack with less than 10 cells, see Figure 1. The BATT+ connection should be connected to the positive terminal of the battery pack. The path from PACK+ to BATT+ is your charge and discharge current path. High currents will flow through this path therefore a heavy gauge wire should be used. BATT- should be connected to the negative terminal of the battery pack. VSS is the return current path for the load. 1 of 5 DS2726EVKIT+ Figure 2. CELL CONNECTION DIAGRAM FOR LESS THAN 10 CELLS 9 Cell 8 Cell 7 Cell 6 Cell 5 Cell V10 = odd V10 = even V10 = odd V10 = even V10 = odd V10 V10 V10 V10 V10 V9 V9 V9 V9 V9 V8 V8 V8 V8 V8 V7 V7 V7 V7 V7 V6 V6 V6 V6 V6 V5 V5 V5 V5 V5 V4 V4 V4 V4 V4 V3 V3 V3 V3 V3 V2 V2 V2 V2 V2 V1 V1 V1 V1 V1 V0 V0 V0 V0 V0 CHARGER CONNECTION The positive terminal of the charge supply should be connected to the PAC+ terminal of the EV board. The negative terminal of the charge supply should be connected to the negative terminal of your battery pack. This is a high current path therefore a heavy gauge wire should be used. Also, SLEEP will need to be pulled to VCC when the charger is connected. The DS2726 does not regulate charge current. Current should be regulated by the charge supply. NOTE: The DC FET does not turn on below 2.8V per cell. When charging below 2.8V per cell the charge source should charge at a lower rate to prevent damaging the DC FET. Once the per-cell voltage exceeds 2.8V, the DC FET will enable and high current charge (fast charge) can begin. CONFIGURATION Overvoltage Threshold The overvoltage threshold is set at the OVS1 and OVS2 pins through resistors R17, R18, R32, and R33. R17 and R18 will pull OVS1 and OVS2 to VCC. R32 and R33 will pull OVS1 and OVS2 to VSS. VIM is achieved by floating the pin. Table 1 OVS0 OVS1 4.10 VIL VIL 4.15 VIM VIL Nominal VOV Threshold (V) 4.20 4.25 4.30 4.35 4.40 VIH VIL VIM VIH VIL VIL VIM VIM VIM VIH 4.45 VIM VIH 4.50 VIH VIH Cell Balancing Voltage Threshold The Cell Balancing Voltage Threshold is set at the CBS0 and CBS1 pins through resistors R15, R16, R30, and R31. R15 and R16 will pull CBS0 and CBS1 to VCC. R30 and R31 will pull CBS0 and CBS1 to VSS. VIM is achieved by floating the pin. 2 of 5 DS2726EVKIT+ Table 2 CBS0 CBS1 0.00 VIL VIL Cell Balancing Threshold Offset from VOV (V) 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 VIM VIH VIL VIM VIH VIL VIM VIH VIL VIL VIM VIM VIM VIH VIH VIH Cell balancing voltage: VOV - VCBTO = VCB Example: OVS0, OVS1, CBS0, and CBS1 = VIH 4.5V - 0.4V = 4.1V Cell balancing will begin when a cell’s voltage is greater than 4.1V and will terminate when all cells’ voltages are greater than 4.1V. Number of Cells The number of cells in the battery pack is set at the SEL0 and SEL1 pins through resistors R12, R13, R27, and R28. R12 and R13 will pull SEL0 and SEL1 to VCC. R27 and R28 will pull CBS0 and CBS1 to VSS. VIM is achieved by floating the pin. See Figure 2 for proper connections to stacks with fewer than 10 cells. Table 3 SEL0 SEL1 5 VIL VIL 6 VIM VIL Number of Series Connected Cells 7 8 9 10 10 10 VIH VIL VIM VIH VIL VIM VIL VIM VIM VIM VIH VIH 10 VIH VIH Discharge Overcurrent The RDOC pin is a 1μA current sink. The R34 resistor sets the discharge overcurrent voltage threshold. R34 x 1μA = VDOC The voltage seen at RDOC is sent to a comparator with the voltage seen at SNS. When VRDOC > VSNS the DC FET will turn off. The voltage drop from Bat+ to the SNS pin is determined by the RDS_ON resistance of the DC FET. See the FET section below for a description of RDS_ON and a link to the datasheet of the FET used the on EV board. Short Circuit Overcurrent The RSC pin is a 1μA current sink. The R35 resistor sets the short circuit voltage threshold. R35 x 1μA = VSC The voltage seen at RSC is sent to a comparator with the voltage seen at SNS. When VRSC > VSNS the DC FET will turn off. The voltage drop from Bat+ to the SNS pin is determined by the RDS_ON resistance of the DC FET. See the FET section for a description of RDS_ON and a reference to the data sheet of the FET used the on EV board. Discharge Overcurrent Delay The short circuit delay time is set using the capacitor C14 connected to the CDOCD pin. The short circuit delay time is defined by the equation: tDOCD = CDOCD x 32M Short Circuit Overcurrent Delay The short circuit delay time is set using the capacitor C15 connected to the CSCD pin. The short circuit delay time is defined by the equation: tSCD = CSCD x 500k FET The FETs used on the DS2726 EV board are Vishay SUM110P06-07L. Refer to the data sheet for details. The RDS_ON rating of this FET is typ 5.5m at VGS = -10V. The EV kit board has two FETs in parallel, therefore, the equivalent resistance is around 2.75m. Multiply RDS_ON times the desired DOC to get VDOC. Multiply RDS_ON times the desired SC current to get VSC. 3 of 5 1 1 1uF (short trace) C12 1uF C37 1K R11 6.2V D1 150 V4 SMAJ16CA-13-F V1 SMAJ60A-13-F 10K R19 C35 1uF R34 120K 104 R27 R28 R29 R30 R31 R32 R33 1K C13 C14 C15 102 102 8 7 6 5 4 3 C16 NP 2 1 GND R35 200K 150 R21 NP C17 CSCD SLP CDOCD SEL1 SEL0 VCC RDOC RSC D2 NP NP 1uF GND C18 C19 C36 R22 R23 150 150 SMAJ16CA-13-F 30 V2 SUM110P06-07L Q1 Q3 SUM110P06-07L NP NP NP C20 C21 C22 U1 DS2726 GND R26 15 V1 V2 V3 V4 V5 V6 V7 V8 C11 10uF C1 1uF GND C3 GND 1uF C2 GND 1uF C8 GND 1uF C7 GND 1uF C6 GND 1uF C5 GND 1uF C4 GND 1uF 1uF GND C10 1uF C9 C23 C0 1uF NP GND GND C24 NP C31 NP C30 NP C29 NP C28 NP C27 NP C26 NP C25 NP C33 NP C32 NP NP= Not Populated 17 18 19 20 21 22 23 24 GND SMAJ16CA-13-F V3 SUM110P06-07L Q2 Q4 SUM110P06-07L R24 R25 150 150 28 GND R12 R13 R14 R15 R16 R17 R18 1K 1K 1K 1K 1K 1K Not Populated C34 0.1uF (close to pins) Not Populated R20 Not Populated J1 VSS J2 SLEEP 1 Not Populated J3 VCC Not Populated 1 Not Populated 27 J4 PACK+ Not Populated 32 PKP CBCFG 9 31 CC CBS0 10 NC CBS1 11 29 SNS OVS0 12 DC OVS1 13 VIN NC 14 25 V9 V0 26 V10 GND 15 4 of 5 16 V5 SMAJ60A-13-F GND 1 L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 J5 BATT+ 2uH 2uH 2uH 2uH 2uH 2uH 2uH 2uH 2uH 2uH 2uH R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 7.5 R10 7.5 1 1 1 1 1 1 1 1 1 1 1 V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 V10 DS2726EVKIT+ DS2726EVKIT+ REVISION HISTORY REVISION DATE 8/09 DESCRIPTION Changed the ordering part number from DS2726K to DS2726EVKIT+. PAGES CHANGED All 5 of 5 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 2009 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products.