I X I 8 5 8 / I X I 8 5 9 R E G U L AT O R / G AT E D R I V E R - N E W P R O D U C T B R I E F N E W P R O D U C T B R I E F Pin Description Component Pin Layout IXI858/IXI859 Regulator/Gate Driver INTERFACE IC PROVIDING ANALOG FUNCTIONS FOR MICROCONTROLLER IMPLEMENTATION OF DIGITAL POWER SUPPLY FUNCTIONS / POWER FACTOR CORRECTION VCC 1 8 VCAP VOUT 2 7 VSUP 3 6 GND 4 5 GATE IXI858S1 IXI859S1 January 2006 IN Description 8-Lead SOIC The IXI858 and IXI859 Gate Driver/Regulator ICs are part of IXYS growing family of Interface products. These ICs are designed to provide the needed analog functions required by microcontrollers to implement offline digital power supply control, such as in Power Factor Correction (PFC). The IXI858/859 combine a gate drive, low voltage linear regulator and a charge pump function for drive voltage generation as needed in these applications. These features make the IXI858/859 invaluable for implementing microcontroller based PFC systems. The IXI858/859 can be used in combination with a Depletion-Mode Power MOSFET such as the IXTY02N50D, which can be used to create a constant current source to provide offline standby power at lower cost with lower high line power consumption. VCC VCAP 1 Vreg UVLO Q1 2 The growing trend of digital power management, with the use of standard microcontroller in motor control, power supply, and PFC circuits require the interface, voltage gain and drive of the IXI858/859 for digital power management. The IXI858 and 859 were optimized for cost efficiency to support high volume applications such as dimmable ballast, non-dimmable ballast and High Intensity Discharge (HID) lighting systems. The IXI858/859 are offered in a small 8-Lead SOIC surface mount package, with rated operation of -25°C to +125°C. VOUT 13V 4 IN 8 Vclamp Chrg Pump Reg 75k VSUP 7 • • • • • Logic Level Gate Drive Compatible 60mA Source / 120mA Sink Minimum Gate Drive 5.0V or 3.3V Voltage Regulator Charge Pump Regulator Stabilizes VCC Power Supply at 13V UVLO Protection R2 GND 6 Package 8-Pin SOIC 8-Pin SOIC 8-Pin SOIC 8-Pin SOIC 5 6 7 GATE GND VSUP 8 9 10 VCAP VCLAMP UVLO VCC VCAP 1 HVDCout Vreg 5 10uF UVLO Q1 2 220nF VOUT Chrg Pump Reg 13V 4 DC Supply 8 Vclamp C2 GATE 75k VSUP 7 R1 C1 GND 6 GATE 5 IXI858/IXI859 Fluorescent Ballast DALI Dimmable Fluorescent Ballast HID BLDC Drives AC Drives Alternative R2, C2 Operation Using Constant Current Source L1 HVDCin Package Quantity 100 (Tube) 2500 (Tape & Reel) 100 (Tube) 2500 (Tape & Reel) HVDCout Blocking Diodes C4 Depletion MOSFET Rccs Rbias Description 5.0V Version 5.0V Version 3.3V Version 3.3V Version N/C IN C4 SUMMARY TABLE Part Number IXI858S1 IXI858S1T/R IXI859S1 IXI859S1T/R 3 4 L1 IN • • • • • VOUT HVDCin µP Applications 2 Description Power input from a high voltage source through a current limiting resistor and filter cap. 13V output when charge pump is activate. Linear regulated output at 3.3V for the IXI859 or 5V for the IXI858 and is typically used in providing power to a micro-controller. Pin 3 is not used Used as a input signal to drive the output at pin 5, controlling power MOSFET in a typical power factor correction application. Output for driving external power MOSFET Ground return Charge pump switch input. Receives swicthing energy from RC and enables/disables charge pump output. Requires low ESR capacitor. Charge pump output to supply external power. Fixes or clamps the maximum VCC to 17 V. Bounds charge pump operation to a specific range for both circuit start-up and under-voltage lock out. Also disables regulated pin 2 (VOUT) output. Application Circuit Boost/Power Factor Correction C3 Features Name VCC Application Circuits Functional Block Diagram The IXI858 is designed to support 5.0V digital systems with an on board 5.0V linear regulator, while the IXI859 features a 3.3V linear regulator for lower voltage systems. In addition, both versions feature logic level input signal compatibility, 60mA source and 120mA sink gate drive output and a charge pump section meant to generate a 13V gate drive voltage. SOIC Pin 1 VCC VCAP 1 C Vzener Vreg µP 220nF Q1 VOUT 13V 4 IN 10uF UVLO 2 C3 75k Chrg Pump Reg VSUP 7 GND 6 GATE 5 IXI858/IXI859 DC Supply 8 Vclamp R1 C1 I X I 8 5 8 / I X I 8 5 9 R E G U L AT O R / G AT E D R I V E R - N E W P R O D U C T B R I E F N E W P R O D U C T B R I E F Pin Description Component Pin Layout IXI858/IXI859 Regulator/Gate Driver INTERFACE IC PROVIDING ANALOG FUNCTIONS FOR MICROCONTROLLER IMPLEMENTATION OF DIGITAL POWER SUPPLY FUNCTIONS / POWER FACTOR CORRECTION VCC 1 8 VCAP VOUT 2 7 VSUP 3 6 GND 4 5 GATE IXI858S1 IXI859S1 January 2006 IN Description 8-Lead SOIC The IXI858 and IXI859 Gate Driver/Regulator ICs are part of IXYS growing family of Interface products. These ICs are designed to provide the needed analog functions required by microcontrollers to implement offline digital power supply control, such as in Power Factor Correction (PFC). The IXI858/859 combine a gate drive, low voltage linear regulator and a charge pump function for drive voltage generation as needed in these applications. These features make the IXI858/859 invaluable for implementing microcontroller based PFC systems. The IXI858/859 can be used in combination with a Depletion-Mode Power MOSFET such as the IXTY02N50D, which can be used to create a constant current source to provide offline standby power at lower cost with lower high line power consumption. VCC VCAP 1 Vreg UVLO Q1 2 The growing trend of digital power management, with the use of standard microcontroller in motor control, power supply, and PFC circuits require the interface, voltage gain and drive of the IXI858/859 for digital power management. The IXI858 and 859 were optimized for cost efficiency to support high volume applications such as dimmable ballast, non-dimmable ballast and High Intensity Discharge (HID) lighting systems. The IXI858/859 are offered in a small 8-Lead SOIC surface mount package, with rated operation of -25°C to +125°C. VOUT 13V 4 IN 8 Vclamp Chrg Pump Reg 75k VSUP 7 • • • • • Logic Level Gate Drive Compatible 60mA Source / 120mA Sink Minimum Gate Drive 5.0V or 3.3V Voltage Regulator Charge Pump Regulator Stabilizes VCC Power Supply at 13V UVLO Protection R2 GND 6 Package 8-Pin SOIC 8-Pin SOIC 8-Pin SOIC 8-Pin SOIC 5 6 7 GATE GND VSUP 8 9 10 VCAP VCLAMP UVLO VCC VCAP 1 HVDCout Vreg 5 10uF UVLO Q1 2 220nF VOUT Chrg Pump Reg 13V 4 DC Supply 8 Vclamp C2 GATE 75k VSUP 7 R1 C1 GND 6 GATE 5 IXI858/IXI859 Fluorescent Ballast DALI Dimmable Fluorescent Ballast HID BLDC Drives AC Drives Alternative R2, C2 Operation Using Constant Current Source L1 HVDCin Package Quantity 100 (Tube) 2500 (Tape & Reel) 100 (Tube) 2500 (Tape & Reel) HVDCout Blocking Diodes C4 Depletion MOSFET Rccs Rbias Description 5.0V Version 5.0V Version 3.3V Version 3.3V Version N/C IN C4 SUMMARY TABLE Part Number IXI858S1 IXI858S1T/R IXI859S1 IXI859S1T/R 3 4 L1 IN • • • • • VOUT HVDCin µP Applications 2 Description Power input from a high voltage source through a current limiting resistor and filter cap. 13V output when charge pump is activate. Linear regulated output at 3.3V for the IXI859 or 5V for the IXI858 and is typically used in providing power to a micro-controller. Pin 3 is not used Used as a input signal to drive the output at pin 5, controlling power MOSFET in a typical power factor correction application. Output for driving external power MOSFET Ground return Charge pump switch input. Receives swicthing energy from RC and enables/disables charge pump output. Requires low ESR capacitor. Charge pump output to supply external power. Fixes or clamps the maximum VCC to 17 V. Bounds charge pump operation to a specific range for both circuit start-up and under-voltage lock out. Also disables regulated pin 2 (VOUT) output. Application Circuit Boost/Power Factor Correction C3 Features Name VCC Application Circuits Functional Block Diagram The IXI858 is designed to support 5.0V digital systems with an on board 5.0V linear regulator, while the IXI859 features a 3.3V linear regulator for lower voltage systems. In addition, both versions feature logic level input signal compatibility, 60mA source and 120mA sink gate drive output and a charge pump section meant to generate a 13V gate drive voltage. SOIC Pin 1 VCC VCAP 1 C Vzener Vreg µP 220nF Q1 VOUT 13V 4 IN 10uF UVLO 2 C3 75k Chrg Pump Reg VSUP 7 GND 6 GATE 5 IXI858/IXI859 DC Supply 8 Vclamp R1 C1