ISSN: 2319-5967
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International Journal of Engineering Science and Innovative Technology (IJESIT)
Volume 3, Issue 3, May 2014
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Abstract: In recent years the demand for electric power and its conservation have prompted the use of alternative energy sources, especially the renewable energy sources. The renewable energy sources like photovoltaic arrays and fuel cells produce output voltages at low level. In order for efficient use of low level voltage, it must be stepped up for the purpose of practical utilization or stepped up and inverted before connecting to grid. This paper proposes a three level
DC-DC Boost Converter for High Gain Applications suitable for such situations. The salient features of such converters are high voltage gain without using extreme duty ratio, use of few components and self DC-link balancing. In these converter topologies each device blocks only one voltage level. For the analysis purpose a dynamic model based on the commutation states of the converter for Continuous Current Mode (CCM) of operation has been developed. The performance of the converter has been analyzed with ±20% variation from the designed capacitor and inductor values.
The analysis of the simulation results shows satisfactory performance of the converter. Mat lab/simulink® has been used for computer simulation of the proposed converter.
Key words: Multilevel Boost Converter, Continuous Current Mode, Modeling, Design.
I. INTRODUCTION
Global energy consumption tends to grow continuously. To satisfy the demand for electric power against a background of the depletion of convectional, fossil resources the renewable energy sources are becoming more popular [1]-[2]. High gain DC –DC multilevel converters are the key part of renewable energy system. Some of the advantages of multilevel DC – Dc converter compared to traditional topologies are i) low harmonic distortion, ii) low voltage stress, iii) low EMI noise, iv)low switching frequency and v) high efficiency [3]-[5].
The low voltage obtained from the PV (photovoltaic) cell or arrays needs to be stepped up significantly in order to be practically either as a standalone application or stepped up and inverted for grid connection system. The conventionally used converters are cascade or interleaved boost converter to obtain the required high voltage gain [6]-[7]. Though the required high gain is achieved by cascading and interleaving, it results in high ripple current and relatively higher losses which restrict the operation at high efficiency and high gain. Further, these topologies resulted in incremental cost and complexity of the control circuit.
Transformers or coupled inductor were used in isolated topologies with required turn’s ratio to achieve the required voltage gain [8]-[11]. These topologies are bulky as they employ transformers. Transformer with high turns ratio is not preferred due to high leakage at the secondary which causes switching losses at the output. This type of converters suffers from limited switching frequency, increased transformer losses and increased voltage stress. Transformer less topologies were proposed in [12]-[13], where coupled inductor and switched capacitors were used to obtain the required high conversion ratio. These topologies use more components and complex magnetic elements to provide the required voltage gain. Therefore these converters are not widely used in power conversion.
The required high gain was achieved by employing voltage multiplier cells (VMC’s) and coupled inductors with
VMC’s were proposed in [14]-[16]. The switching stress was high, nearly close to half of the output voltage. To reduce the device stress switched inductor and switched capacitor based topologies were proposed in [17].
However, the efficiency was reduced with the use of switched inductor and switched capacitor. The idea of non isolated multilevel DC-DC power conversion is an attractive alternative solution to obtain the required high voltage gain and high power level [18]-[20]. The use of multilevel conversion requires only low voltage devices as each device blocks only one voltage level. This paper proposes a three level DC–DC converter topology, initially introduced in [21]. The three level boost converters combines the basic boost converter and the switched capacitor function to provide an output of three capacitors in series with the same voltage level and self balanced voltage. The main advantage of this converter is i) transformer less high conversion ratio, ii) single switched based design iii) continuous input current and modularity. The three level converters can be extended
339

ISSN: 2319-5967
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International Journal of Engineering Science and Innovative Technology (IJESIT)
Volume 3, Issue 3, May 2014 to higher levels simply by adding two diodes and two capacitors making it convenient for modular implementation. The detailed working principle, design and modeling of three level converter with analysis of its behavior with ±20% variation in the designed capacitor and inductor values are presented in the subsequent sections.
II. WORKING OF THE PROPOSED CONVERTER
The electrical diagram of three level boost converter is shown in Figure 1, Switch S, inductor L, diode D1 and capacitor C1 form the convectional boost converter stage with the output of the first stage being denoted by V c
.
The difference between the multilevel boost converter (MBC) and the convectional one is that in the MBC, the output is V c
times the capacitor in output DC link. When the switch is ON, the inductor is connected to the voltage source. If C2’s voltage is smaller than C1’s voltage, C1 charges C2 through the diode D2 and the switch. Simultaneously, if the voltage across C2+C4 is smaller than the voltage across C1+C3, C1 and C3 charge C2 and C4 through the diode D4 as shown in Figure 2. In the mean while the capacitor voltage across
C1+C3+C5 discharges in the load. Besides that, when the switch turns off, the diode D1 turns on because the inductor charges the capacitor C1 until the voltage on the capacitor C1 is equal to the summation voltage on the voltage source and the inductor voltage. After that, the diode D3 turns on so the voltage source, the inductor and capacitor C2 charging the capacitor C1+C3 through it. Besides that, when the voltage on the C1+C3 is equal to the summation voltage on the voltage source, the voltage on the inductor and the voltage on the capacitor C2, the diode D3 turns off and the diode D5 turns on so the voltage source, inductor and capacitors C2 and C4 will charging capacitors C5, C3, C1 until the voltage on it equal to the summation of the voltage on the voltage source, inductor and capacitors C2+C4 as shown in Figure 3.
Fig 1: The Electrical Diagram of Three Level Boost Converter
Fig 2: Working of the Converter When the Switch is ON
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Fig 3: Working of the Converter When the Switch is OFF
III. MODELING OF THE CONVERTER
In this section we will be presenting a reduced order nonlinear dynamic model for the proposed three level dc-dc boost converter. The equivalent circuits are obtained based on the commutation states of the converter. The steady state equations of the multilevel boost converter are very similar to the steady state equations of the conventional boost converter. The average output voltage equation of the conventional multilevel boost converter is multiplied by the number of levels of the multilevel boost converter. Figure 4(a) and Figure 4(b) depict respectively the equivalent circuits for three level boost converter when switch is ON and switch is OFF.
Fig 4(a): The Reduced Order Model When the Switch is closed
Fig 4(b): The Reduced Order Model When the Switch is Closed
By employing basic principle and setting C = C1 = C2 = C3 = C4 = C5, the equivalent capacitor becomes
C eq1
= + , C eq2
= C
1
, C eq3
= + , and in addition to this the voltage across each capacitor at the output will be considered as the output voltage divided by the number of capacitors at the DC
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International Journal of Engineering Science and Innovative Technology (IJESIT)
Volume 3, Issue 3, May 2014 link of the output i.e, . This assumption is supported by the voltage balancing feature of the three level converter. In terms of equation,
V
1
= V
2
= V
3
= (1)
From the equivalent circuit shown in Figure 4 and using equation (1), the dynamics for the inductor current and output voltage can be written as,
L i = E (2)
C eq1
V = - (3\ R) * V (3)
Equation (2) and (3) are valid only when the switch is closed. On the other hand, based on the equivalent circuit in figure 5 and using Equation (1), the dynamics of the system when switch is closed are given by,
L i = - (V\3) + E (4)
C eq2
V = i - (3\ R) * V (5)
Equation (2) to (5) can be written in compact form that is valid for both the commutation states of switch ON and switch OFF as,
L i = - (1 - u) (V\3) + E (6)
[C eq1
u + (1-u) C eq2
] V = (1-u) i - (3\ R) * V (7)
Average models are employed to represent average current and voltages. From Equation (6) and (7) , considering u av
as the average input, we can write,
L i = - (1 – u av
) (V\3) + E (8)
[C eq1
u av
+ (1-u av
) C eq2
] V = (1-u av
) i - (3\ R) * V (9)
Where the average input denoted by u av is actually the duty cycle of the switch. Let us consider C eq1
u av
+ (1-u av
)
C eq2
as c(t), the time varying parameter. Equation (8) and (9) now become,
L i = - (V\3) + (V\3) u av
+ E (10) c(t) V = i – i u av
- (3\ R) * V (11)
Employing the inductor current and output voltage as state variables, Equation (10) and (11) can be written in state space form as expressed below,
[i V]
I
= [i V]
I
+ [u av
] +
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ISSN: 2319-5967
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IV. DESIGN DETAILS
The transfer function of the conventional boost converter is:
V
(out)
= (12)
For the multilevel converter the transfer function can be calculated as:
V
(out)
= (13)
It is shown from Equations (12) and (13) that the MBC has a high conversion ratio without extreme duty cycle.
The difference between two equations is the number of levels of the multilevel boost converter. The inductor size is decided such that the change in inductor current is no more than 5% of the average inductor current.
Equations (14) and (15) give the value of the inductor to be selected in MBC to make the MBC work in continuous conduction mode (CCM). From Equation (15) it can be observed that the inductor size is smaller than the inductor size that is used in the conventional boost converter but the problem of this topology is that the current in the inductor is higher than the current in the conventional boost converter.
I l
= (14)
L
(opt)
= D T
(s)
(15)
Where V is the input voltage, D is the duty cycle , R is the output load, T(s) is the switching period and N is the number of levels of the multilevel converter. The design criterion for capacitors is that the ripple voltage across them should be less than 5%. Equation (16) gives the value of the capacitor to be used in the MBC. As shown from this equation, the capacitor size is same as the capacitor size of the conventional boost converter.
C
(opt)
= v
(out)
(16)
The required duty ratio and inductor current are found using Equations (17) and (18),
D = (17)
I
(l)
= i
(o)
(18)
The design specifications are as follows input voltage = 40V, output voltage = 300V, output power = 600W, output current = 2A, switching frequency = 25 kHz. From Equations (15), (16) and (17) the desired inductor value is 320 μH, capacitor value is 1600 μF and duty ratio is 0.6
V. SIMULATION RESULTS
The proposed converter with the designed values is simulated using Simulink. Figure 5 shows the simulation model. The output voltage waveform is shown in Figure 6(a) and output current waveforms is shown in Figure
6(b), which clearly indicate the expected output voltage of 300V and output current of 2A respectively. Figure
7 shows the voltage distribution across each of the output capacitors validating the multilevel operation of the converter.
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Fig 5: Simulation Model of Three Level Boost Converter
(a). Output Voltage Waveform
(b). Output Current Waveform
Figure 6(a), 6(b): Output Voltage and Output Current Waveforms
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(a). Input Voltage Waveform
(b). Voltage Amplification in First Level
(c). Voltage Amplification in Second Level
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(d). Voltage Amplification in Third Level
Fig 7(a), 7(b), 7(c), 7(d): Voltage Distribution across Each Stage
Performance analysis of three level boost converter was carried out with ±20% variations from the designed inductor and capacitor values keeping one parameter constant at a time. The variation in settling time, peak overshoot and steady state error for varied capacitor and inductor values were plotted. Table 1 shows the tabulation of different parameter with constant capacitor value of 1600μF and ±20% variations from the optimum designed value of inductor. Figure 8 shows the graphs for variation in peak overshoot, steady state error and settling time for the constant capacitor value. Table 2 shows the tabulation of different parameters with constant inductor value of 320μH and ±20% variations from the optimum designed value of the capacitor.
Figure 9 shows the graphs for variation in peak overshoot, steady state error and settling time for the constant inductor value.
Inductor Value in
(µH)
256
336
352
368
384
272
288
304
320
Steady State Error (E ss
) in
Volts
4.5
Over Shoot (M p
) in
Volts
250.6
4.5
4.5
4.5
4.5
251.1
251.6
252.1
252.5
4.5
4.5
4.5
4.5
252.5
253.2
253.6
253.6
Table 1: Variation of Parameter with Constant Capacitor Value
Settling Time in (t s
) Mille
Seconds
119.5
120
122
134
134.5
135.5
133.2
138
138
Capacitor Value in
(µF)
1280
1360
Steady State Error (E ss
) in
Volts
4.7
4.5
Over Shoot (M p
) in
Volts
250.2
250.8
Settling Time in (t s
) Mille
Seconds
100.3
106
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1440 4.85 251.45 111.3
1520
1680
1760
1840
1920
4.5
4.5
251.7
252.7
4.5
4.5
253
253.3
4.5 253.7
Table 2: Variation of Parameter with Constant Inductor Value
116.5
117.7
135
138.8
133.4
(a). Variation of Steady State Error for ±20% Variation in Optimum Designed Value of Inductor
(b). Variation of Peak overshoot for ±20% Variation in Optimum Designed Value of Inductor
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(c). Variation of settling time for ±20% Variation in Optimum Designed Value of Inductor
Fig 8(a), 8(b), 8(c): Variation of Steady State Error, Peak Overshoot and Settling Time For ±20% Variation in
Optimum Designed Value of Inductor
(a). Variation of Steady State Error for ±20% Variation in Optimum Designed Value of Capacitor
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(b). Variation of Peak overshoot for ±20% Variation in Optimum Designed Value of Capacitor
(c). Variation of settling time for ±20% Variation in Optimum Designed Value of Capacitor
Fig 9(a), 9(b), 9(c): Variation of Steady State Error, Peak Overshoot and Settling Time For ±20% Variation in
Optimum Designed Value of Capacitor
From Figure 8(a) it is inferred that the variation of inductance has no effect on the steady state error. The peak overshoot varies linearly with changes in inductor value can be observed from Figure 8(b). From Figure 9(c) it is seen that the variation of capacitance has a significant effect on the settling time of the converter waveform.
By varying the capacitance value to that lower than the designed value the settling time will be reduced at much higher rate.
VI. CONCLUSION
This paper proposes a three level DC-DC boost converter topology based on only one driven switch. It is proposed to be used as DC link in applications where several controlled voltage levels are needed with self balancing feature and it is based on the multilevel converter principle, where each device blocks only one voltage level. The proposed converter is designed, modeled and simulated. The converter was designed to supply a load at 300V at 600W with duty ratio of 0.6. The output waveforms obtained from simulations confirm the performance of the proposed converter. The main features of this topology are (i) transformer-less high gain;
(ii) single switch design; (iii) continuous input current; and (iv) modularity. Analysis for different values of
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REFERENCES
[1]
F. Blaabjerg, F. Iov, T. Kerekes, and R. Teodorescu, “Trends in power electronics and control of renewable energy systems”,
14th Int. Power Electronics and Motion Control Conf.
(EPE/PEMC) 1, K-1–K-19 (2010).
[2]
EPIA, “Global market outlook for photovoltaic’s until 2013”, Eur. Photovoltaic Industry Association 1, CD-ROM
(2010).
[3] Fan Zhang; Peng, F.Z.; Zhaoming Qian; "Study of the multilevel converters in DC-DC applications" Power Electronics
Specialists Conference, 2004. PESC 04. 2004 IEEE 35th Annual Volume 2, 20-25 June 2004 Page(s):1702 - 1706
Vol.2.
[4] Fang Zheng Peng; "A generalized multilevel inverter topology with self voltage balancing" Industry Applications, IEEE
Transactions on Volume 37, Issue 2, March-April 2001 Page(s):611 – 618.
[5] Jih-Sheng Lai; Fang Zheng Peng; "Multilevel converters-a new breed of power converters" Industry Applications, IEEE
Transactions on Volume 32, Issue 3, May-June 1996 Page(s):509 – 517.
[6] Shih-Ming Chen, Tsorng-Juu Liang, Lung-Sheng Yang, Jiann-Fuh Chen. “A Cascaded High Step-Up DC-DC
Converter with Single Switch for Micro source Applications”. IEEE Trans. Power Electron.. 2011; 26(4): 1146-1153.
[7] Ahmad Saudi Samosir, Taufiq, Abd Jaafar Shafie, Abdul Halim Mohd Yatim. “Simulation and Implementation of
Interleaved Boost DC-DC Converter for Fuel Cell Application”. International Journal of Power Electronics and Drive
Systems. 2011; 1(2): 168-174.
[8] Yi-Ping Hsieh, Jiann-Fuh Chen, Tsorng-Juu Liang, Lung-Sheng Yang. “Novel High Step-Up DC-DC Converter With
Coupled-Inductor and Switched-Capacitor Techniques. IEEE Trans. Ind. Electron”. 2012; 59(2): 998-1007.
[9] Shih-Ming Chen, Tsorng-Juu Liang, Lung-Sheng Yang, Jiann-Fuh Chen. “A Safety Enhanced, High Step-Up DC-DC
Converter for AC Photovoltaic Module Application”. IEEE Trans. Power Electron. 2012; 27(4): 1809-1817.
[10] S.K. Changchien, T.J Liang, J.F. Chen, L.S. Yang.” Step-up DC-DC converter by coupled inductor and voltage-lift technique”. IET Power Electron. 2010; 3(3): 369-378.
[11] Amir Mahmood Soomro, Xu lingyu, Shahnawaz Farhan Khahro, Liao Xiaozhong. “High Output Voltage Based
Multiphase Step-Up DC-DC Converter Topology with Voltage Doubler Rectifiers”. TELKOMNIKA Indonesian
Journal of Electrical Engineering. 2013; 11(2): 1063 1068.
[12] Yi-Ping Hsieh, Jiann-Fuh Chen, Tsorng-Juu Liang, Lung-Sheng Yang. “Novel High step up DC-DC Converter with
Coupled-Inductor and Switched-Capacitor Techniques for a Sustainable Energy System”. IEEE Trans. Power Electron.
2011; 26(12): 3481-3490.
[13] Ismail Esam H, Al-Saffar Mustafa A, Sabzali Ahmad J, Fardoun Abbas A. “High Voltage Gain Single-Switch
NonIsolated DC-DC Converter for Renewable Energy Applications”. International Conference on Sustainable Energy
Technologies (ICSET).2010:1-6.
[14] Marcos Prudente, Luciano L Pfitscher, Gustavo Emmendoerfer, Eduardo F Romaneli, and Roger Gules. “Voltage
Multiplier Cells Applied to Non Isolated DC-DC Converters”. IEEE Trans. Power Electron. 2008; 23(12): 871-887.
[15] Lung-Sheng Yang, Tsorng-Juu Liang, Hau-Cheng Lee, Jiann-Fuh Chen. “Novel High Step up DC-DC Converter with
Coupled-Inductor and Voltage Doubler Circuits”. IEEE Trans. Ind. Electron. 2011; 59(9): 4196-4206.
[16] Sharma Rakesh, Agarwal Vivek. “A High Gain DC-DC converter with voltage multiplier”. IJPEDS Vol. 3, No. 4,
December 2013: 365 – 373th Annual IEEE Energy Conversion Congress and Exposition (ECCE). Asia Downunder.
2013: 1310-1314.
[17] Boris Axlerod, Yefim Berkovich, Adrian Ioinovici. “Switched-Capacitor/Switched-Inductor Structures for Getting
Transformer less Hybrid DC-DC PWM Converters”. IEEE Trans. Circuits Systs.-I. 2008; 55(2): 687-696.
[18] Julio C Rosas-Caro, Juan M Ramírez, Pedro Martín García-Vite. “Novel DC-DC Multilevel Boost Converter”, Proc.
Power Electron. Specialists Conference (PESC). 2008: 2146-2151.
[19] J C Rosas-Caro, J M Ramirez, F Z Peng, AValderrabano. “A DC-DC multilevel boost converter”. IET Power Electron.
2010; 3(1): 129-137.
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[20] Miaosen Shen, Fang Zheng Peng, Leon M Tolbert. “Multilevel DC-DC Power Conversion System With Multiple DC
Source”. IEEE Trans. Power Electron. 2008; 23(1): 420-426.
[21] J C Rosas-Caro, J M Ramirez, F Z Peng, AValderrabano. “A DC-DC multilevel boost converter”. IET Power Electron.
2010;3(1):129-137.
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