Multilevel Buck DC-DC Converter for High Voltage
Application
Levy F. Costa, Samir A. Mussa and Ivo Barbi
Federal University of Santa Catarina - UFSC / Institute of Power Electronics - INEP
P.O. box: 5119 88040-470 Florianopolis, SC, BRAZIL
Email: levy@inep.ufsc.br, samir@inep.ufsc.br, ivobarbi@inep.ufsc.br
Abstract— This paper presents a nonisolated multilevel stepdown dc-dc converter suitable for high voltage application.
The main features of this topology are: low voltage across the
semiconductors; low switching losses and reduced volume of
output filter. This paper focuses on the five-level structure of the
proposed converter, in which the theoretical analysis is carried
out and discussed. The five-level proposed dc-dc converter has
four capacitors and their voltages should be balanced for its
correct operation. Therefore, a capacitor voltage balancing active
control is presented and analyzed in detail herein. In order
to demonstrate the performance of this converter, experimental
results for a prototype of the 700-V input voltage to 450-V output
voltage, 5-kW rated power and switching frequency of 20 kHz
are reported herein.
I. I NTRODUCTION
High voltage DC-DC converters have been widely applied
to dc distribution system (for interface between the dc transmission and distribution system or energy storage) [1] and dc
transmission of large offshore wind farm [2]- [8]. Nevertheless,
this kind of converter is still a challenge to power electronics,
due to the technological limitation of semiconductors available
in the market, mainly about its blocking voltage.
Currently, the most used semiconductors for high voltage
application are the IGCT (with breakdown voltage rated up
to 6.9kV) [9] and the high voltage IGBT (with maximum
blocking voltage rated up to 6.5kV) [10]. However, these
devices still have very high switching losses; thus, in practice,
the switching frequency is limited to about 1 kHz [10].
For high switching frequency operation (>10kHz), the most
attractive switches are the MOSFET and IGBT (up to 1200 V
blocking voltage class). On the other hand, these switches are
unattractive for high voltage and high power application.
Therefore, for high voltage and high frequency operation,
conventional dc-dc converters are not the better choice. Some
common solutions of dc-dc converters with high frequency
operation applied to high voltage have been described in
literature and they will be discussed here.
The first solution is based on isolated converter, with two
legs of a full-bridge converter connected in series in primary
side, as proposed in [11]. The voltage across the switches
is a half of input voltage. An extension of this topology is
presented in [12] and [13], where the author has used three
legs of a full-bridge converter connected in series in primary
side, associate to a three-phase high frequency transformer.
Although these converters present reduced voltage stress on
Fig. 1.
Generalized topology of multilevel Buck converter.
the switches, its application is limited to 10kV of input voltage,
since the voltage across the switches are always one third (or
one half) of input voltage and it can not be extended.
Another common solution is to employ low voltage converters with series input and parallel output connections, as
described in [14]. This converter has the feature of low voltage
across switches, modularity and it can be extended regardless
of the input voltage. On the other hand, the output voltage is
always very low, thus it is limited to application which requires
high input and low output voltage.
Series connection of semiconductor, as presents in [15][16], is also commonly found in literature. The main advantage of this technique is the modularity. The drawback
is the necessity of a complex balancing circuit, which takes
into consideration the static and dynamic characteristics of
semiconductor, as presents in [5].
Within this context, this paper presents a nonisolated multilevel Buck dc-dc converter for high voltage application. The
generalized topology of the proposed multilevel converter is
shown in Fig. 1. The main feature of this converter are:
reduced voltage across the switches and diodes, low switching
losses, reduced output filter volume and low voltage across the
inner capacitors. The most critical component of multilevel
dc-dc converter is the capacitors C1 and C2 , because they
are submited to high voltage (a half of input voltage). On
the other hand, most of high voltage converter also presents
this feature [11] - [13], [15]. According to the input voltage
value, series connection of capacitors may be necessary. For
to the duty-cycle value d, as described in Table I. The region
of operation defines the output voltage limits, as shown in
Table I.
TABLE I
O PERATION R EGION OF 5-L EVEL CONVERTER
Operation Region
R1
R2
R3
R4
Fig. 2.
Five-level Buck dc-dc Converter.
safety operation of proposed converter, the voltage across the
capacitor must be balancing. The unbalanced voltage across
the capacitors will make the switches voltages be higher than
the designed value. Thus, a capacitor voltage balancing active
control is required in this converter. This topic is addressed in
this work.
A Five-Level (5L) structure of proposed Buck converter,
as shown in Fig. 2, will be analyzed and discussed in this
paper. The theoretical analysis, capacitor voltage balancing
active control, as well as experimental results are shown in
this paper.
II. T HEORETICAL A NALYSIS
The theoretical analysis is performed considering the
steady-state operation in continuous-conduction-mode of the
5L-Buck converter. Therefore, the voltage over the semiconductors and the capacitors C3 and C4 is Vi /4, while the voltage
across the capacitors C1 and C2 is Vi /2, where Vi is the
input voltage. As cited before, the capacitors voltage must be
balanced for the correct operation of the proposed converter.
Therefore, the modulation strategy should enable the charge
and discharge of these capacitors, so that balancing voltage
control may be performed. In this section, the modulation
strategy and the four operation regions of 5L-Buck converter
are described. The main waveforms for each operation region
are shown and explained. The mathematical expression of
output-input voltage relationship (static gain) is derived, such
as the inductor current ripple and capacitor voltage ripple. The
current and voltage effort in the components of the proposed
converter is also presented.
A. Modulation Estrategy and Main Waveforms
The adopted modulation strategy is based on phase-shift
PWM, with four triangular carriers shifted off 90. Each carrier
is used to generate the gating signal of one switch. This
modulation technique allows the charge and discharge of each
capacitor, making possible the implementation of the active
control of capacitor voltage balancing. This control will be
discussed in section III. Using this modulation strategy, the
5L-Buck converter presents four operation regions, according
Duty-cycle
d < 1/4
1/4 < d < 1/2
1/2 < d < 3/4
3/4 < d < 1
Output voltage limits
0 − Vi /4
Vi /4 − Vi /2
Vi /2 − 3Vi /4
3Vi /4 − Vi
Fig. 3 shows the main waveforms for one switching period
Ts of the 5L-Buck converter to the four operations regions
described earlier. From Fig. 3 it is observed that the proposed
converter presents 16 switching states, hence they will be
omitted in this paper due to the space limitation. In Fig. 3,
vx is the voltage before the low-pass filter, thus the converter
output voltage vo is the average value of the voltage vx . Then,
the inductor voltage is vL (t) = vx (t) − vo (t).
The operation frequency of the voltage vx and, consequently, inductor current iL is four times the switching
frequency. Beyond that, the volt-second across the inductor
is minimized, due the reduced voltage across the inductor.
Therefore, a reduced inductor volume is expected for this
topology.
B. Static Gain
In order to obtain the output-input voltage relationship of
the 5L-Buck converter, the volt-second balance of the inductor
L for one fourth of the switching period is analyzed.
4
TS
to +
TS
4
vL (t) dt = 0
(1)
to
Considering that the converter is operating in region R1,
Fig.3(a), and using (1), the expression (2) is obtained.
1
Vi
− Vo DTs = Vo
− D Ts
(2)
4
4
Rearranging (2) is obtained the mathematical expression of
the static-gain as function of duty-cycle D, as shown in (3).
This equation shows that static-gain of 5L-Buck converter is
the same of the conventional two level Buck converter. It is
important to note that this analysis was realized considering
the converter operating in region R1. On the other hand, the
expression (3) is valid regardless of the operation region.
Vo
=D
Vi
(3)
C. Inductor Current Ripple
The current ripple in the inductor can be calculated during
the storage energy stage or transfer energy stage and using
expression (4). The time interval t1 has different values,
(a)
(b)
(c)
Fig. 3.
(d)
Main waveform of the 5L-Buck converter.
depending of the operation region, and it is obtained from
Fig. 3.
t1
1
vL (t)dt
(4)
ΔiL =
L
0
The inductor current ripple has different behavior, according
to the operation region. Thus, equation (4) must be used for
all operation regions of the 5L-Buck converter. By doing this,
it is obtained the current ripple equation for each operation
region, as shown in (5). In (5), fS is the switching frequency.
⎧
Vi
⎪
⎪
D < 14
(1 − 4D) D,
⎪
⎪
4f
⎪
SL
⎪
⎪
⎪
⎪
⎪
⎪
Vi (1 − 2D) (4D − 1) 1
⎪
⎪
⎪
, 4 ≤ D < 12
⎪
⎨ 4fS L
2
ΔiL =
(5)
⎪
⎪
(3
−
4D)
(2D
−
1)
V
⎪
i
1
3
⎪
, 2 ≤D< 4
⎪
⎪
⎪
2
⎪ 4fS L
⎪
⎪
⎪
⎪
⎪
Vi
⎪
⎪
⎩
(1 − D) (4D − 3) , 34 ≤ D < 1
4fS L
Fig. 4 shows the normalized current ripple of the inductor
Fig. 4. Normalized inductor current ripple of the 5L-Buck and convencional
Buck
for the 5L-Buck converter and the conventional Buck converter. The normalization is given by ΔiL = ΔiL 4fS L/Vi . As
expected, the inductor current presents reduced ripple. Comparing with conventional Buck converter, the current ripple
reduces 16 times for the 5L-Buck converter. Furthermore, the
inductor current has no ripple in some specific points of the
duty-cycle. These points are exactly the transitions between
the operation regions. For each operation region there is a
duty-cycle which implies in maximum current ripple of the
inductor. Thus, the inductance expression, presented in (6), is
derived considering the maximum current ripple.
L=
Vi
64 · fs · ΔiL
(6)
D. Capacitors Voltage Ripple
In this subsection, the voltage ripple on the capacitors C1 ,
C2 , C3 and C4 is analyzed. The voltage ripple on the capacitor
Co is not calculated, since it may be made using the low-pass
filter equations.
The voltage ripple on the capacitor can be calculated during
the storage energy stage or transfer energy stage and using (7).
Some parameters are required in (7), as the charge or discharge
time interval Δtc and instantaneous capacitor current ic (t).
They are not shown in Fig. 3, but they will be exposed in the
text.
Δtc
1
iC (t)dt
(7)
ΔvC =
C
0
For capacitor C1 and C2 , the charge time interval is given
by Δtc = DTs , for D < 1/2, and Δtc = (1 − D)Ts for D >
1/2. The charge current of these capacitors are iC (t) = IL /2,
indepently of the duty-cycle. Substituting these values in (7),
the voltage ripple of the capacitors C1 and C2 is obtained, as
shown in (8).
⎧
IL
⎪
D, D < 12
⎪
⎪
⎨ 2fS C1,2
ΔvC1,2 =
(8)
⎪
⎪
IL
⎪
1
⎩
(1 − D) , D > 2
2fS C1,2
Likewise, for capacitor C3 and C4 , the charge time interval
is given by Δtc = DTs for D < 1/4; Δtc = Ts /4 for 1/4 <
D < 3/4; and Δtc = (1 − D)Ts for D > 3/4. The charge
current of these capacitors are iC (t) = IL , independently of
the duty-cycle. Substituting these values in (7), the voltage
ripple of the capacitors C1 and C2 is obtained, as shown in
(9).
⎧
IL
⎪
D, D < 12
⎪
⎪
⎪
f
C
S
3,4
⎪
⎪
⎪
⎪
⎪
⎨
IL
, 1 < D < 34
(9)
ΔvC3,4 =
⎪ 4fS C3,4 4
⎪
⎪
⎪
⎪
⎪
⎪
⎪
IL
⎪
⎩
(1 − D) , 34 < D < 1
fS C3,4
Fig. 5 shows the normalized voltage ripple of the capacitors,
as function of duty-cycle. It is observed that the maximum
voltage ripple occurs for D = 0.5, for all capacitors. Thus,
the capacitance expression, presented in (10), is derived considering the maximum voltage ripple.
C=
IL
4 · fS · ΔC
(10)
Fig. 5.
Normalized voltage ripple of the capacitors.
E. Current and Voltage Components Effort
All switches of the 5L-Buck converter are submitted to the
same current and voltage efforts, as well as the diodes and
capacitors (C1 , C2 and C3 , C4 ). In Fig. 6, equations to determine the average and rms values of the current stresses and
maximum voltage on the power semiconductor and capacitors
are specified.
III. C APACITORS VOLTAGE BALANCING C ONTROL
As cited before, the capacitors voltage must be balanced
for the correct operation of the proposed converter. For some
reasons, the capacitors voltage can change (e.g., during the
start of the converter, input-voltage variations or slight difference between the drive signals of the switches). As a result,
the voltage on switches can increase to an unsafe value,
thus, a balancing strategy is necessary. In addition, in the
dynamic states, the balancing process is very important [17].
The balancing voltage can be achieved by natural balancing,
balancing current flows from additional passive RLC circuit
(Rb, Lb, Cb balancing circuit) [17] or by active control. In
this paper, just the balancing voltage active control is discussed
and analyzed, since this method is very effective. The active
control of balancing voltage is explained in [18] for a threelevel flying capacitor converter and this control technique was
also used in [19]. On the other hand, detailed analysis was not
exposed in [18] and [19].
In this section, the balancing voltage active control is
extended to 5L-Buck converter and analyzed in detail. This
is performed considering the R2 operation region. However,
this analysis can be made considering any operation region;
the final results are the same.
The control analysis consists in to verify the relationship
between the individual duty-cycle variation and the capacitors
current. Fig. 7 shows the carries signals, modulator signal, all
gating signals and capacitors current. From this figure, it is
observed that perturbing the duty-cycle of the switch S1 (with
a value of Δd1 ), the current of the capacitors C1 , C2 and C3
are affected. Consequently, the voltages of these capacitors are
also affected. Likewise, perturbing the duty-cycle of switch S2
(with a value of Δd2 ), just the current of the capacitor C3 is
affected. Perturbing the duty-cycle of the switch S3 (with a
Fig. 6.
Current and voltage stress on the power components of the 5L-Buck converter.
value of Δd3 ), the current of the capacitors C1 , C2 and C4 are
affected. Perturbing the duty-cycle of the switch S4 (with a
value of Δd4 ), just the current of the capacitor C4 is affected.
Therefore, from this brief analysis, it is concluded that is
possible to perform the voltage control of the capacitors C3
and C4 by perturbation in the duty-cycle of the switches S2
and S4 , respectively. In other words, VC3 and VC4 can be
controlled by Δd2 and Δd4 , respectively.
Considering the input voltage constant, the voltage across
the capacitors C1 and C2 can not be controlled simultaneously,
since Vi = VC1 + VC2 . Thus, only the voltage across the
capacitor C1 should be controlled. The adopted parameter
to control the capacitor C1 voltage is Δd1 . In this case,
there are two possibilities to operate Δd2 . The first one is
Δd2 = 0, consequently the capacitor C4 voltage control will
depend only of Δd4 . The second one is Δd2 = −Δd1 ,
consequently the capacitors C1 and C2 voltage control will
presents better performance. The second possibility is chosen
in this paper. Equation (11) presents the effective duty-cycle
of the switches and Fig. 8 show the block diagram of the
modulator, considering the effective duty-cycle.
⎧
D1 = d + Δd1
⎪
⎪
⎨
D2 = d + Δd2
(11)
D3 = d − Δd1
⎪
⎪
⎩
D4 = d + Δd4
It is important to note that d is responsible for the output
voltage and/or current and Δdk is responsible for the capacitor
voltage balancing control.
Fig. 7.
Block diagram of the capacitor voltage control system.
iC1 (t)Ts = −IL Δd1 (t)Ts
iC3 (t)Ts = IL Δd1 (t)Ts − IL Δd2 (t)Ts
(14)
iC4 (t)Ts = −IL Δd1 (t)Ts − IL Δd4 (t)Ts
(15)
Substituting (13), (14) and (15), in (12), and then perturbing
and linearizing, it is obtained the following equations:
A. Small Signal Modeling
The small-signal analysis is realized in order to obtain the
transfer functions necessary to control the capacitors voltage.
The modeling technique used is based on instantaneous average value [20].
The one-period average of a generic capacitor current is
given by (12). The one-period average of the capacitors C1 ,
C3 and C4 current, obtained from Fig. 7, is shown in (13),
(14) and (15).
iC (t)Ts = C
dvC (t)Ts
dt
(12)
(13)
C1
dv̂C1
= −IL Δdˆ1
dt
(16)
dv̂C3
= −IL Δdˆ1 − IL Δdˆ2
(17)
dt
dv̂C4
= IL Δdˆ1 − IL Δdˆ4
(18)
C4
dt
Applying the Laplace transform in (16), (17) and (18), the
required transfer functions are obtained, as shown in (19), (20)
and (21).
−IL
Δd1 (s)
(19)
vC1 (s) =
sC1
C3
Fig. 8.
Block diagram of the modulator.
vC3 (s) =
IL
IL
Δd1 (s) −
Δd3 (s)
sC3
sC3
(20)
vC4 (s) =
−IL
IL
Δd1 (s) −
Δd4 (s)
sC4
sC4
(21)
−IL
sC1
Gc3 (s) =
⎤ ⎡
Gc1 (s)
vc1 (s)
⎣ vc3 (s) ⎦ = ⎣ −Gc3 (s)
vc4 (s)
Gc4 (s)
⎡
−IL
sC3
0
Gc3 (s)
0
Gc4 (s) =
−IL
sC4
Block diagram of the capacitor voltage control system.
IV. E XPERIMENTAL R ESULTS
As expected, Δd1 has influence in the voltages vC3 and
vC4 , and it is quantified by the expressions (20) and (21).
Therefore, the system model presents cross-coupled voltage
loops.
Considering the expression (22), the transfer function system can be rewrite in a matrix form, as shown in (23).
Gc1 (s) =
Fig. 9.
(22)
⎤⎡
⎤
Δd1 (s)
0
⎦ ⎣ Δd2 (s) ⎦
0
Gc4 (s)
Δd4 (s)
(23)
B. Capacitor Voltage Active Control
The capacitor voltage balancing active control is based on
classical control, wherein the capacitors voltages are measured
and then compared with the reference signal, resulting in the
error signal. The error signal passes through the controller and
the duty-cycle perturbation is generated. In order to avoid the
action of Δd1 in vC3 and vC4 , a simple decoupling circuit is
incorporated to the control.
Fig. 9 illustrates the small-signal block diagram of the
converter, including the control structure. The converter model
and the three voltages controllers can be distinguished. The
coupling between the capacitors voltages loops and the decoupling action added to the control is observed in this figure.
Owing to the integrator characteristic of the system transfer
function, a proportional controller can be used, and the system
still will presents low error in steady-state. Beyond that, the
implementation is simplified.
The transfer functions (23) are first-order functions, wherein
the gain depends on the steady-state value of IL . To avoid the
use of a complex adaptive controller, a P-type controller with
constant gain is used. The controller is design for nominal
output current, so for light load, the closed loop system
will present slowly dynamic response. On the other hand,
regardless the output current, the system is stable.
In order to verify the operation and evaluate the performance
of the proposed 5L-Buck converter, a 5-kW prototype was
design and the proposed topology was experimentally verified.
The converter specifications are shown in Table II. Due the
relation of the input-output voltage, the converter operates
in the region R3. The prototype design was performed using
the equations presented previously in this paper. The selected
components are shown in Table III. A 600V-IGBT was used
as the main switch. The diodes used were the intrinsic diodes
of the IGBT.
The capacitor voltage balancing control was implemented
digitally through a Texas Instruments TMS320F28335 floating
point DSP (32-bit CPU, 150MHz). The experimental results
consist of relevant voltage and current waveforms for steadystate and dynamic operation of the converter.
TABLE II
5L-B UCK CONVERTER SPECIFICATION
Specification
Value
Output Power
5-kW
Input Voltage
700-V
Output Voltage
450-V
Swicthing frequency
20-kHz
Inductor current ripple
< 2.6 A
TABLE III
P ROTOTYPE C OMPONENTS .
Parameters
Value
Output inductor
468μH
Capacitors C1 to C4
40μF /1.3kV - Film
Capacitor Co
40μF /1.3kV - Film
Semiconductors
600V-IGBT IRGP50PB60PD
A. Steady-State Operation Waveforms
The steady-state waveforms are shown in Figs. 10(a) to
10(d). Fig. 10(a) shows the filtered output voltage, the output
voltage before the filter, the inductor current and the voltage
across the switch S1 . It is observed that the low-pass output
(a)
(b)
(c)
(d)
(e)
(f)
Fig. 10. Experimental results: (a) Output voltage, voltage before the filter, inductor current and drain-to-source voltage of switch S1 ; (b) Capacitor C1
voltage, voltage and current of the swicth S1 ; (c) Voltage and currente of the diode D1 ; (d) Capacitors voltages in steady-state; (e) Capacitors voltages when
submitted to a unbalancing condiction and (f) Start up of the capacitors C3 and C4 .
filter operates at frequency four times higher than switching
frequency. Moreover, low current ripple is observed.
Fig. 10(b) shows the capacitor C1 voltage (i.e. Vi /2), the
voltage and current of the switch S1 . Likewise, Fig. 10(c)
shows the voltage and current of the diode D1 . The voltage
across the semiconductors is clamped with maximum value
of 175V (Vi /4). The current waveform is according to the
theoretical waveform, shown in Fig. 3.
Fig. 10(d) shows the voltage across the capacitors. These
voltages are balanced in its correct values.
B. Transient Operation Waveforms
The dynamic tests were performed with input voltage of
400-V, since the converter was forced to work in unbalancing
condition. In this way, the voltage across some semiconductors
was higher than the designed value.
Fig. 10(e) shows the capacitors voltage when they are
subject to an unbalanced condition and, at a specific time,
the voltage balancing control start to act. With action of the
voltage balancing control, the capacitors voltages are stabilized
in their correct values and then the converter starts to operate
with balancing condition.
Likewise, in Fig. 10(f) is shown the start up of the capacitors
C3 and C4 . In this case, the converter operates with capacitors
C3 and C4 discharged, and then they starts to be charged,
until to reach its nominal value. These results demonstrate the
voltage balancing control effectiveness.
V. C ONCLUSION
A nonisolated multilevel Buck converter with high input
voltage was proposed and a five-level structure was analyzed
in detail in this paper. This converter presents as advantage the
absence of a transformer, a reduced number of components,
a reduced volume of output filter and low voltage across the
semiconductors.
A capacitor voltage balancing active control was presented
and analyzed in detail. From this analysis, it is concluded the
there is a interaction between the voltage loops. To avoid this
interaction, a decoupling circuit was presented. Moreover, it
was demonstrated that it is possible to use a simple proportional controller to control the capacitors voltage, due to the
integrator characteristic of the system transfer function.
Experimental results, obtained from a 5-kW prototype,
validated the exposed theoretical analysis and demonstrated
the effectiveness of the voltage balancing control.
ACKNOWLEDGMENT
The authors would like to thank Mr. Antonio L. S. Pacheco
for having built the prototype. The authors also express their
gratitude to the Brazilian Coordination for the Improvement
of Higher Level Personnel (CAPES) for the financial support
given in this research.
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