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Microfabricated V-Groove Power Inductors Using
Multilayer Co–Zr–O Thin Films for
Very-High-Frequency DC–DC Converters
Di Yao, Member, IEEE, Christopher G. Levey, Member, IEEE, Rui Tian,
and Charles R. Sullivan, Senior Member, IEEE
Abstract—V-groove microinductors are designed, fabricated,
and tested for operation above 10 MHz. Multilayer nanogranular
Co–Zr–O/ZrO2 magnetic thin films are used as the core material of
these inductors, to improve the magnetic performance of the films
deposited on the sidewalls of V-grooves and to control eddy-current
loss in the core. Prototype V-groove inductors are fabricated in a
Si substrate based on optimization results for 7 to 3.3-V, 1-A dc–dc
buck converters. The inductors exhibit an inductance of 3.4 nH
from 10 to 100 MHz, a dc resistance of 3.83 mΩ, and a quality
factor of up to at least 50. The prototype inductors are a promising
candidate for high-power-density high-efficiency dc–dc converters.
The measured inductor performance indicates that they could be
used to make a 7 to 3.3-V, 1-A converter exhibiting a power density
of 2.5 W/mm2 and an efficiency of 86% at 100 MHz; or a power
density of 0.36 W/mm2 and an efficiency of 91% at 11 MHz.
Index Terms—High-frequency dc–dc converter, inductors, microfabricated inductor, thin films, V-groove, very-high-frequency
(VHF) power conversion.
I. INTRODUCTION
OST efficient power conversion circuits are switching
circuits, and most switching circuits require magnetic
components (inductors and transformers). In switching power
conversion circuits, the fundamental function of the magnetic
components is to periodically store and release energy to achieve
smooth output [1]. These energy-storage components generally
occupy more space and dissipate more heat than other components in the circuits. In most designs, inductors and transformers
are the largest components in the circuits, and are external components, whereas other components are more easily and more
often integrated [2]–[5]. Increasing the switching frequency can
decrease the energy storage requirement per switching period
for the same amount of power, enabling the use of smaller magnetic devices. This fundamental principle has driven past and
M
Manuscript received June 10, 2012; revised September 30, 2012; accepted
November 7, 2012. Date of current version February 15, 2013. This work was
supported by Draper Laboratories and the Interconnect Focus Center, one of
the six research centers funded under the Focus Center Research Program, a
Semiconductor Research Corporation program. Recommended for publication
by Associate Editor C. O’Mathuna.
The authors are with the Thayer School of Engineering at Dartmouth,
Hanover, NH 03755 USA (e-mail: ncdigua@gmail.com; christopher.levey@
dartmouth.edu; Rui.Tian@dartmouth.edu; charles.r.sullivan@dartmouth.edu).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2012.2233760
Fig. 1.
Schematic of a V-groove inductor [46].
continuing advances in the miniaturization of power electronics [5], [6].
In recent research, converters have been developed to operate
at switching frequencies above 10 MHz [7]– [14], and up to hundreds of megahertz [15], [16], to advance the level of miniaturization of passive components. Typically, when such converters
are implemented with on-chip magnetics, they demonstrate low
efficiencies (less than 80%), compared to those using off-chip
air-core inductors [2]. To improve the efficiency of monolithic
integrated converters, improvements in integrated magnetics are
required, and microfabricated magnetic devices using low-loss
magnetic material are believed to be a promising choice [1]– [5],
[17]–[29].
Nanogranular thin-film magnetic materials, with nanosize
magnetic metallic particles surrounded by dielectric materials, exhibit high resistivity as well as good magnetic properties
(high saturation flux density, low hysteresis, and good highfrequency performance), and have become a competitive option
for applications above 10 MHz [30]–[36]. Prototype microfabricated magnetic inductors have been designed and fabricated
using nanogranular thin-film magnetic materials to achieve high
power density, low eddy-current loss, and low hysteresis loss
[37]–[45].
V-groove inductors are microinductors fabricated on silicon
substrates for the realization of monolithic integration of power
conversion circuits [35], [40]–[44], [46], [47]. V-groove inductors, as shown in Fig. 1, consist of a triangular conductor embedded in silicon substrate with magnetic material wrapped around
it [42]. The inductors feature conductors that have a large crosssectional area in order to provide low dc resistance, and use a
low-permeability magnetic material to distribute ac current approximately uniformly around the perimeter of the conductor to
provide low ac resistance as well. Because of these features, they
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YAO et al.: MICROFABRICATED V-GROOVE POWER INDUCTORS
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are promising for high-current applications. Prototype V-groove
inductors were developed and tested in a 3.3-V to 1.1-V, 8-A,
5-MHz dc–dc converter [42]. These inductors used nanogranular
Co–Zr–O thin films [32]–[34], [36] which have high saturation
flux density (1.2 T) and competitively low core loss density at
frequencies above 1 MHz [3], [35].
However, the performance of our initial V-groove inductors
was not fully satisfactory—high-frequency losses were larger
than expected or desired and permeability, and thus inductance,
were lower than expected. Both effects have been explained
by the growth of a columnar structure in the magnetic material, resulting from the oblique-angle sidewall deposition [48].
In addition, eddy-current losses in the magnetic core increase
quickly with frequency, leading to reduced inductor efficiency at
high frequencies. To design V-groove inductors with good performance operating in the frequency range above 10 MHz, laminated cores can be used to both eliminate the columnar structure [48] and reduce eddy-current losses significantly. In this
paper, we report on V-groove inductors fabricated using multilayer Co–Zr–O thin films for applications above 10 MHz [47].
TABLE I
CONVERTER SPECIFICATIONS AND MATERIAL PROPERTIES USED IN DESIGN
II. INDUCTOR DESIGN
be, consider a V-groove inductor with a length of 1 mm, and with
other geometry and material property parameter values listed in
Table I. At 10 MHz, the eddy-current loss predicted by using the
model developed in [50] is about 1.5% higher than that predicted
by using the traditional loss model [51], which does not consider
the displacement current effect. At 100 MHz, however, the loss
predicted by using the new model is 149% higher; at 300 MHz,
it is 13 times higher. Applying the traditional model could lead
to a large underestimate of the eddy-current loss in our designs,
so the model developed in [50] is used to achieve an accurate
loss estimate.
An optimization routine designs the V-groove inductors to
maximize the performance of a 7 to 3.3-V, 1-A buck converter
with respect to both power density and efficiency. The parameters in Table I are fixed, and the the optimization chooses the
switching frequency, the length and width of the inductors and
the width of the MOSFETs to maximize the power density at
any given efficiency. The conductor size simply fills the available space given the width of the V-groove, as shown in Fig. 1,
and the ac and dc resistance are calculated from its dimensions.
The design calculations used in the optimization proceed as
follows. The choice of operating frequency and ripple current
of the converter determines the inductance requirement, and the
dimensions of the V-groove inductor can be calculated using
peak flux density in the magnetic core Bp and permeability
of the magnetic material μm , with the core thickness fixed at
10 μm by practical constraints. Increasing the ripple current and
frequency seems promising for maximizing the power density
of the inductor, but at the cost of increasing losses in both
the inductor and the MOSFETs. MOSFET width also has an
impact on both power density and efficiency. Decreasing the
MOSFET width can improve the power density, but may degrade
the converter efficiency. In order to optimize the performance
of the buck converter, optimal ripple current, frequency, and
MOSFET width are explored to maximize power density for
each given converter efficiency as in [35].
A design process for V-groove inductors using multilayer
cores is described in [40]–[42], [46]. The design of the V-groove
inductors fabricated in this study was first described in [46].
Essential details for the design process are described here. The
total power loss of the inductor includes resistive loss in the
conductor, and hysteresis and eddy-current loss in the magnetic
core. The resistive loss in the triangular conductor can be calculated using the loss model developed based on simulation results
in [41].
Because of the good soft magnetic properties of the
Co–Zr–O thin films [32], the hysteresis loss of the inductors
is small compared to the total loss in our designs. The hysteresis
loss is estimated based on the area of the hysteresis loop by [41]
Pcore -hysteresis = 3Bac f Hco er Vc
(1)
where Bac is the amplitude of ac flux in the core, f is the
switching frequency, Vc is the volume of the core, and the factor
of three is for roughly estimating the area of the hysteresis
loop as three-quarters of the area of an ideal parallelogram
loop. Hco er is the half-width of the hysteresis loop with an
excitation field of Bac . For simple estimation of the hysteresis
loss, we assumed that Hco er scales linearly with Bac based on
the Wohlfarth relation for hysteresis loops [49]. Experimental
results in [50] show that Hco er of the Co–Zr–O thin films scales
linearly with low excitation fields (e.g., less than about 10 Oe),
and becomes nonlinear at higher excitation fields. In our designs,
Hco er is simply estimated as
Hco er = kH c Hac
(2)
where Hac is the amplitude of the drive field and kH c is a unitless
factor given in Table I.
Above 10 MHz, displacement current in dielectric layers of
a multilayer core may have a significant impact on the eddycurrent loss. To get an idea of how significant this effect may
Symbol
Description
Value
Vin
Vout
Iout
Converter Specification
DC input voltage
DC output voltage
DC output current
7V
3.3 V
1A
ρmag
ρcopper
t
tm
ti
μrm
εr
Bsat
k Hc
Parameter Values Applied in the Designs
Magnetic material
Insulating material
Conductor
Resistivity of magnetic material
Resistivity of copper
Thickness of core
Thickness of magnetic layers
Thickness of insulating layers
Relative permeability of magnetic material
Relative permittivity of insulating material
Saturation flux density
Coercivity per unit drive field
Co-Zr-O
ZrO2
Copper
300 μΩ-cm
2.2 μΩ-cm
10 μm
100 nm
20 nm
100
12.5
1T
0.01 Oe/Oe
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TABLE II
MOSFET PARAMETERS USING A 0.7 μ M, 7 V TECHNOLOGY
Cg0 (fF/µm)
2.063
Cds (fF/µm)
0.4143
Cwell (fF/µm)
0.2695
Specifications of the buck converter and parameters fixed
by the materials and fabrication process are listed in Table I.
Parameter values for MOSFETs are listed in Table II; these
are obtained by scaling the parameters of MOSFETs using a
0.18 μm, 1.8-V technology to 7 V, in order to meet the specification of the buck converter. MOSFET losses are estimated as
follows:
Pm osfet = Pm os -r + Pm os -s
Ron (Ωµm)
2052
Vgate (V)
7
Vdd (V)
7
2 mm
(3)
where Pm os -r is the resistive loss in the MOSFETs, and Pm os -s
is the switching loss. The resistive loss is calculated based on
the on-resistance Ron , which is obtained by scaling the onresistance for a unit-width MOSFET by the width selected by
/Wm osfet ; and
the optimization, Wm osfet , to obtain Ron = Ron
based on the rms current through each MOSFET. The switching
loss is calculated as
2
2
Cg 0 Wm osfet f + Vdd
(2Cds
+ Cwell
)Wm osfet f
Pm os -s = 2Vgate
(4)
using the parameter values given in Table II: gate, drain to
source, and well capacitance for a unit-width MOSFET (Cg 0 ,
, and Cwell
, respectively), on-resistance for a unit-width
Cds
and gate and input used, Vgate and Vdd .
MOSFET Ron
Design results and performance predictions are described
in Section VI in conjunction with analysis of measured
performance.
212 μm
Micrograph
Photograph
Fig. 2. Optical micrograph showing a top view of a microfabricated V-groove
inductor and photograph of small dies with V-groove inductors.
the deposition of magnetic material. In the study reported here,
copper was electroplated at the terminal ends of all inductors to
form bumps with a height of 25 μm. After the deposition of the
second layer of magnetic material, we polished off the magnetic
material on the top of the copper bumps to expose them for
electrical connection. A top view of a microfabricated V-groove
inductor with magnetic material removed from the tops of the
bumps is shown in Fig. 2.
III. FABRICATION
The fabrication process used is similar to that in [42] and [43],
but instead of single-layer Co–Zr–O material, multilayer Co–
Zr–O/ZrO2 thin films are deposited as the cores. We briefly
describe the original basic process as follows. V-grooves are
produced by anisotropic etching of a silicon substrate, and magnetic material is deposited on the sloping sides of the V-grooves.
Then, a seed layer is deposited and copper is electroplated to fill
the V-grooves. Chemical–mechanical polishing is used to planarize the surface of the wafer, and another layer of magnetic
material is deposited to form one-turn closed-core inductors.
To improve the performance of the core material on the sloping sides, instead of a thick single Co–Zr–O layer, 19-nm Co–
Zr–O layers and 4-nm ZrO2 layers are alternately deposited in
order to eliminate the columnar structure that caused problems
with the magnetic properties [48]. However, the 4-nm ZrO2 layers are too thin to confine eddy current into separate Co–Zr–O
layers. To decrease the eddy-current loss, every 100-nm multilayer Co–Zr–O19nm /(ZrO2 )4nm film is separated by a 20-nm
ZrO2 layer.
In [42], electrical contacts of the inductors were made by
lifting off the final layer of magnetic material with photoresist
bumps. But this approach requires very thick photoresist (about
24 μm), and the photoresist becomes difficult to remove after
IV. MEASUREMENT METHODOLOGY
Measurement methodology for evaluating prototype microfabricated V-groove inductors is described in this section. The
dc resistance of the prototype inductors was measured by using a four-terminal micro-probe station. Magnetic properties of
the Co–Zr–O films deposited for the prototype inductors were
investigated using a B–H loop tracer (Shb model 109 A). Because the inductors are designed to operate at frequencies above
10 MHz, an Agilent E4991A impedance analyzer was chosen
for its high-frequency accuracy, and in particular its phase accuracy for high-Q (quality factor) measurements, made possible
by using an extra calibration step with a low-loss capacitor.
The phase accuracy is important for accurate ac resistance measurements on high-Q components, such as these inductors [44].
Nonetheless, the accuracy of our measurements of ESR is limited for very high-Q values, and any results for Q greater than
about 50 may have substantial error.
We used a 16192A parallel electrode SMD test fixture to
connect the inductors to the instrument. The inductors were
diced along the inner edges of the interconnect bumps to expose
the conductor on the sides of the inductors and allow the probes
of the test fixture to make contact from the two sides as shown
in Fig. 3.
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4
Inductance (nH)
Test probe
3.5
3
2.5
Test probe
2
10
Inductor under test
V. MEASUREMENT RESULTS AND DISCUSSION
A. DC Resistance
Prototype V-groove inductors with length of 2 mm and width
of 212 μm (shown in Fig. 2) were tested. The inductors have
10-μm magnetic material thickness, and conductors that fill
the remaining space of the the groove as shown in Fig. 1. DC
resistance was measured using a four-terminal probe station. The
current was injected into the inductors through the interconnect
copper bumps and the voltage across the same two bumps (the
terminals of the inductor) was measured. The dc resistance was
measured to be 3.83 mΩ, slightly larger than the predicted value
(3.70 mΩ).
1,000
100
Frequency (MHz)
1,000
1,000
AC resistance (mΩ)
Fig. 3. Schematic of a V-groove inductor under test using the 16192A test
fixture.
100
Frequency (MHz)
100
10
10
Fig. 4. Measured inductance and ac resistance of microfabricated V-groove
inductors in the frequency range of 10 MHz to 1 GHz. Note that in the range of
70 to 200 MHz, the measured resistance is less than 2% of the overall impedance,
and the accuracy of the measured resistance value is limited.
90
80
B. Small-Signal Measurement
For impedance measurements, the inductors were diced to
expose the conductor on the sides of each device for contact to
the test fixture. To achieve accurate measurement results, calibrations were performed with open, short, load and low-loss
capacitor reference impedances before the test fixture was connected to the instrument. With the test fixture installed, another
two calibrations, open and short, were performed to compensate
the impedance introduced by the fixture. The short calibration
on the test fixture was performed using a gold-plated rectangular
copper piece with a cross section of 2.4 mm × 1.9 mm and a
length of 1.4 mm. The prototype inductor was diced to the same
length as the calibration piece (1.4 mm), and was tested on the
test fixture. Since the inductance and the ac resistance of the
inductor are proportional to the inductor length, the measured
inductance and ac resistance of the 2-mm-long prototype inductor can be obtained by scaling the measurement results of the
1.4-mm-long inductor to 2 mm.
The measured inductance and ac resistance of the 2-mm-long
prototype V-groove inductor in the frequency range of 10 MHz
to 1 GHz are shown in Fig. 4. The quality factor Q from this
measurement is shown in Fig. 5. As noted earlier, measurements
of ac resistance will be less accurate where the quality factor is
very high. In particular, between 70 and 200 MHz, the measured
quality factor is above 50, and so the ac resistance data in that
frequency range should be regarded with some skepticism. It is
likely that the actual behavior has higher ac resistance through
this range, without the abrupt change in slope seen just above
100 MHz.
Quality factor
70
60
50
40
30
20
10
10
100
Frequency (MHz)
1000
Fig. 5. Measured quality factor of the prototype V-groove inductors. Measurement accuracy cannot be guaranteed for values above about 50.
The data in the frequency range of 10 to 100 MHz are
of particular interest. The measurement results show that the
V-groove inductor exhibits an inductance of about 3.4 nH in
this range. The measured inductance is due to the energy stored
in the region with a cross section of 2.4 mm × 1.9 mm (the cross
section of the copper short-circuit calibration piece) around the
inductor, since the inductance due to the energy stored outside of
the region is subtracted off after the calibrations. The calculated
inductance, assuming that energy is stored only in the magnetic
core, would be 3.5 nH. To evaluate the energy stored in the air,
finite-element analysis was used. 2-D simulations were run to
simulate the inductor with a return path around the inductor the
same size as the short-calibration block (2.4 mm × 1.9 mm).
The simulated inductance is 4.1 nH, including both the energy
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100%
Normallized Flux Density
AC resistance (mΩ)
Measured data
Predicted values
10
50%
0%
-50%
-100%
-250 -200 -150 -100 -50
0
50
100 150 200 250
Drive field (Oe)
100
frequency (MHz)
Fig. 6. Comparison of measured and predicted ac resistance based on the
model used in design.
stored in the magnetic material, and the energy stored in the air
within the 2.4 mm × 1.9 mm region, as is captured in the measurement. The measured inductance is about 15% lower than
the simulated value; this could be explained by variations in the
permeability of the magnetic material. In the actual application,
the amount of energy stored in the air would depend on the
shape of the return path and the distance between it and the
inductor, and might be lower with a very close return path, but
would typically be similar.
A comparison of the measured and predicted ac resistance
is plotted in Fig. 6. The measured ac resistance is about 50%
to 100% higher than the predicted values. Below, we examine
several possible reasons for this discrepancy.
1) Magnetic Properties of the Core Material: Sputtering
magnetic material on tilted surfaces (on the sidewalls of
V-grooves in our case) may result in a columnar structure in
the film growth, which can lead to the occurrence of perpendicular magnetic anisotropy and stripe domains, degrading the
magnetic properties of the material. In this study, multilayer
Co–Zr–O/ZrO2 films are used instead of single-layer Co–Zr–O
films in order to improve the performance of the films on the
sidewalls [48]. To investigate the performance of the multilayer
core material of the inductors, B–H loops of a small die containing inductors with dimension of 3.8 mm × 2.4 mm were
measured, and the results are shown in Fig. 7. For the measurement of the hard-axis loop, a magnetic field H is applied parallel
to the substrate, and perpendicular to the length of the inductors. Thus, the field is perpendicular to the easy axis for both
the top layer of magnetic material and the magnetic material on
the sidewalls of the V-grooves. For the top magnetic material,
the applied field is parallel to the hard axis in the plane of the
magnetic film, but for the sidewalls, only a component of the
applied field is parallel to the hard axis. The vertical axis is not
calibrated, and so is shown normalized to the maximum value
in each direction of excitation.
Fig. 7. Hysteresis loop measurement results on a silicon die containing prototype V-groove inductors.
100%
Normallized Flux Density
10
50%
0%
-50%
-100%
-250 -200 -150 -100 -50
0
50
100 150 200 250
Drive field (Oe)
Fig. 8. Hysteresis loop measurement results on a silicon die with Co–Zr–
O magnetic material on the sidewalls of the V-grooves. Magnetic material
deposited on the top of the die was removed.
The core material shows reasonably good soft magnetic properties, with high in-plane anisotropy and an anisotropy field Hk
of about 100 Oe. The coercivity of the material is about 8 Oe;
this is larger than that of Co–Zr–O films deposited on flat substrates using the same process parameters [36], [46], indicating
larger hysteresis loss than expected. To explain this magnetic
performance degradation, the magnetic properties of the Co–
Zr–O films deposited on the sloping sides of the V-grooves
were studied further.
The top magnetic layer polished off of another small die
containing V-groove inductors with similar dimensions, and was
tested in the B–H loop tracer. The results of this measurement
are expected to show the hysteresis loops of only the films on the
sidewalls [52], and are plotted in Fig. 8. The magnetic material
on the sloping sides shows soft magnetic properties, and exhibits
an in-plane anisotropy, indicating that stripe domains are not
significantly developed in the films. However, the films’ hard
axis has a larger hysteresis loop than do materials deposited on
flat substrates. The coercivity with the film driven to saturation
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Current flowing into substrate through magnec films
Half Width of BH Loop (Oe)
14
12
Oxide layer polished off
Magnec thin films
Copper
10
Current through the oxide layer
8
Silicon oxide
6
Silicon Substrate
4
Fig. 10.
2
0
0
20
40
60
80
Bipolar Applied Field Magnitude (Oe)
100
Current flows introducing losses in the silicon substrate.
100
Fig. 9. Half-width of the loops of magnetic material deposited on the sidewalls
of V-grooves as a function of bipolar applied field magnitude.
AC resistance (mΩ)
along the hard axis is 15 Oe. To investigate the hysteresis loss in
the films on the sidewalls, the half-width of the loop along the
hard axis was tested at different excitation levels. From results of
this measurement, shown in Fig. 9, we can see that the loop width
of the films on the sidewalls is approximately proportional to the
excitation field for applied fields below 12 Oe. To evaluate the
small-signal measurement results, we assume that this region
is linear. We predict the half loop width of the films at very
small excitation fields (less than 100 mOe) based on a linear
fit to the measured data below 12 Oe. Then, we modify the
predicted ac resistance on that basis. The results are shown
in Fig. 11 (along with additional model refinements discussed
below). The modified predicted values reduce the discrepancy
between calculations and measurements to about 30%.
2) Loss in the Silicon Substrate: There are several sources
of losses in the silicon substrate. Eddy currents in the silicon
substrate induced by magnetic fields generated by the current
flowing through the conductor can contribute eddy-current loss.
Since the eddy-current loss scales as square of frequency, the
eddy-current loss in the silicon may not be negligible at high
frequencies even though the resistivity of the silicon is large.
The inductors were fabricated in boron-doped silicon substrates
with resistivity of around 20-Ω cm, much lower than the intrinsic
resistivity of silicon, and the eddy-current loss in the borondoped silicon is evaluated below.
Other losses can be attributed to the currents shown in Fig. 10.
To isolate the inductor from the substrate, a 3-μm-thick silicon
dioxide layer was grown before sputtering the first layer of
magnetic material. However, at high frequencies, the impedance
of the isolation layer decreases, and current can flow into the
substrate causing loss. In the fabrication step of planarizing
electroplated copper [42], [52], the silicon dioxide layer on the
wafer surface may be polished off, and the magnetic films may
be directly deposited on the silicon, shorting the conductor to
the substrate, as shown in Fig. 10. Current could then flow from
the conductor into the substrate through the magnetic films,
introducing loss.
Full model
with via loss
Measured
w/ sub
w/ hyst
Basic model
10
10
100
frequency (MHz)
Fig. 11. Comparison of measured ac resistance and predicted values. The
basic model is as used in design calculations. The next line up adds additional
hysteresis loss based on the measured material characteristics. The line labeled
“w/sub” includes calculations of losses in the silicon substrate, and finally the
full model includes all of these effects plus eddy current losses in the magnetic
vias.
Finite-element analysis was used to evaluate the eddy-current
loss and the worst-case loss due to the current flowing in to the
substrate through the magnetic films. We ran 2-D simulations
to simulate a V-groove inductor with a width of 212 μm, and
embedded in a silicon substrate with a cross section of 2 mm ×
0.6 mm and a thickness of 0.4 mm. The simulation results show
that at 100 MHz the equivalent series ac resistance due to the
eddy-current loss is a negligible 0.1 mΩ. To simulate the loss due
to the current bridged into the substrate through the magnetic
films, we set a parallel current flowing into the conductor and
the substrate, and the equivalent series ac resistance due to this
current is 1.9 mΩ.
The loss due to the current across the insulating layers is
simply estimated by using a lumped circuit model with two
capacitors and one resistor connected in series, parallel to an inductor with an inductance as that of the prototype inductor. The
two capacitors model the capacitance due to the insulating layers, and the capacitance of the capacitors is estimated to be 4 pF.
The resistor models the resistance of the silicon substrate, and
its resistance is estimated to be 1.67 kΩ. The loss in the resistor
is the loss due to the current across the insulating layers. At
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 9, SEPTEMBER 2013
100 MHz, the estimated ac resistance due to this loss is about
1.2 mΩ.
The predicted ac resistance considering losses in the silicon substrate is plotted in Fig. 11, from which we can see
that the losses in the substrate are very small, but become
slightly more significant as frequencies approach 100 MHz. The
discrepancy between predicted and measured results remains
near 30%.
3) Eddy Current at Magnetic Vias: The model we use for
eddy current losses in the magnetic material [50] is based on the
assumption that the direction of the magnetic flux is parallel to
the layers. With the use of thin layers of magnetic material with
high resistivity (compared to that of metal alloys) these eddy
current losses can be very small. However, at the “magnetic
via” where flux transfers between the top magnetic layers and
the magnetic layers deposited on the sloping sidewalls of the
V-groove, flux lines must cross through layers of the upper core,
with a component perpendicular to the layers. This perpendicular component can induce much more significant eddy current
losses that circulate in the plane of the film [23], [53]–[55].
In [23], these losses are analyzed for a similar configuration
with the same material, and are shown to be one of the main
contributions to the power loss.
To estimate the contribution of these losses to our inductors,
we performed a similar finite-element simulation, from which
we calculated the ac resistance contribution of this effect to
range from 0.67 mΩ at 10 MHz to 64 mΩ at 100 MHz. These
results are added to the other models to obtain the “full model”
curve in Fig. 11. For much of the frequency range from 10 to
100 MHz, there is good agreement between the measurements
and the full model. At low frequencies, the measured ac resistance is about 20% higher than predicted, and near 100 MHz,
significantly lower. The discrepancy at high frequencies may
be partly because of measurement error, but it may also be that
our simulation of magnetic via loss overestimates the loss. This
could be because it simulates only the core, without the conductor present, and the conductor influences the path of some of the
magnetic flux lines, particularly near the corner.
Despite the discrepancies between the final full model and the
measured ac resistance, it is clear that two of the most important
effects degrading performance relative to the performance predicted by the simple model used in design are the actual achieved
magnetic material quality, especially on sloping sidewalls, and
the eddy current losses at the magnetic vias. As discussed below, the achieved performance is still excellent, but it is worth
considering approaches that could avoid these problems. One
such approach is to use a toroidal magnetic core, in which the
magnetic flux stays in a plane parallel to the substrate, avoiding
any losses from out-of-plane flux, and avoiding the need for
depositing magnetic material on sloping surfaces. Ordinarily,
this would result in poor magnetic performance in regions of an
anisotropic core that were oriented incorrectly for the local direction of flux. However, it is possible to apply a radial magnetic
field during deposition of a toroidal core in order to create the
ideal anisotropy direction throughout the structure [56], [57].
This approach shows promise for developing even higher performance than we have achieved here.
TABLE III
DETAILED CALCULATED PARAMETERS FROM THREE OPTIMIZED DESIGNS
Design
Frequency (MHz)
Total L loss (mW)
DC L loss (mW)
AC L loss (mW)
MOSFET switching loss (mW)
MOSFET Conduction loss (mW)
MOSFET width (mm)
L (nH)
L Rac (mΩ)
L Rdc (mΩ)
1
11
72
41
31
87
94
59
82
112
41
2
29
96
60
36
144
148
39
27
89
60
3
94
47
34
11
241
249
19
13
55
34
C. Quality Factor of Prototype Inductors
The measured quality factor is shown in Fig. 5. As discussed
previously, accuracy is limited for values above about 50. Q
values increase to 21 at 10 MHz, and are highest between 70
and 200 MHz, where they are above 50. Note that the quality
factor is based only on inductance and ac resistance, and does
not reflect the excellent low dc resistance of these components.
VI. EXPECTED DC–DC CONVERTER PERFORMANCE USING
PROTOTYPE V-GROOVE INDUCTORS
The performance of 7 to 3.3-V, 1-A dc–dc buck converters
using the prototype V-groove inductors is predicted in this section. The same area of power MOSFETs, switching frequencies
and inductance requirements are chosen as those obtained in the
optimization discussed in Section II, and listed in Table III, but
instead of using inductor designs individually optimized for each
design, we calculate the performance based on using the fabricated inductors, with the specified inductance value achieved
by scaling the length of the inductor. For example, the 82 nH
value specified for the low-frequency design would require a
total inductor length of 48 mm, which could be implemented
with 12 inductors in series, each 4 mm long and 212 μm wide,
all of which could fit in an area less than 5 mm × 3 mm. The
inductor loss of the converters can be predicted as [44], [58]
2
2
Rdc -inductor + Irm
Pinductor = Iout
s -ac -inductor Rac -inductor
(5)
where Rdc -inductor is the measured dc resistance of the inductor
and Iout is the converter output current. The loss model uses the
ac rms value of the triangular current in the inductor and the ac
resistance measured at the fundamental switching frequencies
to calculate the ac conduction loss. In (5), Rac -inductor is the
ac resistance of the inductor obtained in small-signal measurements at the switching frequencies, and Irm s -ac -inductor is the
ac rms current flowing through the inductor given by [52]
Irm s -ac -inductor =
Iout rripple
√
2 3
(6)
where rripple is the ripple ratio of the converters.
The approach of calculating large-signal power losses based
on small-signal resistance measurements is not always accurate for inductors with nonlinear magnetic cores, but we have
10
1
0.1
0.84
4391
Power Density off Magnetics watts/mm 2
Power Density of Converters w
watts/mm2
YAO et al.: MICROFABRICATED V-GROOVE POWER INDUCTORS
Opmizaon results
Predicons of converters
using prototype inductors
0.86
0.88
0.9
Converter Efficiency
0.94
0.92
Fig. 12. Predicted power density of converters using prototype V-groove inductors as a function of converter efficiency. The predictions for the converters
are carried out using the area of MOSFETs, switching frequencies, and inductance requirements obtained in the optimization presented in [46], rather
than using converter parameters optimized for the fabricated inductors. The
prediction is compared with the optimization results acquired in [46].
TABLE IV
DETAILED CALCULATED PARAMETERS FOR CONVERTERS USING
MEASURED INDUCTORS
Design
Frequency (MHz)
Total L loss (mW)
DC L loss (mW)
AC L loss (mW)
MOSFET switching Loss (mW)
MOSFET conduction loss (mW)
MOSFET width (mm)
L (nH)
L Rac (mΩ)
L Rdc (mΩ)
1
11
158
92
66
87
94
59
82
240
92
2
29
92
31
61
144
148
39
27
151
31
3
94
39
15
24
241
249
19
13
124
15
confidence in this approach for this structure and magnetic material based on the fact that our excitation is in the linear range
shown in Fig. 9, and based on large-signal measurements on
multiturn inductors with the same material in a similar configuration in [59] which exhibited stable values of Q over a wide
range of excitation amplitude at 30 MHz.
The predicted converter power density versus circuit efficiency is plotted in Fig. 12; the details of three designs from
this curve are provided in Table IV. For the designs at low converter efficiencies (e.g., below 90%), the prototype inductors
have larger inductor depth than the optimized inductors [46].
With the same area of power MOSFETs, switching frequencies and inductance requirements, converters show lower power
density and higher efficiency using the prototype inductors than
using the optimized inductors. For the designs at high frequencies, the inductor depth of the prototype inductors is smaller
than that of the optimized inductors, and converters using the
prototype inductors demonstrate higher power density and lower
Intel 2010
2
94 MHz x
29 MHz x
1
nductor 2005
V-Groove In
11 MHz x
0.1
O’Donnell 2008
Park 2003
Wang 2010
K. Kim 2002
Kowase 2005
0.01
0.65
0.7
0.75
0.8
0.85
Converter Efficiency
E
Mikura 2006
0.9
Fig. 13. Power density of inductors versus circuit efficiency for converters
using on-chip inductors. The colored dots are for reported converters using
on-chip inductors, and the solid line is for predicted performance of converters using prototype V-groove inductors. The predictions for the converters are
carried out using the area of MOSFETs, switching frequencies, and inductance
requirements obtained in the optimization presented in [46].
efficiency, as shown in Fig. 12. The 7 to 3.3-V, 1-A converters using prototype V-groove inductors are expected to exhibit power
density of 2.5 W/mm2 and efficiency of 86% at 100 MHz, and
power density of 0.36 W/mm2 and efficiency of 91% at 11 MHz.
A comparison of the converters using prototype inductors and
published experimental results of converters with on-chip inductors from the literature [20], [42], [44], [60]–[66] is shown
in Fig. 13 in terms of inductor power density versus converter
efficiency. The converters using prototype V-groove inductors
are predicted to exhibit advantages in both inductor power density and converter efficiency over most published experimental
work.
One specific comparison worth highlighting is the comparison to the V-groove inductors we previously fabricated and
tested [44]. Based on the measured performance of our new
V-groove inductors, we calculate that much higher converter efficiency is possible at similar power densities. This is in part due
to the nonoptimized MOSFETs used in [44], but the V-groove
inductors have also been substantially improved by the use of
multilayer material. A minor part of this improvement (about a
1% efficiency improvement) can be attributed to the reduction in
conventional eddy-current losses in the magnetic core with the
laminated structure. Much more important is the improvement
in magnetic properties on the sloping sidewalls, which had less
than half the expected permeability when we attempted to fabricate them without a multilayer structure. The previous material
also had high losses, although we do not have this effect accurately quantified. The multilayer structure is achieved simply by
reprogramming the computer control of the sputtering system
without any need to remove substrates from the sputtering system, so this improvement in performance comes at very little
additional cost.
4392
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 9, SEPTEMBER 2013
VII. CONCLUSION
Microfabricated V-groove inductors targeted to operate above
10 MHz are fabricated and tested. Multilayer nanogranular
Co–Zr–O/ZrO2 magnetic thin films are used as the core material of the inductors to improve the magnetic performance of
the films deposited on the sidewalls of V-grooves and to control
eddy-current loss in the core.
V-groove inductors using multilayer magnetic thin films were
co-optimized with power MOSFETs for 7 to 3.3-V, 1-A dc–dc
buck converters to maximize power handling capability per unit
substrate area for given efficiencies. Prototype V-groove inductors were fabricated based on the optimization results, and the
measured and the predicted performance of the inductors match
well. The inductors exhibit an inductance of 3.4 nH from 10
to 100 MHz, a dc resistance of 3.83 mΩ, and a quality factor
of up to 66. The prototype inductors are a promising candidate for high-power-density high-efficiency dc–dc converters.
For example, a 7-V to 3.3-V, 1-A converter using the prototype V-groove inductors could be expected to exhibit power
density of 2.5 W/mm2 and efficiency of 86% at 100 MHz,
or power density of 0.36 W/mm2 and efficiency of 91% at
11 MHz.
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Di Yao (S’07–M’11) received the B.E. degree in electronic engineering from Shanghai Jiao Tong University, Shanghai, China, in 2006, and the Ph.D. degree in
electrical engineering from the Thayer School of Engineering at Dartmouth, Hanover, NH, in 2011, where
his Ph.D. research interests included magnetic thin
films, loss modeling for magnetics, design and optimization of power devices for high-frequency power
conversion circuits, and microfabricated power magnetic devices.
He has been with Maxim Integrated, San Jose,
CA, since 2011.
Christopher G. Levey (A’93–M’03) received the
B.A. degree in physics from Carleton College, Northfield, MN, in 1977, and the Ph.D. degree in physics
from the University of Wisconsin-Madison, Madison,
in 1984.
He was at AT&T Bell Labs until 1986 and then
joined the Faculty of Dartmouth College, first in the
Physics Department, then in engineering. His MEMS
work includes stress engineered microturbines and
robots, binary optics, freeze casting templates, and
microinductors. He is currently an Associate Professor and Director of the Microengineering Laboratoty at the Thayer School of
Engineering at Dartmouth, Hanover, NH.
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 9, SEPTEMBER 2013
Rui Tian received the B.S. degree in material physics
from Nanjing University, Nanjing, China, in 2012.
He is currently working toward the M.S. degree at
the Thayer School of Engineering at Dartmouth,
Hanover, NH.
His research interests include research on thinfilm growth technology and simulation of magnetic
material behavior.
Charles R. Sullivan (S’93–M’96–SM’12) received
the B.S. degree in electrical engineering (Highest
Hons.) from Princeton University, Princeton, NJ, in
1987, and the Ph.D. degree in electrical engineering from the University of California, Berkeley, in
1996.
He is currently an Associate Professor at
the Thayer School of Engineering at Dartmouth,
Hanover, NH. Between the B.S. and Ph.D. degrees, he
worked for Lutron Electronics designing electronic
ballasts. His research includes work on design optimization of magnetics for high-frequency power conversion, thin-film magnetic
materials and devices for power applications, energy efficiency and renewable
energy, and electromagnetic modeling of capacitors.
Dr. Sullivan received the National Science Foundation CAREER Award and
the Power Electronics Society Prize Paper Award.