RAMS: A VHDL-AMS Code Refactoring Tool
Supporting High Level Analog Synthesis ∗
Kaiping Zeng, Sorin A. Huss
Integrated Circuits and Systems Laboratory
Department of Computer Science
Darmstadt University of Technology
D-64289 Darmstadt, Germany
Tel: (+49 6151) 16 6694, Fax: (+49 6151) 16 4810
Email: zeng@vlsi.informatik.tu-darmstadt.de
Abstract
In this paper, a code refactoring methodology for the
high-level analog synthesis is presented. It restructures,
refines, and simplifies an analog behavioral model written
in VHDL-AMS. Through code refactoring one improves the
comprehensibility, expandability and reusability of the behavioral model and brings the model to a necessary preliminary stage for the actual circuit synthesis. This approach
supports the top-down hierarchical design flow for analog
and mixed-signal application.
1 Introduction
A large variety of modern applications are based on
mixed analog-digital circuits that are fabricated on the same
silicon chip as systems on chip (SoC). Such circuits provide information processing and communications capabilities to consumer electronics, industrial automation, retail
automation and medical markets. The growing need for
mixed analog-digital application-specific integrated circuits
has accelerated efforts in analog circuit design automation.
Although there is a strong trend towards implementing
as much signal processing functionality as possible in the
digital domain, analog circuits will always play an important role in these interfaces, e.g., for amplification and filtering of the noise-sensitive sensor signals and for A/D conversion. A very important problem in the design of these
mixed-signal sensor interfaces is the lack of mature analog
CAD tools, especially at levels higher than the opamp level,
resulting in unacceptably long design times for the analog
sensor interface front-end [1].
∗ This work was supported in part by German Federal Ministry of Education and Research (BMBF) /edacentrum under Grant 01M3070E.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI
New Frontiers in VLSI Design
0-7695-2365-X/05 $20.00 © 2005 IEEE
In this work, the implementation framework for the code
refactoring methodology which supports the high-level synthesis of analog models [2], [3] is reported.
2 Automated Procedure
A behavioral model of an analog system is a mathematical, algorithmic, or pictorial representation of a thing or
concept in terms of its characterizing parameters. In this
work, the behavior of an analog system is modeled mathematically as a set of ordinary differential algebraic equations (ODAEs) with time as an independent variable.
The ODAEs can be partitioned and are electrically represented by the so-called analog primitives, such as integrators, adders, scalers, multipliers (see Fig. 1).
u
K
u1
f
un
(a) Scaler: f = K · u
u1
u2
(c) Multiplier: f = u1 ·u2
Σ
(b) Adder: f =
f
f
Pn
i=1
ui
u
f
(d) Integrator: f =
R
udt
Figure 1. Definitions of analog functional
primitives and their symbols.
These primitives can be implemented either by active
network or by switched-capacitor realization. Therefore,
ODAEs allows a functional, hierarchical decomposition of
the analog model into its low-level analog subsystems.
The approach we propose consists of three steps: parsing, partitioning and refactoring [4] (see Fig. 2).
VHDL-AMS Code
Lexer
ANTLR
Grammar
Parser
AST
Castro XML
XML Schema
for the next level synthesis is reached by iterative application of a sequence of refactoring methods [4].
After the successful completion of these steps, the resulting analog model are passed to next level synthesis.
The methodology we discussed above is implemented
as a tool, which is called RAMS (Refactoring Analog and
Mixed-signal System). We choose Java as the programming
language and Eclipse as the integrated developing environment. The user-interface is showed in Fig. 4.
Object Tree
Refactering
VHDL-AMS Code
Figure 2. Work flow of refactoring methodology.
It starts with parsing, in which an analog system which is
coded in an analog hardware description language (VHDLAMS) is checked syntactically and semantically, and a conresponding parse tree is generated. In this step, software
tools such as ANTLR and Castor XML are utilized (see Fig.
2).
Based on the constructed parser tree, the analog system
is partitioned into analog primitives (see Fig. 3). This parti-
Figure 4. Screenshots of the user-interface of
RAMS.
.. .
f(t)= u +a u +b u+c
3 Conclusion
−a
f(t)
Σ
.
u
..
u
u
−b
The implementation framework for the code refactoring
methodology has been setup. This contribution shows that
the refactoring steps of analog behavioral models can be
performed automatically.
−c
Figure 3. Mapping example.
tion brings the model closer to the circuit level. It is important for providing the flexibility in the choice of the desired
degree of accuracy depending on the application. In addition to that, this step should assist to create an analog library
in the next hierarchicl level due to the fact that analog primitives in general have more than one function depending on
the used technology.
Finally, further refactoring techniques are applied to restructure, refine, and simplify the analog model. Refactoring is a disciplined technique for restructuring an existing body of code, altering its internal structure without
changing its external behavior. Its keypoint is a series of
small behavior preserving transformations. That is refactoring of analog model means to modify a model description
synthesis-oriented without changing the envisaged behavior
of the system model, so that an implementabel description
Proceedings of the IEEE Computer Society Annual Symposium on VLSI
New Frontiers in VLSI Design
0-7695-2365-X/05 $20.00 © 2005 IEEE
References
[1] S. Donnay, G. Gielen, W. Sansen, W. Kruiskamp, D.
Leenaerts, W. Van BokhovenK, ”High-level synthesis of
analog sensor interface front-ends,” Proceedings of the 1997
European conference on Design and Test, March, 1997
[2] Alex Doboli, Nagu Dhanwada, Adrian Nunez-Aldana,
Ranga Vemuri, ”A two-layer library-based approach to synthesis of analog systems from VHDL-AMS specifications,”
ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol.9, No.2, April 2004.
[3] T. J. Kazmierski, F. A. Hamid, ”Behavioral modelling of
RF filters in VHDL-AMS for automated architectural and
parametric optimization,” Proc. of the 2004 International
Symposium on Circuits and Systems, May 2004.
[4] Sorin A. Huss, Steffen Klupsch ”A new approach to mixedsignal model refinement by code refactoring methods,” Forum on Specification & Design Languages, Sept. 2003.