Symbolic Modeling and Analysis
of Analog Integrated Circuits
Ralf SOMMER1, Eckhard HENNIG1, Manfred THOLE1, Thomas HALFMANN1, Tim WICHMANN1
ABSTRACT
In this paper an overview of the application of symbolic
analysis and computer algebra is given. After an introduction requirements to symbolic analysis tools are formulated, and a short abstract of a general symbolic
equation-based approximation algorithm is given. A
generic symbolic analysis flow is introduced and applied to derive a nonlinear behavioral model of an integrated multiplier circuit using the symbolic analysis
toolbox Analog Insydes [1]. It will be shown how symbolic analysis can assist behavioral model generation
and can help to better understand a circuit in order to
improve the quality of the design.
1. INTRODUCTION
Analog and mixed-signal design is of great importance
in microelectronics applications, like automotive and
telecommunication. The traditional design of analog integrated circuits relies largely on a mixture of expertise,
some manual calculations, and numerical circuit simulation. Recent research and development in the field of
symbolic circuit analysis has produced results which
may have considerable impact on some parts of the traditional design flow, but few analog designers have
adopted symbolic analysis techniques as standard tools
in their CAD environments yet. To a large extent this
may be due to the lack of documented methodologies
which show what can be expected from symbolic analysis and how it can be efficiently employed to solve industrial circuit design problems. A tool assisting analog
expert designers in circuit sizing, optimization, and
characterization is now urgently needed to enhance design productivity in order to face shrinking time-tomarket schedules.
The application fields of symbolic analysis techniques (in a close connection with numerical methods)
can be divided into the following four main categories,
which are essential tasks in the industrial design flow of
analog integrated circuits:
Circuit analysis:
• determine the influences of element parameters
on circuit behavior
1. ITWM – Institute of Industrial Mathematics,
Kaiserslautern, Germany
• extraction of dominant circuit behavior in a mathematical and interpretable form (also to be used
for circuit sizing)
• error and tolerance analysis
Circuit modeling:
• support of model generation for analog circuit
blocks (on different hierarchical levels)
• allow for overall circuit simulation by use of
behavioral and macro-models
Circuit sizing:
• support manual or computer-aided circuit synthesis
• derivation of symbolic (generic) sizing formulas
for circuit elements as functions of global circuit
specifications
Circuit optimization:
• preprocessing of equations by e.g. elimination of
variables to allow for an efficient optimization
run
• allow for application of optimization algorithms
already on system level
2. REQUIREMENTS FOR SYMBOLIC
ANALYSIS TOOLS
As a consequence of the large variety of application
fields summarized in the previous section it becomes
apparent that state-of-the-art symbolic analysis tools
have to be characterized by flexibility in their functionality as well as transparency in their data structures and
models. Moreover comfortable interfaces to the user on
the one hand and to numerical simulation environments
on the other hand must be provided because symbolic
analysis is no stand-alone application any more and has
to be embedded into the designer’s workflow. The following key requirements were identified in many technical discussions with circuit designers.
Equation formulation: To provide flexibility in
analysis modes as well as to assist a designer in model
development symbolic analysis tools should allow for
setting up circuit equations not only for linear circuits
in the frequency domain but also in the time domain for
both –linear and nonlinear– circuits and systems. For
modeling purposes and for better interpretability of expressions equation formulation should not be restricted
to special types of elements (conductances) or circuit
analysis representations (e.g. MNA).
Hierarchy: Since most analog circuits are designed
following a hierarchical approach a symbolic analysis
tool must allow for hierarchical circuit description in
terms of circuits, subcircuits and device models, and
must provide support for specification mapping and
propagation of parameters between hierarchy levels. In
addition circuit data representation must support the
parallel implementation of different abstraction levels
for a circuit block. Such partial abstractions and computations with mixed hierarchy levels are just as important for symbolic circuit analysis as for numerical
simulation. The underlying idea is to replace the surrounding circuitry by a simpler behavioral description
of its input/output characteristics while only the block
under test is simulated at the device level.
Device modeling: Careful modeling of devices is
one of the main prerequisites for successful application
of symbolic circuit analysis. Failure to choose simple
models generally results in extremely large expressions
which cannot be interpreted or even computed at all.
Depending on its individual function, each device in a
circuit should be modeled in the simplest possible way
whose impact on overall simulation accuracy is still tolerable. This requires application-specific and even instance-specific device modeling.
Determining the best compromise between model accuracy and expression complexity is often an iterative
process in which various models must be tried for a device until a satisfactory analysis result is obtained. Selecting and exchanging device models must therefore
be quick and easy, and should not involve tedious
netlist editing operations.
Data integration and interfaces: Circuit representation must fully integrate all symbolic and numerical
data which is necessary for model definition and expansion, parameter translation and propagation, symbolic
approximation, etc. Since symbolic methods are hardly
ever applied independently of numerical circuit simulation, simulation results, such as operating point data
and small-signal parameters, are always required as input for symbolic approximation routines. Moreover,
symbolic analysis results should always be verified
against numerical simulation so that processing simulator output data is an additional feature to reading in
netlists, model cards and operating-point information.
3. SYMBOLIC APPROXIMATION STRATEGIES
Practical application of symbolic analysis would
have been rather limited without application of symbolic approximation techniques. Indeed these techniques
hold the key in modern symbolic circuit analysis. A lot
of research has been done and reported in this area resulting in three different categories of approximation
strategies: Simplification after generation (SAG), Sim-
plification during generation (SDG), and Simplification
before generation (SBG).
One of the central prerequisites of the symbolic analysis flow presented in the next section was the development and implementation of efficient symbolic
approximation algorithms which impose no restrictions
on the formulation of circuit equations, neither linear
nor nonlinear, or the set of circuit elements that may be
used.
Equation-based approximation procedures own all
these requested properties since they are already applied on the level of circuit equations before the solution is determined (SBG). The philosophy behind
equation-based approximation is to follow the methodology of a circuit designer who introduces his simplifications already when formulating equations. Thus the
complexity of the problem and the mathematical effort
to solve or process the system is reduced substantially.
V\PEROLFHTV
GHVLJQSRLQW
UHFRPSXWH
FRPSXWH
WHUPUDQNLQJ
DFFXPXODWHGHUURU
VHOHFWQH[WWHUPV
UHFRPSXWHLQIOXHQFH
\HV
HUURUERXQG
FKDQJH
QR
\HV
HUURU
QR
RN"
UHPRYHWHUPV
VWRS
RILQIOXHQFHWRR
ODUJH"
6$*RSWLRQDO
Figure 1: Flow of equation-based approximation
Since this paper intends to give an overview of methodologies and results, only the underlying principle of
equation-based approximation is presented. Figure 1
shows a general flow chart of the algorithm.
Equation-based approximation starts with the system
of symbolic linear or nonlinear equations and a list of
corresponding numerical reference values called design
point.
Based on these numerical reference values the system of symbolic equations is evaluated and solved.
This information is subsequently used to generate a
term ranking. The term ranking mechanism plays a key
role in the algorithm. Its task is to compute an order of
all symbolic terms of the underlying equations such
that the terms are sorted with respect to their influence
on the solution. Ranking algorithms are an important
subject of research since a large variety of different circuit characteristics may be of interest which have to be
taken into account by the algorithm. For example in linear analysis magnitude, phase as well as pole and zero
locations are of interest while in nonlinear analysis DC
transfer, transient behavior, distortion, etc. are to be
captured by the approximated system.
In the next step the output of the ranking algorithm is
processed by the term removal mechanism which removes one or more terms from the system of symbolic
equations. Now this manipulated system with one or
more terms deleted is passed to the error checking routine. Here the accumulated numerical error caused by
the term removal is calculated and compared with the
given error bound. If the error bound is exceeded the
last term removal is undone and the algorithm terminates returning the approximated system. If the error
bound is not exceeded the next term or terms from the
term ranking list are selected and removed from the
system followed by the error checking procedure as already described before. There are several extensions to
the algorithm, e.g. symbolic simplification and elimination steps as well as more sophisticated term removal
operations, e.g. block removals of elements and to use
the error checking routine to control the term ranking [3].
VFKHPDWLFQHWOLVW
63,&(
$,FLUFXLWQHWOLVW
PRGHOV'3
H
J
Q
D
K
F
$,
VLPXODWLRQ
WHFKQR VHPLV\PEROLFDQDO\VLV
OLEV
H[WUDFWHIIHFWVRI
LQWHUHVW
FRUUHVSRQGHQFH"
\HV
QHWOLVW23$&
PRGHOSDUDPV
V
O
H
G
R
P
,
$
QR
V\PEROLFDSSUR[LPDWLRQ
QR
UHVXOWRN"
\HV
JHQHUDWH $,QHWOLVW
VXFFHVV
Figure 2: Symbolic analysis work flow
5. EXAMPLE: DERIVATION OF A
BEHAVIORAL MODEL OF A MULTIPLIER
CIRCUIT
4. SYMBOLIC ANALYSIS WORK FLOW
In this section a modeling strategy for the derivation of
approximated symbolic expressions for selected circuit
characteristics is presented. This strategy has already
successfully been applied to the derivation of industrial-sized linear circuits [2]. A particularly important aspect of this approach is the interaction between
symbolic and numerical computations (e.g. SPICE) to
ensure continuous error control and verification of the
results. The general flow (Figure 2) can be divided into
the following steps:
1. Start with a numerical SPICE simulation of the circuit under examination and make sure that the
effect of interest can be observed.
2. Focus on one task or effect of interest and use the
mathematically simplest analysis method (e.g. no
transient analysis for a small-signal effect)
3. Generate a symbolic netlist with numerical reference information for semi-symbolic analyses and
symbolic approximation techniques
4. Select the same set of device models for symbolic
analysis as for the preceding numerical analyses in
Step 3.
5. Ensure validity of netlist and models by comparing
semi-symbolic analysis results with the numerical
simulation.
6. Iteratively select simpler device models as long as
the deviation from the SPICE reference simulation
is tolerable. Check deviations by semi-symbolic
analysis without employing approximation methods.
7. Perform symbolic analysis using symbolic approximation, pole/zero extraction, etc. Always check
numerically evaluated results against the reference
simulation.
8. For any result (numeric and symbolic): Perform
plausibility check.
As an example a multiplier circuit (Figure 3) is analyzed according to the flow diagram using Analog Insydes. Symbolic analysis is applied to extract an
approximated formula which describes the nonlinear
DC transfer characteristic in terms of the circuit parameters. Following some excerpts from the whole procedure are presented.
7
Vout
R1 40k
R2 40k
+
-
R3 2Meg
9
8
R4 3Meg
3
E1
+
-
Q2
+
-
E
Q2N2221
1
VIN
Q1
5
Q2N2221
4
Q4
Q2N2221
Q5
Q2N2221
Q3
6
Q2N2221
+
VB1 -
Q6
Q2N2221
+
-
10
2
+
-
I1
Figure 3: Schematic of multiplier circuit
0
Steps 1-6: We start with a PSpice DC transfer analysis of the circuit yielding the characteric shown in Figure 6. Next all data, i.e. netlist, BJT parameters, and
simulation data are read into Analog Insydes. A semisymbolic analysis is performed using the full GummelPoon BJT model yielding a nonlinear system of 68
equations with 265 terms. The numerical solution of
these equations is identical to the PSpice simulation so
in step 6 the simplified Ebers-Moll BJT model is chosen yielding the 26 × 26 system of equations with 118
terms shown in Figure 4. Since a numerical simulation
shows again no deviation to the original PSpice simulation we proceed with step 7. The equation-based ap-
eliminated. Setting R 1 = R 2 = R yields a well-known
textbook relation [4]:
:I$BC$Q5@VinD + I$BE$Q5@VinD + I$Vin@VinD == 0,
I$BC$Q6@VinD + I$BE$Q6@VinD - I$Vin@VinD +
V$2@VinD - V$7@VinD
== 0,
R4
V$3@VinD - V$7@VinD
== 0,
I$BC$Q2@VinD + I$BC$Q3@VinD + I$BE$Q2@VinD + I$BE$Q3@VinD + I$E1@VinD +
R3
I$BC$Q1@VinD + I$BC$Q4@VinD + I$BE$Q1@VinD + I$BE$Q4@VinD - I$E1@VinD == 0,
-I$BC$Q5@VinD - I$BE$Q1@VinD - I$BE$Q2@VinD == 0,
- V$2@VinD + V$7@VinD
-I$BC$Q6@VinD - I$BE$Q3@VinD - I$BE$Q4@VinD == 0, I$VB1@VinD +
+
R4
- V$3@VinD + V$7@VinD V$7@VinD - V$8@VinD V$7@VinD - V$9@VinD
+
+
== 0,
R3
R1
R2
- V$7@VinD + V$8@VinD
-I$BC$Q2@VinD - I$BC$Q4@VinD +
== 0,
R1
@
-
D+
@
Vi n ⁄ VT
D
i
k
V$1@VinD-V$10@VinD y
Vt
Is +
{
2
According to step 7 and 8 all results should be verified against the original simulation result. Figure 6
shows the quality of the results. In addition, the square2
2
law multiplier relation I 1 RVin ⁄ ( 4V T ) found in textbooks (which is a second order Taylor series of the
tanh-relation) [4] is added to the plot for reference.
V$7 Vin V$9 Vin
-I$BC$Q1@VinD - I$BC$Q3@VinD +
== 0, - I$BE$Q5@VinD - I$BE$Q6@VinD == -I1,
R2
E1 H-V$1@VinD + V$2@VinDL + V$3@VinD - V$4@VinD == 0, V$1@VinD - V$2@VinD == Vin, V$7@VinD == VB1,
I$BC$Q5@VinD == - - 1 + E
2
(e
– 1)
Vin
Vout = I 1 R --------------------------------2- = I 1 R tanh  ---------
Vin ⁄ V T
 2V T
(e
+ 1)
V$1@VinD-V$5@VinD y
i
Vt
H1 + BrL - 1 + E
Is
{ ,
k
Br
V$1@VinD-V$10@VinD y
i
Vt
H1 + BfL -1 + E
Is
-V$5@VinD y
{ - i- 1 + E V$1@VinDVt
k
I$BE$Q5@VinD ==
Is,
Bf
k
{
V$3
@
Vin
D
V$8@VinD y
i
Vt
H1 + BrL - 1 + E
Is
V$3@VinD-V$5@VinD y
i
{ ,
k
Vt
I$BC$Q2@VinD == - - 1 + E
Is +
Br
k
{
V$3
@
Vin
D
V$5
@
Vin
D
y
i
Vt
H1 + BfL -1 + E
Is
V$3@VinD-V$8@VinD y
i
{
k
Vt
I$BE$Q2@VinD ==
- -1 + E
Is,
Bf
k
{
V$4@VinD-V$9@VinD y
i
Vt
H1 + BrL - 1 + E
Is
V$4
@
Vin
D
V$5
@
Vin
D
i
y
{ ,
k
Vt
I$BC$Q1@VinD == - - 1 + E
Is +
Br
k
{
V$4@VinD-V$5@VinD y
Vt
H1 + BfL i-1 + E
Is
V$4@VinD-V$9@VinD y
i
{
k
Vt
I$BE$Q1@VinD ==
- -1 + E
Is,
Bf
k
{
-V$8@VinD y
i- 1 + E V$4@VinDVt
H
1
+
Br
L
Is
V$4@VinD-V$6@VinD y
i
{ ,
k
Vt
I$BC$Q4@VinD == - - 1 + E
Is +
Br
k
{
V$4@VinD-V$6@VinD y
Vt
H1 + BfL i-1 + E
Is
V$4@VinD-V$8@VinD y
i
{
k
Vt
I$BE$Q4@VinD ==
- -1 + E
Is,
Bf
k
{
V$3@VinD-V$9@VinD y
i
Vt
H1 + BrL - 1 + E
Is
V$3
@
Vin
D
V$6
@
Vin
D
i
y
{ ,
k
Vt
I$BC$Q3@VinD == - - 1 + E
Is +
Br
k
{
V$3@VinD-V$6@VinD y
Vt
H1 + BfL i-1 + E
Is
V$3@VinD-V$9@VinD y
i
{
k
Vt
I$BE$Q3@VinD ==
- -1 + E
Is,
Bf
k
{
-V$6@VinD y
i- 1 + E V$2@VinDVt
H
1
+
Br
L
Is
-V$10@VinD+V$2@VinD y
i
{ ,
k
Vt
I$BC$Q6@VinD == - - 1 + E
Is +
Br
k
{
-V$10@VinD+V$2@VinD y
Vt
H1 + BfL i-1 + E
Is
V$2@VinD-V$6@VinD y
i
{
k
Vt
I$BE$Q6@VinD ==
- -1 + E
Is,
Bf
k
{
V$8@VinD - V$9@VinD + V$OUT@VinD == 0>
VOUT
8
Vin 2
I 1 R --------24V T
6
Analog Insydes
behavioral model
4
2
original PSpice simulation
VIN
0.02
0.04
0.06
0.08
0.1
Figure 6: Comparison of DC transfer results
6. CONCLUSIONS
igure 4: Circuit equations with Ebers-Moll BJT mode An example has been presented which shows how symbolic circuit analysis tools and computer algebra can be
proximation routine implemented in Analog Insydes
applied to solve even nonlinear circuit modeling and
performs several approximation steps (i.e. term deledesign tasks. Compact and interpretable analytical fortion) in combination with algebraic simplification opermulas for the DC transfer characteristic of the given
ations [3]. The resulting approximated symbolic system
circuit have been derived which were obtained by a
which is shown in Figure 5 consists of 28 terms in 6 restraightforward application of symbolic techniques
maining equations which is a significant reduction of
without any specific knowledge of the circuit.
the mathematical complexity.
7. ACKNOWLEDGMENTS
E
E
Is E
Is VB1 Vin V$1@VinD
Is
:
V$1@VinD - V$10@VinD
Vt
Vt
- Vin+ V$1@VinD - V$10@VinD
Vt
Vt
Vt
+
Bf
Vin + V$4@VinD - V$5@VinD
Vt
Vt
E Vt
V$1@VinD - V$10@VinD
Vt
Vt
Is
E
+
Bf
E
Is - E
V$4@VinD - V$5@VinD
Vt
Vt
-
Bf
V$4@VinD - V$6@VinD
Vt
Vt
-
R4
+
==
R4
Vin + V$4@VinD - V$6@VinD
Vt
Vt
Is
E Vt
+
Bf
V$4@VinD - V$5@VinD
Vt
Vt
R4
-
Bf
Vin + V$4@VinD - V$5@VinD
Vt
Vt
Is - E Vt
Is
0,
+
Bf
VB1
R3
+
Vin
R3
+
V$4@VinD
R3
==
0,
Is == 0,
V$4@VinD - V$6@VinD
Vin V$1@VinD - V$10@VinD
Vin + V$4@VinD - V$6@VinD
Vt
Vt
Vt
Vt
Vt
Is - E Vt
Is - E Vt
Is == 0,
V$1@VinD - V$10@VinD
Vin+ V$4@VinD - V$5@VinD
- Vin + V$1@VinD - V$10@VinD
Vt
Vt
Vt
Vt
Vt
Vt
Is - E Vt
Is == 0, - E Vt
+
E Vt
I1 - E
E
V$4@VinD - V$6@VinD
Vt
Vt
Is R1 + E
V$4@VinD - V$5@VinD
Vt
Vt
Vin + V$4@VinD - V$6@VinD
Vt
Vt
Is R2 + E Vt
Is R1 -
Is R2 + V$OUT@VinD
==
0>
Figure 5: Result of equation-based approximation
In a few postprocessing steps this system can be further reduced by algebraic elimination of variables to
only one equation yielding an explicit result for the output variable Vout (note that algebraic elimination is a
mathematical exact operation):
2Vin ⁄ V T
This work has been carried out within the MEDEA
project A409 “Systematic Analog Design Environment” (SADE).
Vin ⁄ V T
8. REFERENCES
[1]
[2]
– 2R 2 e
)
I1 ( R 1 + R 1 e
Vout = -----------------------------------------------------------------------------Vin ⁄ V T 2
(1 + e
)
[3]
Note also that by these exact algebraic manipulations
also the dependency of the BJT parameters Is and Bf is
[4]
E. Hennig, T. Halfmann, Analog Insydes Tutorial,
ITWM, Kaiserslautern, Germany, 1998
R. Sommer, M. Thole, E. Hennig, “A Generic Circuit
Modeling Strategy Combining Symbolic and Numeric
Analysis”, Proc. 5th International Workshop on Symbolic Methods and Applications in Circuit Design
(SMACD’98), Kaiserslautern, Oct. 1998
T. Wichmann, R. Popp, W. Hartong, L. Hedrich, "On
the Simplification of Nonlinear DAE Systems in Analog
Circuit Design", Proc. CASC’99, Munich, Germany,
1999
R. Köstner, A. Möschwitzer, Elektronische Schaltungstechnik, Hüthig Verlag, Heidelberg, Germany, 1987