Journal of Power Electronics, to be published
1
Topologies of Active-Switched Quasi-Z-Source
Inverters with High-Boost Capability
Anh-Vu Ho *, and Tae-Won Chun **†
*
**†
School of Engineering, Eastern International University, Vietnam
Department of Electrical Engineering, University of Ulsan, Ulsan, Korea
Abstract
This paper proposes both the active-switched quasi-Z-source inverter (AS-qZSI) and the extended active- switched qZSI
(EAS-qZSI) topologies, which are based on the classical qZSI. The proposed AS-qZSI adds only one switching device and diode
to the classical qZSI for increasing the voltage boost factor. In comparison to the other topologies based on the
switched-inductor/capacitor qZSI, the proposed AS-qZSI requires fewer passive components in the impedance network under the
same boost factor. Additionally, the proposed EAS-qZSI designed by adding one inductor and three diodes to the AS-qZSI
provides higher boost capability and achieves lower voltage stress across the switching devices. The performances of two
proposed topologies are verified with the experimental results obtained from a laboratory prototype based on 32-bit DSP.
Key words: Active switch, Quasi-Z-source inverters, Switched inductor, Voltage boost capability
I.
INTRODUCTION
A traditional PWM inverter can perform voltage
step-down operation with its peak ac output voltage lower
than the dc input voltage, and so an extra dc-dc boost
converter is connected between the dc input voltage and the
inverter in order to obtain a higher ac output voltage. In order
to overcome the constraints of a traditional inverter, a
quasi-Z-source inverter (qZSI) was introduced [1]. The qZSI
can boost the dc voltage by using the shoot-through state of
the inverter bridge and draw continuous input current without
an extra filtering capacitor. It is suitable for some renewable
power applications and fuel-cell vehicles due to its voltage
boost capability in a single power stage [2]-[5]. However,
because the shoot-through state can only be controlled within
a zero state, the practical boost factor of qZSI is usually
limited. This may constraint further applications of the qZSI
in the renewable power generation with low-voltage energy
sources such as photovoltaic (PV) arrays and fuel-cell stacks,
which require the power converter with high voltage gain.
Recently, some dc-dc conversion techniques based on the
ability. In [6]-[10], the switched-inductor (SL) / switchedcapacitor (SC) by adding extra inductors/capacitors and
diodes in the quasi-Z-source impedance network, and hybrid
SC/SL combined with the classical qZSI topology are
proposed. To improve the boost ability more, the additional
cells are cascaded at the qZSI [11], [12]. However, more
inductors and/or capacitors at the impedance network are
needed for further boosting the voltage, and they increase the
power circuit volume and cost. The ZSI topology is proposed
for reducing the capacitor voltage stress and suppressing rush
current at start-up [13]. The topology to add one switching
device and diode to a classical qZSI is proposed in [14]. The
number of passive components in the impedance network can
be reduced, but the boost factor may be not enough at the
renewable power generation
In this paper, two types of topologies named an
active-switched qZSI (AS-qZSI) and an extended activeswitched qZSI (EAS-qZSI) are proposed. The proposed
topologies offer high boost capability and low voltage stress
across the switching devices. The operation principles and
comparison with other topologies based on the switched
inductor/capacitor qZSI reveal the advantages of the
proposed topologies, which are validated by the simulation
and experimental results.
II.
qZSI have been proposed in order to enhance the boosting
REVIEW OF CLASSICAL QZSI AND MODIFIED
TOPOLOGIES
2 Journal of Power Electronics, to be published
Fig. 1(c) shows a continuous-current diode-assisted
extended-boost qZSI (DA-qZSI) proposed in [6]. It can be
extended to have very high boost ability by cascading more
stages. The boost factors of the DA-qZSI can be derived as
B
(a)
1
1 3 D  2 D 2
.
(3)
III. OPERATION PRINCIPLES OF THE PROPOSED
TOPOLOGIES
The operation principles for the two types of proposed
topologies such as AS-qZSI and EAS-qZSI will be described,
respectively.
(b)
A. Operation of AS-qZSI
(c)
Fig. 1. Basic qZSI and modified topologies: (a) classical
qZSI, (b) switched-inductor qZSI (SL-qZSI), (c) continuouscurrent diode-assisted extended boost qZSI (DA-qZSI).
Both the classical qZSI and modified topologies with
continuous input current are shown in Fig. 1. Fig. 1(a) shows
the classical qZSI, which ensures continuous input current as
well as lower capacitor voltage stress [1]. The boost factor,
defined as the ratio between the peak dc-link voltage across
the inverter bridge v̂ pn and the dc input voltage Vin, is
expressed as
B
vˆ pn
Vin
1
1


1 2(Tsh / Ts ) 1 2 D
B
1  2D  D 2
.
v L1  Vc 2  Vin
(4)
v L 2  Vc1
(5)
v pn  0
(6)
(1)
where Tsh is the shoot-through time during switching period
Ts, and D = Tsh / Ts is the shoot-through duty ratio.
Fig. 1(b) shows a modified topology based on qZSI called
a switched-inductor quasi-ZSI (SL-qZSI), which was
proposed in [8]. The impedance network in the SL-qZSI adds
three diodes and one inductor to the classical qZSI. The
SL-qZSI has a switched-inductor structure for increasing the
boost factor and suppressing inrush current, and its boost
factor can be derived as
1 D
Fig. 2 shows the proposed AS-qZSI, in which one active
switch (S7) and diode (D0) are added to the classical qZSI.
The proposed AS-qZSI has an extra shoot-through state
besides the six active states and two zero states, which are
similar to the classical qZSI. Therefore, it has two operation
modes: shoot-through state and non-shoot-through state. Fig.
3 shows the equivalent circuits of the AS-qZSI in the
shoot-through state and non-shoot-through state, respectively.
Shoot-through state: In the shoot-through state for an
interval of DTs, the load terminal is shorted by conducting the
upper and lower switching devices of any phase legs, and the
switching device S7 is turned on. The diodes Do and D1 are in
blocking state. The two capacitors C1 and C2 discharge, and
two inductors L1 and L2 get charged during this state. From
Fig. 3(a), the two inductor voltages vL1 and vL2, and dc-link
voltage vpn can be expressed as follows, respectively:
(2)
Non-shoot-through state: In non-shoot-through state for an
interval of (1-D)Ts, the circuit operates under the traditional
PWM inverter, and the switching device S7 is turned off. The
diodes Do and D1 are conducting. The energy stored at two
inductors is transfer to two capacitors and load side. Thus,
two inductors get discharged. From Fig. 3(b), the two
inductor voltages vL1 and vL2, and dc-link voltage vpn can be
expressed as follows, respectively:
v L1  Vc 2  Vc1  Vin
(7)
v L 2  Vc 2
(8)
Journal of Power Electronics, to be published 3
Fig. 4. Schematic circuit of proposed EAS-qZSI.
Fig. 2. Schematic circuit of proposed AS-qZSI.
(a)
(b)
Fig. 3. Equivalent circuits of proposed AS-qZSI: (a) shootthrough state, (b) non-shoot-through state.
v pn  Vc1
(9)
Using the principle that average voltage across each
inductor L1 and L2 from (4), (5), (7), and (8) over one
switching period Ts is zero, two capacitor voltages Vc1 and Vc2
can be derived as a function of the shoot-through duty ratio,
respectively.
Vc1 
Vc 2 
1 D
1  3D  D 2
D
1  3D  D 2
Vin
Vin
(10)
(11)
Because the peak dc-link voltage v̂ pn and the capacitor
voltage Vc1 are the same, a boost factor of the inverter can be
derived as
B
vˆ pn
Vin

(a)
Vc1
1 D
.

Vin 1  3D  D 2
(12)
(b)
Fig. 5. Equivalent circuits of proposed EAS-qZSI: (a)
shoot-through state, (b) non-shoot-through state.
interval of DTs, the load terminal is shorted by conducting the
upper and lower switching devices of any phase legs, and the
switching device S7 is turned on as in the AS-qZSI. The
diodes D2 and D3 are in conducting state, whereas the diodes
Do, D1, D4 are in blocking state. Two inductors L2 and L3 are
connected in parallel, and they store energy from the
capacitor C1. The inductor L1 stores the energy from both the
capacitor C2 and the dc input voltage Vin. Therefore, the two
capacitors C1 and C2 discharge, and three inductors L1, L2, L3
get charged during this state. From Fig. 5(a), the three
inductor voltages vL1, vL2, vL3, dc-link voltage vpn, and
capacitor current ic1 can be expressed as follows, respectively:
B. Operation of EAS-qZSI
v L1  Vc 2  Vin
(13)
Fig. 4 shows the proposed EAS-qZSI, in which one
inductor (L3) and three diodes (D2, D3, D4) are added to the
AS-qZSI, in order to enhance a boost capability more. It has
two operation modes: shoot-through state and non-shootthrough state like the AS-qZSI. Fig. 5 shows the equivalent
circuits of the EAS-qZSI at the shoot-through state and
non-shoot- through state, respectively.
Shoot-through state: In the shoot-through state for an
v L2  v L3  Vc1
(14)
v pn  0
(15)
ic1  (iL2  iL3 )
(16)
Non-shoot-through state: In non-shoot-through state for an
interval of (1-D)Ts, the circuit operates under the traditional
PWM inverter, and the switching device S7 is turned off. The
4 Journal of Power Electronics, to be published
diodes Do, D1, D4 are in conducting state, whereas the diodes
D2 and D3 are in blocking state. Two inductors L2 and L3 are
connected in serial, and the energy stored at three inductors is
supplied to two capacitors and load side. Thus, three
inductors get discharged and two capacitors charge. From Fig.
5(b), the three inductor voltages, dc-link voltage, and
capacitor current can be expressed as follows, respectively:
v L1  Vc2  Vc1  Vin
(17)
v L2  Vc2  v L3
(18)
v pn  Vc1
(19)
ic1  iL1  I o
(20)
Assuming L2 = L3, we have vL2 = vL3 and iL2 = iL3. Using the
principle that average voltage across each inductor L1 and L2
from (13), (14), (17), and (18) over one switching period Ts is
zero, two capacitor voltages Vc1 and Vc2 can be derived as a
function of the shoot-through duty ratio, respectively.
Vc1 
1 D
(21)
Vin
1 4 D  D 2
2D
2D
Vin 
Vin

1 D
1 4 D  D 2
Vc2
(22)
Similarly, using the principle that the average current of
capacitor C1 from (16) and (20) over one switching period Ts
is zero, the average of the inductor currents can be derived as
(1 D)2
Io
1 4 D  D 2
1 D
 iL3 
Io .
1 4 D  D 2
iL1 
iL2
(24)
Vin

G

v ph
Vin / 2
 M B
(27)
Effects of capacitor voltage due to current ripples: The
effects of the capacitor voltage Vc1 for capacitor current
variations are analyzed. Fig. 6 shows the equivalent circuit of
the capacitor C1 by considering the equivalent series
resistance (ESR), and the capacitor voltage ripple generated
by the capacitor current variations during the half of a
switching period [17].
From (23) and (24), the capacitor voltage ripple can be
expressed as (28). It is dependent on the shoot-through duty
ratio, switching period, load current, capacitance, and ESR in
the capacitor.
Vc1  ESR1 ic1  Vc'1  ESR1 ic1 
ic1  2iL2 
DTs
ic1
2C1
(28)
2
Io ,
1 4 D  D 2
2(1 D )
Io .
1 4 D  D 2
C. PWM Techniques
Vc1
1 D

.
Vin 1  4 D  D 2
(25)

The peak phase voltage of the inverter v ph is expressed by
vˆ pn
V

v ph  M 
 M  B  in
2
2
(c)
Fig. 6. Effects of capacitor voltage: (a) equivalent circuit of
capacitor C1, (b) capacitor current, (c) capacitor voltage ripple.
where ic1  (iL1  I o )  2iL2 
capacitor voltage Vc1, a boost factor of EAS-qZSI can be
derived as
vˆ pn
(b)
(23)
Because the peak dc-link voltage v̂ pn is the same as the
B
(a)
(26)
where M is a modulation index.
From (26), an ac voltage gain G can be defined and be
derived as follows:
A PWM control technique for the proposed topologies is
modified to effectively adjust the shoot-through state during
one switching period, in order to boost the dc-link voltage.
The relationship between M and B (or D) from (27) is
determined on the PWM control techniques. Three PWM
techniques based on carrier-based PWM such as simple,
maximum, and constant boost control methods are introduced
in [1], [15], and [16]. Because a simple control method has a
constant shoot-through time during one switching period, the
voltage stress across the switching devices is relatively high.
In a maximum boost control method, all of zero states are
assigned as shoot-through state [15]. Although a maximum of
Journal of Power Electronics, to be published 5
Fig. 9. Comparison of boost factors.
TABLE I
Fig. 7. Modulation under constant boost control method.
NUMBER OF COMPONENTS AT IMPEDANCE NETWORK
AS-qZSI
2
2
Switching
devices
1
EAS-qZSI
3
2
1
5
Topologies
Fig. 8. Circuit for generating the gating signal of S7.
voltage boost at the given modulation index can be achieved,
the shoot-through duty ratio has a low-frequency ripple
component.
In order to remove the ripple in a shoot-through duty ratio
and obtain a higher boost capability, the constant boost
control method introduced by [16] is used at the proposed
topologies. The pulse width modulation under the constant
boost control method is shown in Fig. 7. The shoot-through
time is adjusted by two shoot-through envelope signals Vp
and Vn, and a third harmonic voltage with 1/6th of the
fundamental frequency is injected into the three-phase
reference voltages Va*, Vb*, and Vc*. When the carrier signal is
higher than the upper shoot-through envelope Vp or lower
than the lower shoot-through envelope Vn, the inverter
operates in the shoot-through state. The switching device S7 is
turned on during the shoot-through state, and the circuit for
generating the gating signal of S7 is shown in Fig. 8.
The modulation index M can be increased from 1 to
2 / 3 by the constant boost control method. The obtainable
modulation index M is limited to
M 
2
3
(1  D) .
(29)
IV. COMPARISON OF AS-QZSI AND EAS-QZSI
WITH OTHER TOPOLOGIES
This section describes a detailed comparison analysis of
the boost factor, number of components in the impedance
network, and the voltage stress of switching devices between
Inductors
Capacitors
Diodes
2
qZSI
2
2
0
1
SL-qZSI
3
2
0
4
DA-qZSI
3
3
0
3
the proposed topologies and the other topologies.
A. Boost Factor
Fig. 9 shows the boost factors of the classical qZSI,
SL-qZSI, DA-qZSI, AS-qZSI, and EAS-qZSI, in order to
compare the voltage boost capability by using (1), (2), (3),
(12), and (25). The boost factor of proposed AS-qZSI
topology is much higher than that of the classical qZSI, and it
is lower or higher than the boost factors of both the SL-qZSI
and DA-qZSI according to shoot-through duty ratio range.
Therefore, a voltage boost capability of proposed AS-qZSI
topology is nearly the same as that of both topologies. It can
be see that the EAS-qZSI has the highest boost factor among
five topologies.
B. Comparison of Number of Components
Table I shows a comparison of the number of components
used at the impedance network of the AS-qZSI, EAS-qZSI,
classical qZSI, SL-qZSI, and DA-qZSI without considering
the inverter bridge and output LC filter. Comparing with
SL-qZSI, the AS-qZSI can save one inductor and two diodes,
although it needs an extra one switching device, and the
EAS-qZSI requires additional one diode and one switching
device.
C. Voltage Stress Across Switching Devices
The voltage stress across the switching devices of the
inverter Vs is identical to the peak dc-link voltage across the
6 Journal of Power Electronics, to be published
TABLE II
PARAMETERS USED AT SIMULATION AND EXPERIMENT
Parameters
Fig. 10. Comparison of voltage stress ratios.
Value
DC input voltage , Vin
40 V
Inverter frequency, f
60 Hz
Switching frequency, fs
5 kHz
Capacitor (ESR), C1 = C2
1000 μF (65 m)
Inductor, L1 = L2 = L3
1 mH
Output LC filter, Lf
0.6 mH
Output LC filter, Cf
100 μF
inverter bridge. In order to compare properly the voltage
stress for five topologies, equivalent dc voltage concept is
introduced [18]. The equivalent dc voltage is defined as the
minimum dc voltage to produce an output voltage. The ratio
of the voltage stress across the switching devices to the
minimum dc voltage is defined as Vs / (GVin). Substituting
(29) and boost factors of each topology B into (27), the
voltage stress across the switching devices for five topologies
are given by
Vs
3G  1 for classical qZSI

GVin
G
(30)
Vs
(4  2 3G )(4  24G 2  16 3G  16 )
for SL-qZSI

GVin G[(4  2 3G ) 2  2(4  2 3G )( A1)  ( A1) 2 ]
Vs
(3 3G ) 2
for DA-qZSI

GVin G[(4 3G ) 2  12 3G ( A2 )  2( A2 ) 2 ]
(a)
Vs
( A3  3G )(2 3G  4)

GVin G[(2 3G  4)(8  7 3G  3 A3 )  (3 3G  4  A3 ) 2 ]
for AS-qZSI
Vs
( A4  2 3G )(2 3G  4)

GVin G[(2 3G  4)(12  14 3G  4 A4 )  (4 3G  4  A4 ) 2 ]
for EAS-qZSI
where A1  2 3G  24G 2  16 3G  16 ,
A2  3 3G  2  3G 2  4 3G  4 , A3  15G 2  8 3G
A4  36G 2  16 3G .
Fig. 10 shows the voltage stress ratios of five topologies
with a variation of the ac voltage gain G. The classical qZSI
has the highest voltage stress of switching devices. The
voltage stress of the proposed AS-qZSI is slightly higher or
lower than that of both the SL-qZSI and DA-qZSI according
to value of the ac voltage gain. The proposed EAS-qZSI has
the lowest voltage stress ratio.
V.
SIMULATION AND EXPERIMENTAL RESULTS
(b)
Fig. 11. Simulation result of AS-qZSI at M = 0.76 and D =
0.34: (a) output voltage and current, capacitor and dc input
voltages, and dc-link voltage, (b) inductor currents, dc-link
voltage, and gating signal of S7.
Journal of Power Electronics, to be published 7
(a)
(a)
(b)
Fig. 13. Photographs of laboratory prototype: (a) AS-qZSI,
(b) EAS-qZSI.
(b)
Fig. 12. Simulation result of EAS-qZSI at M = 0.88 and D =
0.237: (a) output voltage and current, capacitor and dc input
voltages, and dc-link voltage, (b) inductor currents, dc-link
voltage, and gating signal of S7.
A. Simulation results
To verify the aforementioned theoretical analysis of the
proposed topologies, the simulation studies are performed
with the PSIM program. In the simulation, all components are
ideal, and a three-phase resistive load of 100 Ω is used. The
parameters of power circuit used at the simulation and
experiment are shown in Table II.
Fig. 11 shows the simulation results of the AS-qZSI under
constant boost control when M = 0.76 and D = 0.34. From
Fig. 11(a), the capacitor voltage Vc1 is boosted to 280 V from
40 V dc input voltage, and the filtered line-to-line voltage of
130 Vrms can be produced. Fig. 11(b) shows the waveforms of
two inductor currents, dc-link voltage, and the gating signal
of switching device S7. In the shoot-through state, two
inductor currents increase, and the dc-link voltage is zero. In
the non-shoot-through state, two inductor currents decrease
and dc-link voltage is identical to the capacitor voltage Vc1 of
280 V.
Fig. 12 shows the simulation results of the EAS-qZSI
under constant boost control when M = 0.88 and D = 0.237.
From Fig. 12(a), the dc-link voltage capacitor is boosted to
280 V and the rms value of line-to-line voltage of 150 V can
be obtained.
B.
Experimental Results
Fig. 13 shows the photographs of prototype of both the
AS-qZSI and EAS-qZSI built in the laboratory for
experiment, which consists of impedance network,
three-phase inverter, LC filter, and control board. The control
system is implemented by a 32-bit DSP type TMS320F28335,
and the sampling period for controlling the proposed inverter
at the DSP is 100 sec. The switching frequency of the
inverter is determined on 5 kHz, because the shoot-through
duty ratio is controlled twice during one switching period Ts
as shown in Fig. 7. An LC filter is used for filtering the
output voltage and current. The parameters of LC filter are
described in Table II. The experiment is performed at the
same parameters and operating conditions in the simulation.
Fig. 14 shows the experimental results of the AS-qZSI
when M = 0.76 and D = 0.34, which are the same operating
8 Journal of Power Electronics, to be published
(a)
(a)
(b)
Fig. 14. Experimental results of AS-qZSI at M = 0.76 and D
= 0.34: (a) ac output voltage, capacitor and dc input voltages,
(b) inductor currents, dc-link voltage, and S7 signal.
conditions as for simulation results shown in Fig. 11. Fig.
14(a) shows the experimental waveforms of the line-to-line
voltage, the line-to-line voltage filtered by an LC filter,
capacitor voltage Vc1, and dc input voltage. The capacitor
voltage is boosted to 275 V, which is slightly lower than the
capacitor voltage in the simulation result due to both the
forward voltage drop on the diodes and the parasitic
resistance in the inductors.
The rms value of line-to-line voltage is 126 V, which is
also slightly lower than the simulation result. Fig. 14(b)
shows the experimental waveforms of the inductor and input
currents, dc-link voltage, and gating signal of switching
device S7.
Fig. 15 shows the experimental results for the EAS-qZSI
when M = 0.88 and D = 0.237, which are the same operating
conditions as for simulation results shown in Fig. 12. As
shown in Fig. 15(a), the capacitor voltage Vc1 of EAS-qZSI is
nearly the same as that of AS-qZSI although the
shoot-through duty ratio decreases from 0.34 to 0.237. Fig.
15(b) shows the two-phase output voltages and currents
filtered by the LC filter. The ac output voltage of about 148
Vrms can be generated, and the phase current lags to
line-to-line voltage by 30 at a resistive load condition. Fig.
15(c) shows the experimental waveforms of the inductor and
input currents, dc-link voltage, and gating signal of switching
device S7. The inductor current ripples are lower than those of
(b)
(c)
(d)
Fig. 15. Experimental results of EAS-qZSI at M = 0.88 and D
= 0.237: (a) ac output voltage, capacitor voltages, and dc input
voltage, (b) ac output voltages and currents filtered by LC
filter, (c) inductor currents, dc-link voltage, and S7 signal, (d)
dc-link and capacitor currents, and capacitor voltage ripple.
Journal of Power Electronics, to be published 9
ACKNOWLEDGMENT
This work was supported by the 2015 Research Fund of
University of Ulsan.
REFERENCES
[1]
[2]
Fig. 16. Efficiency of EAS-qZSI and AS-qZSI.
the AS-qZSI under the same peak dc-link voltage. It can be
seen that the experimental results are almost consistent with
theoretical analysis and simulation results. Fig. 15(d) shows
the capacitor voltage ripple of 3.5V generated by the
capacitor current variation. The capacitor voltage changes
rapidly at the transition from non-shoot-through state to
shoot-through state due to the ESR in the capacitor, and the
capacitor voltage ripple component is only 1.27% to the
capacitor voltage.
Fig. 16 shows the efficiency of the proposed AS-qZSI and
EAS-qZSI. The efficiency of the EAS-qZSI is lower than that
of the AS-qZSI, because the EAS-qZSI has two more diodes.
VI. CONCLUSIONS
This paper proposed two types of novel topologies based
on the qZSI such as AS-qZSI and EAS-qZSI. In comparison
to classical qZSI and DA-qZSI, the proposed AS-qZSI
provides a higher boost capability and lower voltage stress
across the switching devices of the inverter by adding only
one switching device and diode in the qZ-source impedance
network. The boost capability and the voltage stress of
AS-qZSI are similar with those of the SL-qZSI. But, the
volume and weight of the power converter can be reduced by
saving one inductor and two diodes in the impedance network,
although an extra one switching device is required. The
proposed EAS-qZSI offers much higher boost factor and
lower voltage stress across the switching devices.
Through experimental results, the dc-link voltage of both
proposed topologies can be boosted seven times with respect
to the dc input voltage. The AS-qZSI generates the lineto-line voltage of 126 Vrms, and the line-to-line voltage of
EAS-qZSI can be increased by 15% to the AS-qZSI under the
same boost factor. The efficiency of the EAS-qZSI is lower
than that of the AS-qZSI, because the EAS-qZSI has two
more diodes. The proposed topologies are applicable for the
renewable power generation with low-voltage energy sources
such as PV arrays and fuel-cell stacks.
[3]
[4]
[5]
[6]
[7]
[8]
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Anh-Vu Ho was born in Vietnam in 1981.
He received the B. S. and M.S. degrees in
electrical engineering from the HoChiMinh
City University of Technical Education,
Vietnam, in 2005 and 2009, respectively. He
received the Ph. D. degree in electrical
engineering at Ulsan University, Korea in
2015. He is a lecturer with the school of
engineering, Eastern International University,
Vietnam. His current research interests include power
converter/inverter, power quality, and renewable energy system.
Tae-Won Chun was born in Korea in 1959.
He received the B.S. degree in Electrical
Engineering from Pusan National University
in 1981, and received the M.S. and Ph.D.
degrees in Electrical Engineering from Seoul
National University in 1983 and 1987,
respectively. Since 1986, he has been a
member of the faculty of the Department of
Electrical Engineering, Ulsan University, where he is currently a
full Professor. He was with the Department of Electrical and
Computer Engineering, University of Tennessee, USA as a
visiting scholar. From 2005 to 2006, he also served as a visiting
scholar with the Department of Electrical and Computer
Engineering, Virginia Polytechnic Institute and State University,
USA. His current research interests are the grid-connected
inverter system and ac motor control.