IEEE TRANSACTIONS ON COMPONENTS, HYBRIDS, AND MANUFACTURING TECHNOLOGY, VOL. 16, NO. 5, AUGUST 1993
536
A Hybrid Silicon Carbide Differential
Amplifier for 35OOC Operation
Miro Tomana, R. Wayne Johnson, Member, IEEE, Richard C. Jaeger, Fellow, IEEE, and William C. Dillard
Abstruct- An operational amplifier has been designed, fabricated, and tested at 350°C using silicon carbide MESFET pairs
and thick film hybrid technology. The amplifier was successfully
tested over the temperature range of 25-350°C. The gain of the
amplifier was greater than 60 dB, the common-mode rejection
ratio was greater than 55 dB, and the offset voltage varied from
139 to 159 mV over the entire temperature range. The results
demonstratethe feasibility of high temperature circuit design and
assembly using silicon carbide MESFET's and thick film hybrid
technology.
TABLE I
PROPERTIES
OF SEMICONDUCTOR
MATERIAIS
Bandgap (eV @27OC)
Thermal Conductivity
(W/cm"C 027OC)
Saturated Electron Drift
Velocity (V/cm)
Breakdown Electric Field
(V/cm)
Dielectric Constant
6H-Sic
2.86
Si
1.12
GaAs
1.43
5.0
1.5
0.5
2.0 x
io7
1.0 x
40 x
io5
3x
10.0
io7
io5
11.8
2.0 x
3x
io7
io5
12.8
I. INTRODUCTION
A
PPLICATIONS for high temperature electronics (175600OC) include instrumentation for jet aircraft engines,
nuclear reactors, geothermal wells, automotive underhood electronics, and space based power systems, Silicon devices are
typically only rated for maximum operating junction temperatures of 125-150°C with some power bipolar transistors
derated to zero power at 200OC. However, researchers [1]-[4]
have characterized silicon devices at temperatures of 2OOOC
and above, and while device performance degrades at elevated
temperatures, functional circuits can be designed. Using both
dielectric isolation and bonded wafer technology, operable silicon monolithic operational amplifiers have been demonstrated
at 3OOOC [5].
A more suitable substrate for high temperature applications
is 6H-Silicon Carbide. 6H-Sic has a bandgap of 2.86 eV and a
theoretical maximum operating temperature over 1200OC. This
far exceeds the potential of silicon which has a bandgap of 1.12
eV and becomes intrinsic in the 300-350°C temperature range
depending on the doping level. Table I [6] compares properties
of 6H-Sic with Si and GaAs. In addition to higher operating
temperature, the higher electric field strength and thermal
conductivity of 6H-Sic are advantages in analog power and
switching applications.
In this research, an operational amplifier has been fabricated
for operation to 350°C with developmental, discrete MESFET
pairs fabricated by Cree Research using 6H-Sic [7]. 6H-Sic
MESFET pairs were characterized as a function of temperature
over the range from 25 to 350OC. Device parameters were
extracted for use in SPICE models to simulate the operation of
the differential amplifier. Design objectives were to maximize
Manuscript received January 26,1993; revised April 6,1993. This work was
supported by the National Aeronautics and Space Administration under Grant
NAGW-1192-CCDS-AL and by the Center for Commercial Development of
Space Power.
The authors are with the Department of Electrical Engineering, Auburn
University, Auburn, AL 36849.
IEEE Log Number 9209859.
Fig. 1. Photograph of MESFET pair.
gain, bandwidth, common-mode rejection, and slew rate. The
design was implemented using thick film technology and tested
as a function of temperature. The results were analyzed and
areas for further development were identified.
11. MESFET PAIRS
The MESFET pairs fabricated by Cree, Inc., shown in
Fig. 1, are nine terminal devices. Each individual transistor
has drain, gate, and source contacts and a p-type buried layer
(backgate) contact. The transistors in the pair also share a
backside substrate contact. A cross section of a single S i c
MESFET is shown in Fig. 2.
The transistors used here were early developmental devices,
and a good ohmic contact to the buried p-type backgate layer
was not consistently produced during the fabrication process
0148-6411/93$03.00 0 1993 IEEE
I
TOMANA et al.: A HYBRID SILICON CARBIDE DIFFERENTIAL AMPLIFIER
537
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vu1nx.m
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St4
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N,
N - W E SUESTRATE
Fig. 2. Cross section of S i c MESFET.
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a differential pair in the second gain stage. MESFET at (a) 25OC, @) 350OC.
25.00
/
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v
K
-
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Fig. 3. I-V characteristics in the region of operation for a single MESFET
of a differential pair in the first gain stage. MESFET at (a) 25OC, (b) 350°C.
on SPICE Modeling will show that this behavior is caused
by capacitive coupling to the floating backgate region. The
capacitive effect decreases with temperature as can be seen
in Fig. 4(b). This decrease can be attributed to increased
junction leakage with increasing temperature. Shining high
intensity light on the device also reduced the capacitive effect
by photo-generated leakage currents. In this amplifier design,
the p-region backgate and the n-type substrate were both tied
to the same potential as the source of the transistor to prevent
any forward biased p-n junctions. The device manufacturer has
addressed the contact problem.
of the MESFET's. Due to this poor contact, a properly reverse
biased p-n junction was not always achieved between the
n-channel and the p-type buried backgate.
The effect of poor backgate layer contacts is evident in
the characteristic curves of the individual MESFET's. Fig. 3
shows the I-V characteristics for a transistor with a good ohmic
contact to the buried p-type backgate. The measurements
were made in the range of drain current to be used in the
amplifier. The I-V characteristics of the transistor with a
poor ohmic contact to the backgate are shown in Fig. 4.
A temperature and frequency dependent output conductance
can be seen in the curves in Fig. 4(a). The later section
To allow characterization and selection of MESFET pairs
prior to assembly, small test carriers were fabricated with
thick film gold conductors printed on an alumina substrate.
A backside gold pad was printed on the carrier for eventual
attachment to a hybrid substrate when fabricating the amplifier
circuit. The carrier substrate was scored with a diamond
saw and broken into individual carriers. MESFET pairs were
die attached to the carriers and gold wire bonded using
a thermosonic bonder. The individual MESFET pairs were
characterized for dc and small-signal behavior over the range
of 25-350OC.
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111. DEVICE
CHARACTERIZATION
IEEE TRANSACTIONS ON COMPONENTS, HYBRIDS, AND MANUFACTURING TECHNOLOGY, VOL. 16, NO. 5, AUGUST 1993
538
TABLE I1
DEVICE
PARAMETERS
FOR SINGLE
MESFET. (a) MESFET FROM FIRST
DIFFERENTIAL
STAGE.
(b) MESFET FROM SECOND
DIFFERENTIAL
STAGE.
Offset
Temp.
Idss
V P (v)
gm
T d s (MO)
@
= 5 pI
AD
@127pA Q 1 2 7 p A
(mA)
("C)
25
50
75
100
125
150
175
200
225
250
2.48
2.59
2.70
2.70
2.71
2.67
2.62
2.56
2.48
2.43
-2.44
-2.46
-2.48
-2.50
-2.51
-2.52
-2.52
-2.52
-2.52
-2.53
365e-6
384e-6
401e-6
406e-6
40%-6
402e-6
399e-6
384e-6
375e-6
363e-6
6.80
0.203
7.21
7.92
6.82
5.93
5.61
4.68
4.38
4.64
4.70
0.189
0.193
0.190
0.182
0.178
0.171
0.166
0.158
0.151
\'I
25
50
75
100
125
150
175
200
225
250
275
300
325
350
0.95
1.11
1.22
1.33
1.30
1.33
1.35
1.36
1.31
1.30
1.33
1.27
1.30
1.28
-1.12
-1.22
-1.24
- 1.27
-1.31
- 1.36
-1.42
-1.49
-1.57
-1.62
-1.64
-1.68
-1.75
-1.85
356e-6
378e-6
387e-6
392e-6
389e-6
385e-6
376e-6
368e-6
35%-6
342e-6
327e-6
316e-6
306e-6
295e-6
1.87
2.07
2.27
2.93
4.46
5.03
4.37
5.04
4.82
5.50
5.45
5.51
5.84
5.93
0.160
0.160
0.160
0.160
0.160
0.162
0.163
0.164
0.169
0.175
0.179
0.182
0.188
0.186
(b)
Since considerable variation existed between the MESFET
devices, those which performed best were selected for use in
the final amplifier design. Table I1 gives characteristics of two
MESFET pairs used in the first and second differential gain
stages of the amplifier. The data included in the table shows the
temperature dependence of the saturation drain current, pinchoff voltage, transconductance, drain-to-source resistance and
offset voltage. These parameters are based upon the simple
model for the device behavior:
5.0e-04
cn
2m
4.0e-04
,
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.
I
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A : ; l
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A
A
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2.0e-04
-
1.0e-04
-
+
0.0e+00
IGm of fust gainstage
A Gm of second gain stage
100
200
300
400
of temperature in Fig. 5. This data indicates initial values for
gm at 25OC of about 360 x
AN. These values increase
with temperature to about 100°C and then steadily decrease
with temperature to 350OC.
Table I1 indicates gradual improvement of r d s values with
increasing temperatures. The variation in r d s with temperature
shown in Table II(b) can be attributed to capacitive coupling to
the p-type backgate. As the temperature increases, the coupling
effect decreases yielding a higher value for T d s .
IV. SPICE MODELOF A S i c MESFET
SPICE simulation of the S i c MESFET's was performed
using the built-in GaAs MESFET model. Modeling of the S i c
MESFET's using SPICE was limited since SPICE uses the
square law relation for the pinch-off region in the equation:
ID = Beta x (VGS- V P ) ~ where Beta = Idss/V;. (3)
The actual S i c devices do not precisely follow this square law
relationship. Actually, the devices follow the relation:
ID= Beta x (VGS- V P ) ~
(4)
where N is not 2. N was found to be greater than 2 for large
drain currents and diminished to values less than 2 for small
drain currents. Due to this variation in N , it was necessary to
characterize and model the MESFET's at drain currents near
the design bias levels.
I D E Idss(1 - v G S / v P ) 2
(1)
Four separate SPICE models were used to simulate the
A device characteristic of major importance to the design transistors in the circuit, each according to the region of
of the amplifier was the transconductance g m . In a differential operation of the transistor. The amplifier was designed to
amplifier, the gain per stage can be approximated by the operate in the range of 100 p A for the differential stages,
expression:
400 p A for the level shift stages and about 2 mA for the
source-follower output stage. The devices were characterized
A v = gm x (R~Ilrds)
(2) around the desired current ranges using an HP4145 Parametric
The present amplifier design was resistively loaded and RL < Analyzer. SPICE models were developed to match these
characteristics and comparisons between SPICE generated I-V
T d s . The load resistors were printed thick film resistors and
were relatively temperature stable. Therefore, the temperature curves and actual I-V curves at these current levels can be seen
dependency of gm should be reflected in the amplifier gain in Fig. 6. These models were then used to simulate the Sic
over the temperature range. The values for gm were measured devices at the various current ranges.
The SPICE models used in Fig. 6 did not include the
at the drain current levels used in the amplifier design, and the
values for gm recorded in Table I1 are plotted as a function capacitive effect due to poor ohmic contacts to the backgate
I
TOMANA ef al.: A HYBRID SILICON CARBIDE DIFFERENTIAL AMPLIFIER
539
ID
IUA)
2
5
0
.
0
7
1
SPICE Simulation
-Murund Rsulrs
100
25
/d
mn.t.nt.:
n
-ma
vx
-v.r
.WOOY
m.OO0"
50
.00
.00
0
0
10
20
30
Vds (V)
Fig. 8. SPICE simulation results included parasitics shown in Fig. 8.
ID
(U*)
250.0.
VOD
/
-k , " d
VOS
4.000/div
+3OV
t
I
/
( VI
(b)
Fig. 6. SPICE generated I-V characteristics for a S i c MESFET. Single
transistor from (a) first gain stage, (b) second gain stage.
VDD
A
12 nF
1
-r
-
-L
Fig. 7. SPICE circuit for parasitic effect.
vss
13Ov
Fig. 9. Circuit schematic of operational amplifier.
[Figure 6(b)]. By adding additional parasitic components to
the model as shown in Fig. 7, a more accurate SPICE of this
behavior was achieved (Fig. 8).
v.
DESIGNOF THE OPERATIONAL AMPLIFIER
Based upon the measured device characteristics and SPICE
simulations, a simple operational amplifier with two differential gain stages, Fig. 9, has been designed. The output of the
first gain stage is level shifted through a differential source
follower. A simple source-follower output stage is driven from
one of the drains of the second differential gain stage. In
the output stage, two devices are used in parallel to provide
increased current handling capability. All the gain and levelshifting stages are biased by constant current sources. Bias
currents in the gain stages were minimized to enhance the
open-loop gain.
A goal of the design was to create a circuit in which
the bias points of the circuit are not greatly affected over
the temperature range. The amplifier was designed at room
temperature, and the operating points of the transistors were
set for stability over the entire temperature range. Designing at
room temperature provided the ability to directly prototype the
circuit design with the MESFET's on the carriers. A prototype
of the amplifier circuit was constructed on a bread board
using the MESFET carriers and discrete resistors. The same
MESFET's were then used to assemble the thick film hybrid
amplifier.
The supplies for this design were set at relatively high
voltages for maximum gain and stability. The power supplies
for this design were initially set at +25 V and -25 V. After
fabrication of the circuit, the power supplies were increased
to +30 V and -30 V in order to increase performance. By
using higher voltage power supplies, a greater drain-to-source
voltage can be achieved for the transistors in the differential
gain stages. This reduces any capacitive effect caused by the
I
540
IEEE TRANSACTIONS ON COMPONENTS, HYBRIDS, AND MANUFACTURING TECHNOLOGY, VOL. 16, NO. 5, AUGUST 1993
0
.*
a
,
' -.
2 . 0 ~MIL-STD883C Mghod 2019.2
Die Area = 8.44 x 10 -fn
0
200
600
400
800
1000
1200
Hours at 400 "c
Fig. 11. Die shear strength versus storage time at 400°C.
TABLE I11
EXPERIMENTAL AMPLIFIER
RESULTS
~~
Fig. 10. Photograph of thick film hybrid amplifier.
poor contact of the p-region discussed earlier and provides
better gain since the value of rdS increases at higher voltages.
Increasing the power supplies, however caused the dc bias
voltage at the output node to increase from approximately 0
to about 5.6 V.
VI. FABRICATION
AND TESTING OF THE HYBRIDOP AMP
The amplifier circuit design was fabricated as a thick film
hybrid module. Thick film hybrid technology has previously
been demonstrated in circuits at 3OOOC [8]. The amplifier
was tested over the temperature range of 25-35OoC, and the
performance specifications were summarized and compared to
calculated and computer simulated results.
The hybrid module was fabricated on a 96% alumina
substrate using standard thick film processing. Thick film
gold conductor (DuPont 5062/5063), cross-over dielectric
(DuPont QS482) and resistor (DuPont 1739-10kWsq. and
1749-100kR/sq.) layers were screen printed and fired at
85OOC. The resistors were passively laser trimmed and were
temperature stable. The MESFET carriers were attached to
the substrate and wire bonded. The substrate was mounted in
a 20 pin ceramic package (Kyocera KD-77196-F). A ceramic
package was chosen to avoid possible reliability problems with
glass-to-metal seals after extreme temperature range thermal
cycling. The package had a Kovar seal ring for welding. The
assembled hybrid is shown in Fig. 10.
Thermal cycle testing was performed on die attachment and
substrate materials. To evaluate the braze material used for die
attachment, test samples were prepared. Fig. 11 presents the
results of die shear tests after storage at 400°C. No degradation
in die shear strength was observed after 1000 hours, and all
values were above the 2 x minimum established in MIL-STD883C, Method 2019.2. Two carrier substrates (96% alumina
~
Temp.
Open
25
50
75
100
125
150
175
200
225
250
275
300
325
350
1880
1917
1990
2010
1960
1873
1763
1653
1557
1550
1433
1300
1106
1066
1578
1785
1924
2022
2053
2024
1934
1836
1744
1619
1516
1429
1369
1296
CMRR
GBW
Slew
Rate
59
59
58
58
56
55
55
56
57
60
61
61
60
60
1.08
1.08
1.13
1.13
1.13
1.13
1.10
1.10
1.00
0.97
0.96
0.94
0.92
0.91
11
11
11
11
11
11
11
11
11
11
11
11
11
11
Power Offset
Dissip. Voltage
203
208
218
220
217
200
193
189
188
186
185
182
180
178
159
157
156
145
143
141
139
140
141
143
145
147
149
151
and a low temperature glasdceramic) were evaluated. The die
shear strength was higher for the 96% alumina. However, the
glass/ceramic (DuPont 845) thermal coefficient of expansion
(4.5 ppm/"C) is nearly matched to the S i c and is expected to
perform better in thermal cycling tests to be conducted at a
later date.
The hybrid amplifier has been characterized over the temperature range of 25350"C, and the results are summarized
in Table 111. Table I11 also includes the calculated open loop
gain A,, given by the expression
A ~ =z 0.5 x [ g m l ( T d s l I) R L I ) X] 0 . 7 X
I( R L ~ ) ](5)
.
[gm2(~ds2
The values for gm and T d s are taken from Table 11. The factor
of 0.5 results from taking a single-ended signal from the output
of the second gain stage. The gain per differential stage is
gm(rds I(RL)and a factor of 0.7 is the measured gain of the
level shift stage. The output stage has approximately unity
gain.
The amplifier has a measured open-loop gain of 65.5 dB and
a calculated gain (5) of 64.0 dB at 25°C. SPICE indicates an
open-loop gain of 67.8 dB. The measured and calculated gains
are plotted as a function of temperature in Fig. 12. The gain
TOh4ANA et al.: A HYBRID SILICON CARBIDE DIFFERENTIAL AMPLIFIER
75,
I
55
50'
.
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,
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541
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Ocalculated value
100
0
"
100
"
zoo
"
300
'
I
400
Temperature (C)
300
200
500
400
Temperature ('C)
Fig. 14. Capacitance as a function of temperature for MOS capacitors.
Fig. 12. Measured and calculated open-loop amplifier gain as a function of
temperature.
60
q
40
9
c
,
,
,
,
,
,
,
,
,
,
105
d
0
200
4w
600
800
1wo
,
,
1200
Storage time at 400°C (hrs)
20
Fig. 15. Capacitance as a function of storage time at 4OOOC for MOS
capacitors.
-Actual
Frequency (Hz)
Fig. 13. Measured and SPICE simulated open-loop frequency response.
of the amplifier increases with temperature, peaks at 66 dB at
100°C and then gradually decreases at elevated temperatures.
This behavior is expected since the gain has a temperature
dependence similar to the product of values of gm shown in
Fig. 6. The common-mode rejection ratio CMRR remained
above 55 dB through the entire temperature range.
The gain-bandwidth product of the amplifier is also listed
in Table 111. Fig. 13 compares the actual measured frequency
response of the amplifier to the SPICE predicted response.
The actual open-loop response indicates a two-pole frequency
response with both poles at about 30 kHz and a unity-gain
bandwidth of 1 MHz. The gain rolls off at approximately
40 dB per decade. The measured values of the gate-to-source
capacitance c,, and gate-to-drain capacitance c g d in the linear
region were 20 pF each. SPICE results corresponding to the
values of c,, and c g d equal to 20 pF are shown in Fig. 13.
The SPICE results predict a unity-gain bandwidth of 200 kHz.
SPICE results corresponding to values of C,, and c g d equal to
4 pF are also plotted and more accurately match the measured
results. Improved modeling of the device capacitances and
analysis of the frequency response is needed.
The present amplifier design does not include compensation
capacitors. MOS capacitors have been evaluated for use as
compensation capacitors. The capacitance as a function of
temperature for two capacitors is shown in Fig. 14. The change
in capacitance is less than 10% over the temperature range.
However, there is an abrupt change in capacitance between 100
and 200°C. The room temperature capacitance after storage
at 400°C is given in Fig. 15. The capacitors are stable with
respect to high temperature storage. MOS capacitors will be
incorporated in future designs.
The temperature dependence of power dissipation, offset
voltage, and slew rate are listed in Table 111. The power
dissipation at room temperature was 203 mW and varied by
less than 13% over the temperature range. The variation in
power dissipation was essentially due to changes in current
through the output stage. Power dissipation in the gain stages
and level shift stages remained nearly unchanged over the
temperature range. The offset voltage of the amplifier varied
between 139 and 159 mV over the temperature range. No
attempt was made to actively trim the thick film resistors to
minimize the offset voltage. The relative stability of the offset
voltage with temperature indicates active laser trimming at
room temperature could be used. A slew rate of 11 V / p s is
maintained over the entire temperature range.
VII. CONCLUSION
An operational amplifier using S i c MESFET's has been
designed and fabricated using thick film technology. The
amplifier was successfully tested over the temperature range
IEEE TRANSACTIONS ON COMPONENTS, HYBRIDS, AND MANUFACTURINGTECHNOLOGY, VOL. 16, NO. 5, AUGUST 1993
542
of 25-350°C. The gain of the amplifier was greater than 60
dB, the common-mode rejection ratio was greater than 55 dB
and the offset voltage varied from 139 to 159 mV over the
entire temperature range. The feasibility of high temperature
circuit design and assembly using silicon carbide MESFET’s
has been demonstrated.
Frequency compensation was not included in the final amplifier, and the amplifier is limited to closed loop gains above
40 dB. It should be possible to place Miller compensation
capacitors around the level shifter and second gain stage
to achieve unity gain compensation. Further redesign would
include adjustment of the second stage load resistors to further
reduce the offset voltage. Most of the offset voltage could be
eliminated by active resistor trimming. Active loads should
also be considered as a potential method to increase the openloop gain at low frequencies.
REFERENCES
[ l ] J. R. Bromstead, G. B. Weir, R. W. Johnson, R. C. Jaeger, and E.
D. Baumann, “Performance of power semiconductor devices at high
temperature,” in Proc. First Int. High Temperature Electronics C o n t .
June 1 6 2 0 , 1991, pp. 27-35.
[2] J. L. Prince, B. L. Draper, J. N.Kronberg, and L. T. Fitch, “Performance
of digital integrated circuit technologies at very high temperatures,”
IEEE Trans. Comp., Hybrids, Manuf Technol., vol. CHMT-3, no. 4, pp.
571-579, Dec. 1980.
[3] L. J. Palkuti, J. L. Prince, and A. S. Glista, Jr., “Integrated circuit
characteristics at 26OOC for aircraft engine-control applications,” IEEE
Trans. Comp., Hybrids, Manuf Technol., vol. CHMT-2, no. 4, pp.
405412, Dec. 1979.
[4] B. L. Draper and D. W. Palmer, “Extension of high-temperature
electronics,” IEEE Trans. Comp., Hybrids, Manuf: Technol., vol. CHMT2. no. 4. DD. 399404. Dec. 1979.
J.
(51 W. Swonger, S. J. Gaul, and P. L. Heedley, “An evaluation of op amp
performance up to 3OOOC using dielectric isolation and bonded wafer
material technologies,” in Proc. First Int. High Temperature Electronics
Cont, June 16-20, 1991, pp. 281-290.
t61 J. W. Palmour and J. A. Edmond, “Ultrafast silicon carbide rectifiers,”
Power Technics Mug., pp. 18-21, Aug. 1989.
[71 J. W. Palmour, H.-S. Kong, D. G. Waltz, J. A. Edmond, and C. H. Carter,
Jr., “6H-silicon carbide transistors for high temperature operation,”
Trans. First Int. High Temperature Electronics Cot$, June 1991, pp.
229-236.
D. W. Palmer, “Hybrid microcircuitry for 300”C operation,” IEEE
Trans. Parts. Hybrids. Packaainz, vol. PHP-13, no. 3. DO. 252-257,
Sept. 1977.
Mim Tomana was born in Hradec Karalove,
Czechoslovakia, on July 6, 1967. He received the
B.S. and M.S. degrees in electrical engineering from
Aubum University, Auburn, AL, in May 1990 and
December 1992, respectively.
His research interests are in microelectronics and
electronic circuit design.
R. Wayne Johnson (S’85-M’87) received the B.E.
and M.Sc. degrees from Vanderbilt University,
Nashville, TN, in 1979 and 1982, respectively, and
the Ph.D. degree from Auburn University, Aubum,
AL, in 1987, all in electrical engineering.
He is an Associate Professor in Electrical
Engineering at Auburn University. At Auburn, he
has established teaching and research laboratories
for advanced packaging. His research efforts are
focused on materials, processing, and modeling
for multichip modules, power hybrids, and high
temperature electronics. He has published and presented numerous papers
at workshops and conferences and in technical journals. He has also worked
in the hybrid microelectronics industry for DuPont, Eaton, and Amperex.
Dr. Johnson is a member of the IEEE CHMT Society, IEPS, and was the
1991 President of ISHM.
Richard C. Jaeger (S’68-M’69-SM778-F’86), for a photograph and biography, please see page 265 of the May 1993 issue of this TRANSACTIONS.
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William C. Dillard was born in Birmingham, AL,
on December 13, 1958. He received the B.S.E.E.
and M.S.E.E. degrees from Auburn University,
Aubum, AL, in 1981 and 1986, respectively. His
master’s research concerned modeling BJTS at low
temperatures.
He was an SRC fellow from 1987 to 1992. He is
completing his Ph.D. research on high temperature
S i c linear circuit design.
Mr. Dillard is a member of Eta Kappa Nu, Sigma
Pi. ISHM, and the Electron Devices Society and
Education Society of the IEEE.