Journal of Microwaves and Optoelectronics, Vol. 1, No. 1, May 1997.
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ACTIVE BALUNS IN MICROWAVE INTEGRATED CIRCUIT
TECHNOLOGY
David Viveiros Júnior
Marcos Aurélio Luqueze
Denise Consonni
Laboratório de Microeletrônica, LME - Departamento de Engenharia Eletrônica
Escola Politécnica - Universidade de São Paulo
End. : Av. Prof. Luciano Gualberto, tr. 3, 158 - Cidade Universitária
CEP 05508-900 - São Paulo - SP
Tel. : (011) 818.5255 Fax : (011) 818.5585
E-Mail :
davivjr@lme.poli.usp.br
mluqueze@lme.poli.usp.br
dconsoni@lme.poli.usp.br
Abstract
This paper presents three active baluns employing MESFETs, and developed for PCN
converter applications. The non-linear circuit simulator LIBRA (HP-EESOF) [1] has been
used in the CAD process. The baluns were implemented in microwave techniques - hybrid (at
the Laboratório de Microeletrônica, USP) and GaAs MMIC technologies ( at an external
foundry [2]). Measured and simulated results are presented, disclosing an attractive degree of
design flexibility: the circuits can be adjusted for broadband operation, or optimized over
limited frequency range. Power linearity and DC bias can be traded off, according to specific
applications. The ICs were developed at the University of São Paulo, under R&D Center of
Telebrás (Brazilian Telecom) coordination, the research results being property of Telebrás
(contract Telebrás-USP JDPqD 586/94).
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Journal of Microwaves and Optoelectronics, Vol. 1, No. 1, May 1997.
1- Introduction
PCN (Personal Communication Network) systems require converters that can offer
conversion gain, low DC power consumption and high linearity. This performance can be
achieved with balanced mixers, developed in MMIC (Monolithic Microwave Integrated
Circuits) techniques, employing GaAs MESFET transistors [3]. Such structures deal with
balanced input and output signals, thus calling for baluns to interface the converter into
unbalanced terminals. It can be very convenient to integrate these components in the mixer
design, in order to ease mounting procedures. As hybrids and passive couplers occupy a large
area of substrate, three GaAs MESFET active baluns have been analyzed and implemented in
this work, using microwave integrated circuit technology. The work has been oriented
towards the design of broadband and low DC current consumption components, as required
for wireless personal communication applications.
2-Design
Three types of non-reciprocal GaAs MESFET balun structures have been designed and
constructed : - two of these structures transform unbalanced signals into balanced ports: one
was realized using GaAs MMIC technology (splitter balun), and the other one employed
microwave hybrid circuit technology on alumina substrate (differential balun), both producing
two 180° out-of-phase outputs, from an unbalanced input signal; - the third balun structure,
also constructed in MMIC technology (combiner balun), converts balanced signals into an
unbalanced output. LIBRA (HP-EESOF) [1] simulator has been used in the circuit design and
optimization. Non-linear MESFET models and foundry element models [2] have been used for
the MMIC designs.
2.1 - Splitter Balun
Figure 1 shows the basic schematics of the splitter balun [4], presenting, particularly in
this work a more compact topology, which employs self-biased transistors. The input signal is
splitted between transistors T1 and T2 in common gate and common source configurations,
respectively, such as to produce the desired balanced signals at ports 2 and 3.
C
T1
Output 3
300 Ω
27.5 Ω
+5V
4
C
1
270 Ω
Input
18.9 Ω
T2
C
Output 2
135 Ω
525 Ω
C
Figure 1 -Basic schematics of splitter balun
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Journal of Microwaves and Optoelectronics, Vol. 1, No. 1, May 1997.
Bias chokes take large areas of the substrate, and present undesirable parasitic effects.
Therefore, these elements have not been used in the design, being replaced by high valued
drain resistors to provide isolation between AC and DC paths. Initially, the resistances were
dimensioned as to supply 4 mA drain current for each transistor. Voltage supply (Vdd) and
drain-source voltage were set to 5 V and 2 V, respectively. Such resistances were then
optimized in order to attain phase and amplitude balance at the output ports, over a broad
frequency band. The optimization process was restrained, in order to keep the DC current at a
low level. Well balanced simulated characteristics over wide bandwidth were achieved, for a
total 10 mA DC current. Under these conditions, the active balun does not present gain, which
can be obtained only at the expense of increasing the DC bias current.
2.2 - Differential Balun
This type of balun derives from the differential amplifier topology, with one FET gate
connected to ground. The unbalanced signal is applied to the gate of the second FET (Figure
2), producing opposite phase currents in both drains, creating balanced output voltages at
ports 2 and 3.
Initially, circuit components were calculated to offer 10 mA drain current in each
transistor, at supply voltage of 8 Volts (Vdd = 8 V). Drain and source resistors provide
adequate values of Vds, avoiding the use of chokes for DC/RF isolation. Component values
were then optimized to produce good amplitude balance, and 180° phase difference between
output ports. Figure 2 shows the final optimized circuit.
4
+8V
431.45 Ω
433.18 Ω
5 pF
Output
2
5 pF
Output
3
DC Block
T1
Input
T2
1
95.17 Ω
29.64 Ω
Figure 2 - Differential balun
2.3 - Combiner balun
The schematics of this type of balun is presented in Figure 3 [4], in a simplified version
which employs self-biased transistors. The input balanced signal is combined in the gate and
source of transistor T1, and an unbalanced output signal results at the drain. Transistor T2
operates as a buffer for gain and impedance matching purposes.
As this type of balun is to be used at the output of a balanced mixer, it should present
high linearity. During the design and simulation procedures, a trade-off between DC
consumption and AC linearity was very clear : DC bias current has to be increased if a high
compression point is to be obtained. A 15 mA bias current was established for each transistor,
and the resulting resistances are presented in Figure 3.
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Journal of Microwaves and Optoelectronics, Vol. 1, No. 1, May 1997.
+ 8V
4
207 Ω
207 Ω
10 pF
10 pF
T2
DC Block
Input
T1
1
Outpu
t
3
500 Ω
500 Ω
60 Ω
10 pF
Input
2
60 Ω
Figure 3 - Schematics of combiner balun
3 - Circuit Fabrication
The MMIC baluns were sent for fabrication at an external foundry, through multiproject-wafer approach [2]. The MESFETs present 0.5 µm gate length, 4x75 µm gate width,
and Idss = 45 mA (Vgs = 0 V). The balun constructed in hybrid technology was printed on a
25 mil thickness alumina, and employed chip NEC MESFETs (NE76000) [7] and thin-film
tantalum nitride resistors.
3.1 - MMIC technology circuits
3.1.1 - Splitter balun
The MMIC lay-out of this balun is shown in Figure 4 (total area: 1,034.5 x 1,259
µm2).
Output
3
Input
+5 V
1
Output
2
Figure 4 - Layout of splitter balun
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Journal of Microwaves and Optoelectronics, Vol. 1, No. 1, May 1997.
Simulated and measured results are presented in Figures 5 and 6. All circuits have been
measured using the HP8510 [5] network analyzer, connected to the CASCADE [6]
characterization system. Simulated results disclosed 169 ± 11° phase difference between
output ports, whereas measured phase difference was 176 ± 14°, both over 1 to 5 GHz
frequency range. Output compression point of 1 dB was measured at +2 dBm input power, at
2 GHz (simulated results appointed +3 dBm).
S21
[dB]
Simulated
S21
[dB]
Measured
-4.0
-4.5
-5.0
-5.5
-6.0
1.0
Frequency 1.0 GHz/DIV
5.0
Figure 5- Simulated and measured results of splitter balun
Insertion loss between input 1 and output 2
S31 [dB]
Simulated
S31 [dB]
M easured
-4.0
-4.5
-5.0
-5.5
-6.0
1.0
Frequency 1.0 GHz/DIV
5.0
Figure 6 - Simulated and measured results of splitter balun
Insertion loss between input 1 and output 3
3.1.2 - Combiner balun
This circuit occupies a (1,286 x 822) µm2 area (Figure 7). Measured results are
displayed comparatively to simulated performance in Figures 8 and 9. Transmission phase
difference of 163 ± 5° resulted from simulation, and 198 ± 6° was measured, over the 1 to 5
GHz frequency range. Output power was +2 dBm for 1 dB compression point (measured and
simulated results), at 2 GHz.
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Journal of Microwaves and Optoelectronics, Vol. 1, No. 1, May 1997.
Input
+8V
1
Output
Input
2
3
Figure 7 - Layout of combiner balun
S 31 [d B ]
S im u lated
S 31 [d B ]
M eas u red
0.0
-5.0
-10 .0
1.0
F req u en cy 1 .0 G H z/D IV
5.0
Figure 8 - Simulated and measured results of combiner balun
Insertion loss between input 1 and output 3
S 32 [d B ]
S im u lated
0.0
S 32 [d B ]
M eas u red
-5 .0
-1 0.0
1.0
F req u en cy 1.0 G H z/D IV
5.0
Figure 9 - Simulated and measured results of combiner balun
Insertion loss between input 2 and output 3
3.2 - Hybrid technology balun
Thin film hybrid technology on alumina substrate was employed in the fabrication of
the differential balun. Circuit layout ((7,37 x 4,20) mm2 ) is displayed in Figure 10. Simulated
and measured insertion loss are shown in Figures 11 and 12. Figures 13 and 14 present
simulated and measured results of the phase difference between input and outputs ports. This
type of balun presents a very good phase balance, over a large frequency band; however,
output amplitude balance is poor (over 5 dB amplitude difference). This problem can be
solved by connecting a MESFET differential amplifier to the output ports of the balun, and
optimizing the differential amplifier elements, in order to compensate for the balun unbalance.
The difference in phase between output ports was 192 ± 5° and 176 ± 9 ° for simulated and
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Journal of Microwaves and Optoelectronics, Vol. 1, No. 1, May 1997.
measured results, respectively, over 1 to 5 GHz frequency range. Input power at 1 dB
compression point was 0 dBm (measured) and -2 dBm (simulated) results, at 2 GHz.
Output - 3
Drain resistor
Vdd
Transistor
Source resistor
Ground
Gate resistor
Input -1
Ground
Transistor
Vdd
Drain resistor
Output - 2
Alumina
Figure 10 - Layout of differential balun
S21 [dB]
Sim ulated
S21 [dB]
Measured
10.0
5.0
0.0
-5.0
-10.0
1.0
Frequen cy 1.0 GH z/DIV
5.0
Figure 11- Simulated and measured results of differential balun
Insertion loss between input 1 and output 2
S31 [dB]
Simulated
S31 [dB]
Measured
10.0
5.0
0.0
-5.0
-10.0
1.0
Frequency 1.0 GHz/DIV
5.0
Figure 12 - Simulated and measured results of differential balun
Insertion loss between input 1 and output 3
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Journal of Microwaves and Optoelectronics, Vol. 1, No. 1, May 1997.
Phase
[Degrees]
Simulated
Phase
[Degrees]
Measured
150.0
100.0
50.0
0.0
1.0
Frequency 1.0 GHz/DIV
5.0
Figure 13 - Simulated and measured results of differential balun
Phase difference between input and output 1
Phase
[Degrees]
Simulated
Phase
[Degrees]
Measured
0.0
-50.0
-100.0
-150.0
-200.0
1.0
Frequency 1.0 GHz/DIV
5.0
Figure 14 - Simulated and measured results of differential balun
Phase difference between input and output 2
4 - Conclusions
Three active balun structures have been evaluated for application in PCN (Personal
Communication Network) converters. These baluns are extremely compact in size and can be
easily integrated with microwave balanced mixers, since their design is based on MESFET
transistors and includes no isolation bias chokes. The design methods and element models
have been validated, since measured results closely approach simulated performance. The
three baluns present broadband operation, and a high level of design flexibility: insertion loss
and power compression can be adjusted, by varying the transistors bias currents. Conversion
gain and better amplitude balance can be obtained over a more limited frequency band, by
optimizing the resistor values. As a consequence, resistances can be chosen and optimized
depending on the particular application, and the frequency range of interest. These balun
structures have several applications in microwave circuits and systems which operate with
balanced signals.
5- Acknowledgments
This project had technical and financial supported from CPqD-Telebrás under contract
TB/USP JDPqD 586/94. Financial support from FAPESP is also acknowledged.
The authors would like to thank Jair Pereira de Souza and Bruno Pinca (LME-EPUSP)
for their assistance in this work.
Journal of Microwaves and Optoelectronics, Vol. 1, No. 1, May 1997.
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6- References
[1] HP-EESOF Microwave & RF Circuit Design, Series IV, version 5, Hewlett-Packard
Company, 1994.
[2] EUROPRACTICE IC Manufacturing Service, IMEC, Leuven, Belgium; GEC Marconi
Materials Technology, GaAs IC Foundry, Process F20.
[3] M.A. Luqueze, D.Consonni, D. Viveiros Jr., V.Patiri Neto; “A single GaAs MMIC for up
and down conversion in PCN transceivers”, Proceedings of the “1997 IEEE MTT-S
International Topical Symposium on Technologies for Wireless Applications”, Vancouver,
Canada, 1997, p. 163-166.
[4] E. Adler, E. Viveiros; “MMIC Double-Balanced Mixer”, EEsof User’s Group Meeting,
May 1990, Paper 4.
[5] HP 8510 Network Analyzer, Hewlett-Packard Company.
[6] CASCADE, Model 42 - Microwave R & D Probe Station.
[7] NEC - CEL, California Eastern Laboratories, 4590 Patrick Henry Drive, Santa Clara,
USA.