Analytical exercises, Circuits, Devices, Networks and MicroElectronics
CDNuE
Exercises in ideal opamps
version 1.2
All resistances are in k unless otherwise specified.
6-1. For the topologies shown determine input resistance Rin, transfer gain T = vO/vS, and feedback
factor . By inspection
Answers : (a) ∞,8.0V/V, 0.125 (b) ∞,5.0V/V, 0.2
6-2 (a).Assuming an ideal opamp and using resistances no
larger than 0.6 Mdesign an amplifier with gain -12 V/V
and the largest possible Rin using the inverting configuration
(as shown) (b) What is the input resistance (c) What is the
feedback ratio ?
Answers: (a) 50 k, 0.6M(b) 50 k, (c) 1/13
6-3. Assume ideal opamps for each of the configurations shown and determine (i) input resistance Rin,
(ii) voltage transfer gain T = vO/vS, and (iii) feedback factor (all by inspection). Note that some
resistances are superfluous and have no effect since they are either tied to a virtual zero or have no current
flowing through them (nullator input). Alternatively any resistance load to the norator node that is not
part of the feedback link will have no effect
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Analytical exercises, Circuits, Devices, Networks and MicroElectronics
6-4. Find: (a) transfer gain T = vO/vS and (b) input resistance Rin
6-5. For the circuit shown find:
(a) transfer function T = vO/vS and
(b) feedback factor 
Answers (a) -8 V/V, (b) 1/11
6-6. Find (1) transfer gain T = vO/vS , (2) input resistance Rin, (3) feedback factor 

Answers: (a) 14V/V,∞,1/14 (b) 16 V/V,∞
6-7. Determine input resistance Rin and
transfer gain T =vO/vS for the circuit
shown, assuming that
(a) Rf = 
(b) Rf = 100k
Answers:(a) Rin= 5k3.5 V/V (b) Rin
=∞21 V/V
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Analytical exercises, Circuits, Devices, Networks and MicroElectronics
6-8. Design (i.e. determine R2) for a 4-bit
digital-analog converter (DAC) using the R-2R
ladder (as shown) such that the output Vo = 5.0V
when input word = $A = %1010. Assume input
bit amplitudes 1.0V and that R1 = R = 10 k
6-9. A sinusoidal input with phase shift = 0 is fed to a Miller integrator that uses an ideal opamp and an
RC pair with R = 100 k and C =.001 F.
(a) At what frequency are the input and output signals equal in magnitude?
(b) What is the phase of VO relative to Vin?
(c) If the frequency is decreased by a factor of 10 from that of part (a), by how many dB does the
output change?
Answers: 10 kr/s, 90o, 20 dB
6-10. A lossy Miller integrator as shown is constructed
with use of an ideal opamp. A sinusoidal signal is
applied to the input.
(a) at what frequency are the input and output signals
equal in magnitude?
(b) What is the phase of vo relative to vin for part (a)?
(c) If the frequency is decreased by a factor of 10
from that of part (a), by how many dB does the output
change?
6-11. The opamp topology shown has a frequency response of the form
T
 R2 / R1
(1  1 / s )(1  s /  2 )
where s = j and T is of the form of a broadband bandpass
By choice of R1, R2, and C1, C2, design a bandpass circuit for
which Rin = 50 k, mid-band gain |vo/vs| = 14 dB, lowfrequency cornerf1 = 200Hz and upper frequency corner f2 = 200
kHz.
Hint:Start with mid band gain |R2/R1|and Rin to determine R1 and R2. Then find C1 and C2.
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Analytical exercises, Circuits, Devices, Networks and MicroElectronics
6-12. The circuit shown uses a 250k potentiometer to
devise an adjustable gain amplifier.
(a) Assuming R1 = 0, derive an expression for the gain as
a function of parameter setting x.
(b) What value of R1 is needed in order that the transfer
gain T = |vO/vS| can be adjusted from unity gain T = 1.0 V/V
to order-of-magnitude larger value T = 11.0 V/V?
6-13. A photodetector with open-circuit voltage vS
=100 mV and short-circuit current iSS = 1A is to be
connected to a 1 k load. Find the voltage that will
appear across the load if:
(a) it is connected directly to the load.
(b) a unity-gain buffer is inserted between the
source and the load (as shown).
Hint: open circuit voltage and short circuit current
are equivalent to Thevenin voltage and Norton current respectively. So that means that RS = vS /iSS.
6-14. The circuit shown is called a level-adjusting buffer.
(a) Determine the range over which output level Vo
can be adjusted.
(b) Assume that a 20-turn potentiometer is used.
Find the change of Vo with respect to each quarter turn of
the pot.
6-15. Find transfer functions for each of the following circuits:
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Analytical exercises, Circuits, Devices, Networks and MicroElectronics
6-16. The classical topology for the instrumentation
amplifier (IA) is shown. Choose resistance values
such that it will have differential gain that ranges
from 1 to 50 as defined by an R = 100 k
potentiometer. The potentiometer is configured to
serve as a variable resistance as shown.
Suggestion: Design the second stage with gain of
0.5V/V.
Answers: r = 1.0k, R4 = 50k.
6-17. An option similar to that of the IA is the topology
shown. For reasons revealed in chapter 16 it is also an
impractical option but (a) using nodal analysis show that it
will have differential gain
T
vO
vO
R
R

1 2  2
vI (v1  v2 )
R1 r  R
(b) Determine values such that the circuit will have
differential gain that can be varied from |T| = 10 V/V to |T| =
50 V/V using an R = 100 kpotentiometer.
(hint: Let R2/R1= 1)
6-18. Assuming ideal opamps determine the 3dB rolloff frequency for the following 4-stage circuit in
terms of the time constant  = RC. (Hint: Assume each stage loses 3/4 dB)
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Analytical exercises, Circuits, Devices, Networks and MicroElectronics
6-19. The circuit shown is a variant on the diffamp topology
(a) Using nodal analysis determine an
expression for vO vs vI = (v2 – v1) and
(b) determine its gain in V/V for the values
given
6-20. The circuit shown is called a Howland current pump and
an effective voltage-controlled current source, provided the
voltage across ZL does not exceed the limits imposed by the
power rails and the R1, R2 pairs are accurately balanced.
Using nodal analysis show that.
iL = G1 (v2 – v1) independently of ZL
where G1 = 1/R1 .
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