A 2.125 Gbaud 1.6kΩ Transimpedance
Preamplifier in 0.5µm CMOS
Sunderarajan S. Mohan
Thomas H. Lee
Center for Integrated Systems
Stanford University
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
OUTLINE
• Motivation
• Shunt-peaked Amplifier
• Inductor Modeling and Optimization
• Circuit Layout and Measurement
• Summary
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
SYSTEM OVERVIEW
Var. gain
amp
Optical
fiber
Photo Preamp
diode
Decision
circuit
Digital
data
AGC
Clock
synthesizer
• Pre-amp design is critical
• Challenge: CMOS implementation
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
CMOS VS. GAAS
Factor
GaAs
CMOS
Performance
Excellent
Sufficient for up to low GHz
Integration
Photodiode with Pre-amp
Analog and Digital
Cost
High
Low
• Photodiode in GaAs
• Flip-chip techniques can reduce parasitics at the GaAs
to CMOS transition
• Parasitic coupling from digital to analog
is a challenge for integration
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
TRANSIMPEDANCE AMPLIFIER
Rf
−
Cg A
Cd
+
Photo
diode
Transimpedance
amplifier
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
(A+1)
1
A
=
≈
Rin Cin
Rf (Cd +Cg )
Rf (Cd +Cg )
T
AMAX = k ωω3dB
where (k ≈ 1)
• ω3dB =
•
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
TRANSIMPEDANCE LIMIT
• Rf,MAX ≈
kωT
ω3dB 2 (Cd +Cg )
• Desire maximum Rf for sensitivity,
stability and high gain
• Need to circumvent this limit
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
CIRCUMVENTING THE TRANSIMPEDANCE LIMIT
Rf
−
Cg A
Cd
+
Photo
diode
Common-gate Shunt-peaked
stage
transimpedance stage
• Decouple photodiode from the transimpedance stage
with common-gate stage
• Increase gain-bandwidth product by shunt-peaking
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
SHUNT-PEAKED AMPLIFIER
Common Source Amplifier
Shunt-peaked Amplifier
Vdd
Vdd
L
R
R
vout
vin
vout
vin
C
C
• Bandwidth enhancement using zeros
• No additional power dissipation
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
SMALL SIGNAL MODELS
Shunt-peaked Amplifier
Common Source Amplifier
vout
vout
R
gm vin
gm vin
R
• One pole
• vvout
(ω) =
in
C
gm R
1+jωRC
L
C
• One zero, two poles
gm (R+jωL)
• vvout
(ω)
=
1+jωRC−ω 2 LC
in
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
MAGNITUDE RESPONSE
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
No peaking
Optimum group delay
Maximally flat
Maximum bandwidth
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Normalized frequency
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
PHASE RESPONSE
0
−10
−20
Phase
−30
−40
−50
−60
−70
−80
−90
No peaking
Optimum group delay
Maximally flat
Maximum bandwidth
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
Normalized frequency
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
FREQUENCY RESPONSE
vout
• Two time constants:
τC = RC , τL = L/R
R
gm vin
L
• Ratio determines performance:
m = ττCL = RL2 C
C
Factor (m)
Normalized ω3dB
Response
0
0.32
0.41
0.71
1.00
1.60
1.72
1.85
No shunt peaking
Optimum group delay
Maximally flat
Maximum bandwidth
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
ON-CHIP SHUNT PEAKING : PREVIOUS WORK
Bond-wire inductor
Maximum Q on-chip
Vdd
Vdd
Lbondwire
L
Rs
CL
Cbondpad
R
vin
R
vout
Cd
Cload
Cg
vin
vout
Cd
Cload
Cg
• Large Cbondpad
• Limited Lbondwire
• Coupling issues
• Large CL
• Large area
• Limited L
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
ON-CHIP SHUNT PEAKING: NEW
Vdd
• Work with inductor parasitics
L
• Rs is not an issue
CL
(now part of load resistance)
Rs
• Inductor Q is not relevant
(R − Rs )
• Minimize area and CL
vout
vin
Cd
Cg
Cload
• L determined by
R, Cload , CL and Cd
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
MODELING CHALLENGE
• Simultaneous optimization of
active and passive components
• 3-D field solvers are inconvenient
{ Numerically expensive and cumbersome
{ Good for verification but not for design
• Scalable, analytical models
{ Design guidelines and explore trade-offs
{ Circuit design and optimization
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
INDUCTOR MODELING
Two port (without PGS)
Cs
port 1
Rs
L
Cox
Rsi
L
CL = Cox + Cs
port 2
Cox
Csi
Csi
Rsi
Rs
One port (with PGS)
substrate
• Simple expressions for Rs , Cox and Cs
• Patterned ground shield (PGS) eliminates Rsi and Csi
• NEED simple, accurate expression for inductance!
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
CURRENT SHEET APPROACH
OD = (1 + ρ)AD
w
AD
nI
ρAD = nw + (n − 1)s
s
• Reduce complexity by 4n2
• Use symmetry
• Derive simple expression using GMD, AMD and AMSD
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
GMD, AMD AND AMSD
w
2
w
2
−
l
I
w
w
< x1 , x2 <
2
2
ln (GMD) = ln |x1 + x2 | = ln w − 1.5
w
AMD
= |x1 + x2 | =
3
2
w
2
AMSD
= (x1 + x2 )2 =
6
L =
µl
2π
h
=
ln
µl
2π
2
AMSD
− 1 + AMD
−
l
4l2
h
i
2
w
w
ln 2l
w + 0.5 + 3l − 24l2
2l
GMD
i
x1 x2
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
INDUCTANCE EXPRESSSION
s
w
• AD = 0.5(OD + ID)
OD
ID
•ρ=
OD−ID
OD+ID
• ρAD = nw + (n − 1)s
AD
•L=
2µn2 AD
π
h i
2
ln 2.067
+
0.176ρ
+
0.125ρ
ρ
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
% Inductors exceeding abs. error
INDUCTANCE EXPRESSSION
100
80
60
40
20
0
0
1
5
3
4
% Absolute error
2
6
Min
Max
L(nH)
0.1
OD(µm) 100
n
1
s/w
0.02
ρ
0.03
70
400
20
3
0.95
7
Verified by measurements (75) and 3-D field solver simulations (19,000)
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
TRANSIMPEDANCE STAGE
Vdd
L
CL
• Input current drive
Rs
• Cascode stage
(R − Rs )
vout
Cd
Rf
iin
Cin
Cload
• On-chip shunt-peaking
• Feedback
Cg
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
DESIGN METHODOLOGY
1. Design and optimize transimpedance stage
without shunt peaking
2. Transistor current determines conductor width, w
3. Lithography sets spacing, s
4. Choose n and AD to realize desired L
while minimizing parasitic capacitance and area
5. Increase transimpedance resistance, Rf
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
OPTIMIZATION VIA GEOMETRIC PROGRAMMING
• Simultaneous optimization of
active and passive components
• Global Optimum or Proof of Infeasibility
DAC99, Session 54.3 (June 24, 1999):
Optimization of Inductor Circuits
via Geometric Programming
Maria del Mar Hershenson, Sunderarajan S. Mohan
Stephen P. Boyd and Thomas H. Lee
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
EXPERIMENTAL VERIFICATION OF INDUCTOR
1000
800
•
•
•
•
•
•
Impedance (Ω)
real(ZL) measured
real(ZL) predicted
imag(ZL) measured
imag(ZL) predicted
600
400
200
00
0.5
1.0 1.5 2.0 2.5
Frequency (GHz)
OD = 180µm
w = 3.2µm
s = 2.1µm
n = 11.75
Lmeas = 20.5nH
Lpred = 20.3nH
3.0
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
COMMON-GATE STAGE
Vdd
• Decouple sensitive feedback node
from external capacitances
• Realize higher transimpedance
• Extra power
• Additional noise terms
• Junction capacitances degrade noise
Photo
diode
Common-gate Shunt-peaked
transimpedance stage
stage
at high frequency
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
DIFFERENTIAL PREAMPLIFIER
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
TRANSIMPEDANCE BANDWIDTH
Transmpedance (Ω)
1800
1600
1400
CPD = 100fF
1200
CPD = 300fF
CPD = 500fF
1000
800
CPD = 700fF
0
0.2
0.4
0.6
0.8
frequency (GHz)
1.0
1.2
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
INPUT REFERRED CURRENT NOISE DENSITY
40
γ = 2/3
γ = 4/3
γ=2
√
pA/ Hz
30
20
10
0
0
0.5
1.0
frequency (GHz)
1.5
2.0
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
EYE DIAGRAM
1.6 Gb/s
120
80
40
mV
mV
25
20
15
10
5
0
−5
−10
−15
−20
−25
6.2 6.4 6.6 ns6.8 7.0 7.2
2.1 Gb/s
0
−40
−80
−120
6.0
6.2
6.4ns 6.6
6.8
7.0
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
PERFORMANCE SUMMARY
Transimpedance (small-signal)
Bandwidth (3dB)
Max. photodiode capacitance
Max. input current
Simulated input noise current
Max. output voltage swing
(50Ω load at each output)
Power consumption
Die area
Technology
1600Ω (differential)
800Ω (single-ended)
1.2GHz
0.6pF
1.0mA
0.6µA
1.0Vpp (differential)
0.5Vpp (single-ended)
115mW (core)
110mW (50Ω driver)
0.6mm2
0.5µm CMOS
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
CONTRIBUTIONS
• Shunt-peaking with optimized on-chip inductor
• Simple accurate expression for inductance
• Common-gate input stage
• CMOS implementation of differential preamplifier
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.
ACKNOWLEDGMENTS
IBM fellowship support
Rockwell International
Dr. Christopher Hull
Dr. Paramjit Singh
Prof. L. Kazovsky and Dr. Allen Lu
Dr. C. Patrick Yue, Dr. Derek Shaeffer, Dr. Arvin Shahani
Maria del Mar Hershenson and Dr. Ali Hajimiri
S. S. Mohan, ”A 2.125 Gbaud 1.6kΩ Transimpedance Preamplifier in 0.5µm CMOS, ” CICC
May 1999.