Space Vector (PWM) Digital Control and Sine (PWM) Pulse Width
Modulation modelling, simulations Techniques & Analysis by MATLAB and
PSIM (Powersys)
Tariq MASOOD.CH
Qatar Petroleum
Dukhan Qatar
Dr. Abdel-Aty Edris
(Manager Power Delivery R & D)
EPRI USA
Prof. Dr. RK Aggarwal
University of Bath
Bath _ UK
Prof. Dr. Suhail A. Qureshi
University of Engineering & Technology
Lahore Pakistan
Prof. Dr. Abdul Jabber Khan
Rachna College of Engineering &Technology
Gujranwala Pakistan
Yacob Y. Al-Mulla
IEEE Chair
Doha Qatar
Author contact Details:
Email: maaat 2001@ ieee.org Ph:: 00974 560 75 72;; P.O Box 1000 52 Dukhan Qatar
Abstract --- previous work conducted in the STATCOM/SVC (FACTS Devices) control domain with degree of precision
and how to lead & Lag compensator will be implemented as control passageway to address power quality issues too. In this
paper we have emphasized methodically the relationship between sinusoidal Pulse width modulation and Space vector
modulations. The relationship involved the fundamental perception to create holistic approach for the new pacesetters for
today. All the relationship provided Bidirectional Bridge for the transformations between carriers based frequency and space
vector pulse width modulations. It is also reflected all the drawn conclusions are independent load type. Therefore both
methods have been discussed along with their viability in power system control.
Introduction:For long period carried-based PWM methods [3] were
widely used in the most applications. The PWM
modulation has been studied extensively in the last
decade. Hence, the main objective of PWM over here to
achieve following objective considerably
1. wide linear modulation range
2. less switching loss
3. less total harmonic distortion in the spectrum of
switching waveform
4. and easy implementation and less computational
calculations
With the emerging technology in microprocessor the SV
PWM has been playing pivotal and viable role in power
conversion. It is using space vector concept to calculate
the duty cycle of the switches which is imperative
implementation of digital control theory of PWM
modulators.
The comprehend relationship in between SV PWM and
Sine PWM render a platform not only to transform from
one to another but also to develop different performance
PWM modulators. However, many attempts have been
made to unite the two types of PWM methods [4],[5].
Furthermore, the SV pulse width modulation technique
has been used in [6],[7].
1. Characteristics of Six-step voltages source inverter
2. Purpose of Pulse width modulation
3. Voltage source inverter (VSI) and its operation
stages with respective digital phenomenon stagewise
4. Switching characteristics
5. Modelling of space vector with MathCAD
6. Determine the switching time of each transistor at
each operation sector ( S1 to S6)
7. Switching Time table at Each Sector
******************
1. Characteristics of Six-step voltages source inverter
This is called the six-step inverter, because it
comprises with six "steps" in the line to neutral
(phase) voltage waveform.
Harmonics of order three and multiples of three
are absent from the line to line and the line to
neutral voltages and consequently, absent form
the current
Output amplitude in a three-phase inverter can be
controlled by only change of DC-link voltages
(Vdc)
2. Purpose of Pulse width modulation
The major contribution of the PWM in power system
conversion/delivery as bulleted below:• Control of inverter output voltages
• And reduction of Harmonic components
sequence as shown below in the matrix.
Figure 1: Pulse width modulation waveform
Figure 2: waveforms of gating signals switching
sequence, line to negative voltages for six-step voltage
source inverter
Figure 1A: Pulse width modulations VSI
inverter out put voltage
™ when Vcontrol > Vtri VA0 = Vdc/2
™ when Vcontrol < Vtri VA0 = -Vdc/2
Control of inverter output voltages
™ PWM frequency is the same as the
frequency of Vtri
™ Amplitude is controlled by the peak
value of Vcontrol.
™ Fundamental frequency is controlled by
the frequency of Vcontrol.
What is modulation index (M)
∴m =
B. Space vector PWM Switching Sequence
Three phase two level PWM inverter as shown in figure 2:
the switch function is defined by where I = a, b ,c, “1”
denotes E/2 at the inverter output (a, b c) with reference to
point “N” “0” denotes –E/2 and ‘N’ is the neutral point of
the bus [9].
SWi = 1, the upper switch SWi+ is on and bottom switch
SWi- is off.
SWi = 0, the upper switch SWi+ is off and bottom switch
SWi- is on.
S1, S3, S5 are opened the binary equation [1-1-1] and the
bottom switches will be remained closed.
S4, S6, S2 switches are opened the binary equation will be
[000] and to upper switches will be remained closed.
Both conditions the voltages will be zero
V0 = V7 = 0
These switches are in operation with following stages
Vcontrol
peak .of .(V A0 )
-------------Æ (1)
=
Vtri
V dc 2
Where, (VA0)1 : Fundamental frequency component of
VA0
underlying issues of PWM implementations
o Increase in power loss due to high switching
operation PWM frequency.
o Reduction of Available voltages
o EMI problems due to high-order harmonics
3.
Voltage source inverter (VSI) and its operation
stages with respective digital phenomenon stagewise
A. Gating signals, switching sequence and line to
negative voltage. Six-step (VSI) operation
Figure 3: Three-phase voltage source inverter
Stage # 1
Stage # 2
Output three phase voltages
Stage # 3
PWM frequency signal and control voltage signal
Stage # 4
Stage # 5
IGBT discontinuous mode of operation and output
voltages after conversion
Stage # 6
Output voltages IGBT without compensations
Vab = VaN − VbN
=
Vdc
π⎞
⎛
3m sin ⎜ ωt + ⎟
2
6⎠
⎝
----------------------- (5)
Vbc = VbN − VcN
=
Vdc
5π ⎞
⎛
3m sin ⎜ ωt +
⎟
6 ⎠
2
⎝
Six inverter voltages vectors for six step voltages source
inverter operation sequence as Tabulated below.
Vca = VcN − VaN
Voltage
=
Switches
Binary sequence
sequence
V1
5-6-1
1-0-1
V2
6-1-2
1-0-0
V3
1-2-3
1-1-0
V4
2-3-4
0-1-0
V5
3-4-5
0-1-1
V6
4-5-6
0-0-1
Table 1; switching operation sequence with respective
switches state (NO/NC) Normal open/Normal close
---------------------- (6)
Vdc
3π ⎞
⎛
3m sin⎜ ωt +
⎟
2
2 ⎠
⎝
--------------------- (7)
C. Carrier Based pulse Width modulations
The universal representation of modulation signals are
vi(t )(i = a, b, c) For three phases PWM carrier will be
as mentioned: vi (t ) = ui (t ) + ei(t )
Where ei(t) is the injected harmonics and ui(t) is the
fundamental signals. These are three-phase symmetrical
sinusoidal signals.
ua(t ) = m sin ωt
---------------------------- (2)
2π ⎞
⎛
ub(t ) = m sin ⎜ ωt +
⎟
3 ⎠
⎝
4π ⎞
⎛
uc(t ) = m sin ⎜ ωt +
⎟
3 ⎠
⎝
--------- --- --- (3)
---------- (4)
Sine PWM output line-to-line voltages
-Amplitude of line to line voltages (Van, Vbn, Vcn)
--Fundamental frequency component is (Vab)1
(Vab )1 ( rms ) =
=
6
π
3 4 Vdc
2π 2
------------------------------ (8)
Vdc ≈ 0.78Vdc
--Harmonics Frequency components (Vab)h
:: amplitudes of harmonics decrease inversely proportional
to their harmonics order
(Vab )h (rms ) = 0.78 Vdc -------------------------------- (9)
h
Where h = 6n+1 and (n= 1, 2, 3 …)
-Phase-voltages
Vdc
[ m sin ωt + ei(t )] ---------------------- (10)
2
⎤
Vdc ⎡
2π ⎞
⎛
VbN (t ) =
m sin ⎜ ωt +
⎟ + ei (t ) ⎥ --------- (11)
⎢
2 ⎣
3 ⎠
⎝
⎦
VaN (t ) =
Line-to-Line voltages ( Vab, Vbc, Vca) and line to
neutral voltages (Van, Vbn, Vcn)
-line to line voltages
VcN (t ) =
Vdc ⎡
4π
⎛
m sin ⎜ ωt +
⎢
2 ⎣
3
⎝
⎤
⎞
⎟ + ei (t ) ⎥ --------- (12)
⎠
⎦
PWM scheme can be divided in two operation modes.
[1],[2]
Continues pulse width modulation
for the
(
−1− umin(t) < ei(t) < 1− umax(t) m ≤ 2 3
)
therefore each carrier signal period, each output of the
converters legs are switching between the positive or
negative rail of the DC-link.
Discontinues pulse width modulations
for the discontinues width modulation scheme, in the
linear modulation range, the zero-sequence
component
Line to neutral phase voltages after conversion
Where ei(t) is injected harmonics and "m" is the
modulation index
2
1
1
Van = VaN − VbN − VcN ------------ (13)
3
3
3
1
2
1
Vbn = − VaN + VbN − VcN ------------- (14)
3
3
3
1
1
2
Vcn = − VaN − VbN + VcN ------------ (15)
3
3
3
in the linear modulation range the output line-to-line
voltages are equal or less then the dc-bus voltage Vdc.
However the possible modulation index m max = 2
3
in the linear range, and we have
− 1 − u min (t ) ≤ ei(t ) ≤ 1 − u max (t )
Where u min = min (ua (t ), ub(t ), uc(t ) ) and
u max = max(ua (t ), ub(t ), uc(t ) ) it is clear that the ei(t)
harmonics did not appear in the line-to line voltages.
Therefore ei(t) is usually called the zero sequence signal.
Hence it can be calculated.
ei (t ) =
ei(t) = −1− umin (t)....or
ei(t) = 1− umax (t)
in each carrier
cycle, one modulation signal will be equal to +-1 and
the corresponding leg tied to positive or negative trail
of the Dc-link with out switching action. Thus from
average compare with continues PWM schemes to
discontinues schemes can reduce the average
switching frequency by 33% and cause less switching
loss.
Pulse width modulation methods and degree of
freedom
The way of assignment of the voltage vector to converters
has the degree of freedom. Utilizing of property makes it
possible to realize flexible controls [8].
a. Basic switching vectors & Sectors
b. 6 active vector
Æ Axes of a hexagonal
Æ DC link voltage is supplied to the load
Æ Each sector (1 to 6): 60 degree
c. Two zero vector (V0, V7)
Æ at origin
ÆNo voltage is supplied to the load
1
(ua(t ) + ub(t ) + uc(t ) ) ------- (16)
3
ei(t) = 0 yields sinusoidal PWM. In the linear range from
the equation (4) , (5) |ui| <1 we have mmax = 1 and the
maximum line to line voltages are
3
Vdc when the m
2
> 1 the over modulation will occur.
ei(t ) ≠ 0 Non-sinusoidal PWM occurs, when ei(t) is the
suitable such as ei(t) = m/6sin(wt) all the tops of ui(t) cut
by ei(t). m max =
2
, and maximum line to line
3
voltages reach Vdc in linear range. Therefore the different
ei(t) leads to different carrier pulse width modulators for
three phase converters.
4.
Switching characteristics:-
(V7, 111)
(V0, 000)
Figure 1; Basic switching vectors and sectors
Comparison between sine wave PWM and space
vector pulse width modulation.
Vq1 := 0 + Vbn⋅ cos ( 30) − Vcn⋅ cos ( 30)
Space vector PWM
Generates less harmonics
distortions
Provides more efficient use
supply of voltages
Locus of reference vector is
the inside of a circle with
radius of 1
Vdc
3
Sine waver PWM
Generates high harmonics
distortions
Provides Less efficient use
supply of voltage
Locus of reference vector
is the inside of a circle with
radius of
1
2
Vdc
Voltage utilization: space vector PWM= 2
time sine
3
wave
5.
Vq1 = 0
Vq := Van +
3
2
Vbn −
3
2
Vcn
Vq = 230
⎛ Vq ⎞
α := atan ⎜
⎝ Vd ⎠
α = 0.332
⎛⎜ 1 −1 −1 ⎞ ⎛ Van ⎞
2 2 ⎟⎜
2
:= ⎜
⋅ ⎜ Vbn ⎟
⎜
⎝ Vq ⎠ 3 ⎜ 0 3 3 ⎟ ⎜
⎜ 2 2 ⎝ Vcn ⎠
⎝
⎠
V
⎛ d⎞ ⎛ 0 ⎞
=⎜
⎜
⎝ Vq ⎠ ⎝ 265.581⎠
⎛ Vd ⎞
Modelling of space vector with MathCAD
d. Step # 1 determination of Vd, Vq, Vref and
angle (a)
e. Step # 2 determination of time duration T1,
T2, T0
f. Step # 3 determination of switching time of
each transistor (S1 to S6)
A. Step # 1
Coordinates d-q Power transformation in the principle
ways
:abc to dq values refer to figure 2
2
Vref := Vd + Vq
2
Vref = 265.581
Figure 3: space vector calculation
Figure 2: voltage space vector and its components in (d,q)
Vd , Vq , Vref
Line_Voltage := 400
Van Vbn Vcn 230
Vd := Van − Vbn⋅ cos ( 60) − Vcn⋅ cos ( 60)
Vd = 668.11
Vd1 := Van −
Vd1 = 0
1
2
Vbn −
1
2
Vcn
Figure 4: space vector Locations
(
sin π
−α
3
sin(π )
3
π
sin
−α
3
∴ T 1 = Tz ⋅ α ⋅
sin(π )
3
∴ T 0 = Tz − (T 1 + T 2)
∴ T 1 = Tz ⋅ α ⋅
(
Figure 5: Time Duration Calculations
Tz :=
a :=
1
)
)
------------------ (21)
------------------- (22)
= 57⋅ 0.996 = 56.772
50
⎛ π − α⎞
⎝3
⎠
a = 0.996 T1 := Tz⋅ a ⋅
π⎞
⎛
sin ⎜
⎝ 3⎠
sin ⎜
Vref
2 ⋅400
3
T1 = 0.015
T2 := Tz⋅ a ⋅
sin ( α )
⎛π⎞
−3
T2 = 7.487 × 10
sin ⎜
T0 := Tz − ( T1 + T2)
b.
Figure 6: Time Duration Calculations
∴T 1 =
B. Step # 2 Determination of Time duration
[T1,T2,T0]
a. Switching time duration at sector # 1
T
∫V
ref
0
T
T 1+T 2
Tz
0
T1
T 1+T 2
= ∫ V 1dt +
∫ V 2dt + ∫ V 0dt
−3
T0 = −2.577 × 10
Switching time duration at any sector
[T1,T2,T0]
3 ⋅ Tz ⋅ Vref ⎛ ⎛ π
n −1 ⎞ ⎞
π ⎟⎟
⎜ sin ⎜ − α +
Vdc
3
⎠⎠
⎝ ⎝3
=
3 ⋅ Tz ⋅ Vref ⎛ ⎛ π
⎞⎞
⎜ ⎜ sin π − α ⎟ ⎟
Vdc
3
⎠⎠
⎝⎝
=
3 ⋅ Tz ⋅ Vref ⎛ ⎛ π
n
⎞⎞
⎜ ⎜ sin π cos α − cos π sin α ⎟ ⎟
3
3
Vdc
⎠⎠
⎝⎝
-------- (17)
∴ Tz • Vref = (T 1 • V 1 + T 2 • V 2)
⎝ 3⎠
------------ (18)
Tz =
Where,
Vref
1
......and ....α =
2
fs
Vdc ---------- (19)
3
And 'fs' is the fundamental frequency
⎡cos(α )⎤
⇒ Tz • | Vref | • ⎢
⎥
⎣sin(α ) ⎦
⎡cos(π )⎤
⎡1 ⎤
2
2
3 ⎥
= T 1 • • Vdc ⋅ ⎢ ⎥ + T 2 ⋅ ⋅ vdc ⎢
⎢
π
0
3
3
⎣ ⎦
sin( ) ⎥ ----- (20)
3 ⎦
⎣
where,0 ≤ α ≤ 60°
∴ T1 =
=
3 ⋅ Tz ⋅ Vref ⎛ ⎛
n −1 ⎞⎞
⎜⎜ sin⎜α +
π ⎟⎟
3 ⎠ ⎟⎠
Vdc
⎝ ⎝
3 ⋅ Tz ⋅ Vref ⎛ ⎛
n −1
n −1⎞⎞
⎜⎜ ⎜ − cosα ⋅ sin
π + sinα ⋅ cos
⎟⎟
Vdc
3
3 ⎠ ⎟⎠
⎝⎝
∴T 0 = Tz − T1 − T 2
Where " n =1" through 6 (that is, sector 1 to 6)
0 ≤ α ≤ 60°
6.
Determine the switching time of each transistor at
each operation sector ( S1 to S6)
Figure 10; SV PWM switching patterns at sector # 4
Figure 7; SV PWM switching patterns at sector # 1
Figure 11; SV PWM switching patterns at sector # 5
Figure 8; SV PWM switching patterns at sector # 2
Figure 12; SV PWM switching patterns at sector # 6
Figure 9; SV PWM switching patterns at sector # 3
7.
Switching Time table at Each Sector
Sector
Upper
switches
Lower switches (S4, S6, S2)
1
2
3
4
5
6
(S1, S3, S5)
S1 = T1+T2+T0/2
S3=T2+T0/2
S5=T0/2
S1 = T1+T0/2
S3=T1+T2+T0/2
S5=T0/2
S1 = T0/2
S3=T1+T2+T0/2
S5=T2+T0/2
S1 = T0/2
S3=T1+T0/2
S5=T1+T2+T0/2
S1 = T2+T0/2
S3=T0/2
S5=T1+T2+T0/2
S1 = T1+T2+T0/2
S3=T0/2
S5=T1+T0/2
S4 = T0/2
S6=T1+T0/2
S2=T1+T2+T0/2
S4 = T2+T0/2
S6=T0/2
S2=T1+T2+T0/2
S4 = T1+T2+T0/2
S6=T0/2
S2=T1+T0/2
S4 = T1+T2+T0/2
S6=T2+T0/2
S2=T0/2
S4 = T1+T0/2
S6=T1+T2+T0/2
S2=T0/2
S4 = T0/2
S6=T1+T2+T0/2
S2=T2+T0/2
Acknowledgement:I do appreciate for the powersys™ - France Management
and technical team for their technical support and
assistance to accomplish this project. powersys™ France
has render full support with their software PSIM 7.0 latest
version for the period of two years to analyse the viability
of PSIM in digital control system.
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