Advanced Digital Logic Design – EECS 303
http://ziyang.eecs.northwestern.edu/eecs303/
Teacher:
Office:
Email:
Phone:
Robert Dick
L477 Tech
dickrp@northwestern.edu
847–467–2298
Administration
Overview of course
Homework
Misc.
Outline
1. Administration
2. Overview of course
3. Homework
4. Misc.
2
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Today’s goals
1
Know how to get access to the resources you’ll need for this
course
Books, computer lab, website, newsgroup
2
Understand work and grading policies
3
Have a rough understanding of the topics we will cover
Have a rough understanding of an example design
4
You’ll soon be designing similar systems on your own
3
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Administration
Lecture notes handed out before class
PDF files posted after lectures
http://ziyang.eecs.northwestern.edu/∼dickrp/eecs303/
If something isn’t clear and you ask about it in class, I’ll
sometimes add more detail to the slides before posting
4
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Class prerequisites
ECE 203: Introduction to Computer Engineering
Need to have basic understanding of digital systems, logic gates,
combinational logic, and sequential logic
Need Unix experience (or need to catch up) since we will use the
Mentor Graphics tools on Sun workstations
Expect you to familiarize yourself with the basics of using this OS
on your own but will give some hints
Use search engine, e.g., google: “unix beginners”
http://www.ee.surrey.ac.uk/Teaching/Unix/ not a bad place to
start
5
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Class foundation for
EECS 347: Microprocessor System Projects
EECS 357: Introduction to VLSI CAD
EECS 361: Computer Architecture
EECS 362: Computer Architecture Projects
EECS 391: Introduction to VLSI Design
EECS 392: VLSI Design Projects
EECS 393: Design and Analysis of High-Speed Integrated Circuits
6
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Required book
M. Morris Mano and Charles R. Kime. Logic and Computer
Design Fundamentals. Prentice-Hall, NJ, fourth edition, 2008
7
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Reference books
Allen Dewey. Analysis and Design of Digital Systems With
VHDL. PWS Publishing Company, International Thompson
Publishing, 1997
Zvi Kohavi. Switching and Finite Automata Theory. McGraw-Hill
Book Company, NY, 1978
A. V. Aho, R. Sethi, and J. D. Ullman. Compilers principles,
techniques, and tools. Addison-Wesley, MA, 1986
Randy H. Katz. Contemporary Logic Design. The
Benjamin/Cummings Publishing Company, Inc., 1994
8
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Grading policies
Homeworks:
Labs:
Midterm exam:
Final exam:
25%
25%
20%
30%
of
of
of
of
grade
grade
grade
grade
Homeworks and labs due at beginning of class on due date
5% penalty for handing after start of class but still on due date
10% penalty per late working day
No credit if more than three working days late
9
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Grading style
Homeworks and some labs will be graded quite strictly
Learn from the feedback
See the TA or me if something doesn’t make sense
Don’t assume a 75% grade on the homework implies a C in the
course – it doesn’t
Will cover a limited amount material in lectures that does not
appear in the course textbook
However, you’ll have access to the full set of lecture notes
I will do my best not to make exams surprising
However, they won’t be easy and the best students in the class
probably won’t get 100% on the exams
10
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Lab assignments
Tried to make lab assignments get to the point w.o. wasting time
In this area, lab assignments necessarily require some time
May take you much longer than some other students if you need
to refresh your memory or fill in gaps in your background
You probably will not be able to finish labs on time if you start
them the day before they’re due
11
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Lab assignments
Tried to make lab assignments get to the point w.o. wasting time
In this area, lab assignments necessarily require some time
May take you much longer than some other students if you need
to refresh your memory or fill in gaps in your background
You probably will not be able to finish labs on time if you start
them the day before they’re due
11
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Lab work
Computer aided-design (CAD) software from Mentor Graphics
Sun workstations in the Wilkinson Lab (M338 Tech)
Lab Hours: Open
Topics
Tutorial on Mentor Graphics (simple logic)
Design of combinational logic
Design of sequential logic
Use of VHDL for combinational and sequential design
12
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Decide office hours
We can reschedule office hours based on your comments
Person
Robert Dick
Robert Dick
Day
Tuesday
Thursday
Time
5:00–6:00
5:00–6:00
Room
L477 Tech
L477 Tech
We’ll go to the Wilkinson Lab (M338 Tech) when requested.
13
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Subscribe to mailing list
Very useful for getting questions rapidly answered
If you email an academic question to the TA or me, we will post
the question and the answer to the newsgroup/mailing list but
remove your name
Send mail to “listserv@listserv.it.northwestern.edu”
No subject
Body of SUBSCRIBE ADLD [Firstname] [Lastname]
Send mail to “adld@listserv.it.northwestern.edu” to post
I will archive posts and make them available via the course web
page
14
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Outline
1. Administration
2. Overview of course
3. Homework
4. Misc.
15
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Section outline
2. Overview of course
Topics
Goals
Overview and review
Case study
16
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Course topics in context I
1
Boolean algebra (brief review)
Formulating problems as Boolean expressions
Can use to solve problems in many fields of engineering
2
Karnaugh maps (brief review)
Helps visualize problem in which adjacency is important
3
Quine–McCluskey (fairly quick coverage, depending on
background)
Covering
17
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Course topics in context II
4
Heuristic logic minimization
Complexity and algorithms
5
Implementation technologies
Useful starting point for prototyping designs
Implementation technologies are constantly changing
6
Graph definitions, critical path, and topological sort
Basic understanding of graph algorithms
7
Number systems, binary arithmetic (more detail, advanced
operations)
Fundamental meaning of mathematical operations
18
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Course topics in context III
8
Technology mapping
Covering
9
FSM design, non-deterministic intermediate representations
Compiler, languages, CS theory
10
Incompletely specified FSM state minimization
Covering
11
CAD software
Testing ideas in other fields, e.g., computer architecture
12
19
Testing (if time permits)
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Section outline
2. Overview of course
Topics
Goals
Overview and review
Case study
20
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Course goals I
21
1
Learn to manually design, optimize, and implement small digital
combinational circuits.
2
Have a basic understanding of the building blocks and
implementation technologies available to digital designers.
3
Understand how to use schematic capture software to design
digital circuits.
4
Be capable of doing automatic and manual timing analysis of
combinational circuits.
5
Be capable of using CAD software to automatically optimize
large digital combinational circuits and map them to a target
technology.
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Course goals II
22
6
Have a high-level understanding of the algorithms such synthesis
software uses (e.g., logic optimization and technology mapping).
This first portion of the course was dedicated to combinational
design. I went into depth on a few more advanced topics because
I wanted you to see some of the beauty of the algorithms used to
automatically design circuits, e.g., my description of portions of
the Espresso algorithm.
7
Understand how to design, optimize, and implement finite state
machines.
8
Understand that sequential behavior can be specified in different
ways and have a reasonably good understanding of how to start
from a few different types of specifications and end up with
working logic.
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Course goals III
23
9
Understand the differences between synchronous and
asynchronous finite state machines and know the advantages of
each.
10
Be capable of doing simple VHDL designs.
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Section outline
2. Overview of course
Topics
Goals
Overview and review
Case study
24
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Design, implementation, and debugging
design
time
Functionality
Constraints: Timing, area, power, price
Formally define abstract blocks
25
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Design, implementation, and debugging
design
implementation
time
Assemble primitive building blocks into hierarchical system
Choose among design alternatives after impacts explored
25
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Design, implementation, and debugging
design
implementation
debugging
time
Fault isolation: Design flaws, implementation flaws, component
flaws
Hypothesis formation and testing
Good design and implementation make debugging easier
4–5 hours → 12–14 hours
25
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Design, implementation, and debugging
design
implementation
debugging
time
25
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Design, implementation, and debugging
design
implementation
debugging
time
25
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Ambitious goal for synthesis
Start from single system-level description
Automatically build all hardware
Where do we start?
26
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Review: MOSFETs
gate
oxide
source (N)
drain (N)
silicon bulk (P)
27
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Relationship with CMOS
Metal Oxide Silicon
Positive and negative carriers
Complimentary MOS
PMOS gates are like normally closed switches that are good at
transmitting only true (high) signals
NMOS gates are like normally open switches that are good at
transmitting only false (low) signals
28
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Relationship with CMOS
Metal Oxide Silicon
Positive and negative carriers
Complimentary MOS
PMOS gates are like normally closed switches that are good at
transmitting only true (high) signals
NMOS gates are like normally open switches that are good at
transmitting only false (low) signals
28
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Relationship with CMOS
Metal Oxide Silicon
Positive and negative carriers
Complimentary MOS
PMOS gates are like normally closed switches that are good at
transmitting only true (high) signals
NMOS gates are like normally open switches that are good at
transmitting only false (low) signals
28
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
NAND gate
Therefore, NAND and NOR gates are used in CMOS design
instead of AND and OR gates
a
b
true
output
false
=
29
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
NAND gate
Therefore, NAND and NOR gates are used in CMOS design
instead of AND and OR gates
a
PMOS
b
true
output
false
NMOS
=
29
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Floorplanning
43
27
203
223
229
185
219
204
35
10
44
39
236
42
15
230
210
226
277
93
222
258
70
249 269
294
275
262
257
256
261
293
30
154
144
112
83
130
141
177
126
176
178
139 120
123
74
121
129
169
171 163
115
290
252
268
87
158
143
64
75
98
270
259
162
244
272 267
248
286
128
68
89
296
137
114
71
78
273
281
289
147
107 131
105
295
260
253
164
84
90
76
81 104
280
73
140
149
80 118 86
119
299
282
63
88
274
167
166
157
103
91
92
5
97
77
82
117
99
284
179
59
1
197
287
133
110
116 61
240
242
32
153
108
265
263
21
24
211
209
66
198
288
72
38
100
214
255 233
224
152 56
48
47
266
239
46
111
170
235 225
65
62
200
234
30
34
243
58
13
3
67
60
180
40
95
194
186
188 213
36
94 45
12
195
190
193
54
17
52
41
96
228
20
25
51
216
202 237
196
4
49
26
231
187 238
227
55
11
28
221
192
29
7
18
31
212
182 215
184
16
0
6
23
189
220 201
8
37
207
217
9
22
33
199
183
57
2
124
150
174
151
247
251
241
245
298
283 250
279
172
292
Robert Dick
297 161 79 165
134 168 138
173
136
146
145 148 160
142
156
Advanced Digital Logic Design
159
135
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Thermal analysis
Temperature (°C)
90
85
80
75
70
65
60
55
50
45
40
35
90
85
80
75
70
65
60
55
50
45
40
35
8
6
4
2
0
-2
-4
-6
-8
31
-8
-6
-4
-2
0
2
4
6
8
Position (mm)
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
New technologies
Insulator
Gate
(G)
Source
(S)
Island
Optional
second
gate (G2)
32
Junctions
Robert Dick
Drain
(D)
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Review: Boolean algebra
The only values are 0 (or false) and 1 (or true)
One can define operations/functions/gates
Boolean values as input and output
A truth table enumerates output values for all input value
combinations
33
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
AND
a
0
0
1
1
b
0
1
0
1
a∧b
0
0
0
1
a
b
a AND b = a ∧ b = a b
34
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
OR
a
0
0
1
1
b
0
1
0
1
a+b
0
1
1
1
a
b
a OR b = a ∨ b = a + b
35
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
NOT
a
0
1
a
1
0
a
NOT a = a
36
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Section outline
2. Overview of course
Topics
Goals
Overview and review
Case study
37
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study of simple combinational logic design –
seven-segment display
Given: A four-bit binary input
Display a decimal digit ranging from zero to nine
Use a seven-segment display
38
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study – seven-segment display
i3
0
0
0
0
0
0
0
0
1
1
39
i2
0
0
0
0
1
1
1
1
0
0
Robert Dick
i1
0
0
1
1
0
0
1
1
0
0
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study – Seven-segment
i3
0
0
0
0
0
0
0
0
1
1
40
i2
0
0
0
0
1
1
1
1
0
0
i1
0
0
1
1
0
0
1
1
0
0
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
Robert Dick
L1
1
0
1
1
0
1
1
1
1
1
L2
0
0
1
1
1
1
1
0
1
1
L3
1
0
1
1
0
1
1
0
1
0
L4
1
0
0
0
1
1
1
0
1
1
Advanced Digital Logic Design
L5
1
0
1
0
0
0
1
0
1
0
L6
1
1
1
1
1
0
0
1
1
1
L7
1
1
0
1
1
1
1
1
1
1
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study – Seven-segment
L1
L4
L6
L2
L5
L7
L3
40
i3
0
0
0
0
0
0
0
0
1
1
i2
0
0
0
0
1
1
1
1
0
0
i1
0
0
1
1
0
0
1
1
0
0
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
Robert Dick
L1
1
0
1
1
0
1
1
1
1
1
L2
0
0
1
1
1
1
1
0
1
1
L3
1
0
1
1
0
1
1
0
1
0
L4
1
0
0
0
1
1
1
0
1
1
Advanced Digital Logic Design
L5
1
0
1
0
0
0
1
0
1
0
L6
1
1
1
1
1
0
0
1
1
1
L7
1
1
0
1
1
1
1
1
1
1
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study – Seven-segment
L1
L4
L6
L2
L5
L7
L3
40
i3
0
0
0
0
0
0
0
0
1
1
i2
0
0
0
0
1
1
1
1
0
0
i1
0
0
1
1
0
0
1
1
0
0
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
Robert Dick
L1
1
0
1
1
0
1
1
1
1
1
L2
0
0
1
1
1
1
1
0
1
1
L3
1
0
1
1
0
1
1
0
1
0
L4
1
0
0
0
1
1
1
0
1
1
Advanced Digital Logic Design
L5
1
0
1
0
0
0
1
0
1
0
L6
1
1
1
1
1
0
0
1
1
1
L7
1
1
0
1
1
1
1
1
1
1
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study – Seven-segment
L1
L4
L6
L2
L5
L7
L3
40
i3
0
0
0
0
0
0
0
0
1
1
i2
0
0
0
0
1
1
1
1
0
0
i1
0
0
1
1
0
0
1
1
0
0
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
Robert Dick
L1
1
0
1
1
0
1
1
1
1
1
L2
0
0
1
1
1
1
1
0
1
1
L3
1
0
1
1
0
1
1
0
1
0
L4
1
0
0
0
1
1
1
0
1
1
Advanced Digital Logic Design
L5
1
0
1
0
0
0
1
0
1
0
L6
1
1
1
1
1
0
0
1
1
1
L7
1
1
0
1
1
1
1
1
1
1
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study – Seven-segment
L1
L4
L6
L2
L5
L7
L3
40
i3
0
0
0
0
0
0
0
0
1
1
i2
0
0
0
0
1
1
1
1
0
0
i1
0
0
1
1
0
0
1
1
0
0
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
Robert Dick
L1
1
0
1
1
0
1
1
1
1
1
L2
0
0
1
1
1
1
1
0
1
1
L3
1
0
1
1
0
1
1
0
1
0
L4
1
0
0
0
1
1
1
0
1
1
Advanced Digital Logic Design
L5
1
0
1
0
0
0
1
0
1
0
L6
1
1
1
1
1
0
0
1
1
1
L7
1
1
0
1
1
1
1
1
1
1
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study – Seven-segment
L1
L4
L6
L2
L5
L7
L3
40
i3
0
0
0
0
0
0
0
0
1
1
i2
0
0
0
0
1
1
1
1
0
0
i1
0
0
1
1
0
0
1
1
0
0
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
Robert Dick
L1
1
0
1
1
0
1
1
1
1
1
L2
0
0
1
1
1
1
1
0
1
1
L3
1
0
1
1
0
1
1
0
1
0
L4
1
0
0
0
1
1
1
0
1
1
Advanced Digital Logic Design
L5
1
0
1
0
0
0
1
0
1
0
L6
1
1
1
1
1
0
0
1
1
1
L7
1
1
0
1
1
1
1
1
1
1
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study – Seven-segment
L1
L4
L6
L2
L5
L7
L3
40
i3
0
0
0
0
0
0
0
0
1
1
i2
0
0
0
0
1
1
1
1
0
0
i1
0
0
1
1
0
0
1
1
0
0
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
Robert Dick
L1
1
0
1
1
0
1
1
1
1
1
L2
0
0
1
1
1
1
1
0
1
1
L3
1
0
1
1
0
1
1
0
1
0
L4
1
0
0
0
1
1
1
0
1
1
Advanced Digital Logic Design
L5
1
0
1
0
0
0
1
0
1
0
L6
1
1
1
1
1
0
0
1
1
1
L7
1
1
0
1
1
1
1
1
1
1
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study – Seven-segment
L1
L4
L6
L2
L5
L7
L3
40
i3
0
0
0
0
0
0
0
0
1
1
i2
0
0
0
0
1
1
1
1
0
0
i1
0
0
1
1
0
0
1
1
0
0
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
Robert Dick
L1
1
0
1
1
0
1
1
1
1
1
L2
0
0
1
1
1
1
1
0
1
1
L3
1
0
1
1
0
1
1
0
1
0
L4
1
0
0
0
1
1
1
0
1
1
Advanced Digital Logic Design
L5
1
0
1
0
0
0
1
0
1
0
L6
1
1
1
1
1
0
0
1
1
1
L7
1
1
0
1
1
1
1
1
1
1
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study – Seven-segment
L1
L4
L6
L2
L5
L7
L3
40
i3
0
0
0
0
0
0
0
0
1
1
i2
0
0
0
0
1
1
1
1
0
0
i1
0
0
1
1
0
0
1
1
0
0
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
Robert Dick
L1
1
0
1
1
0
1
1
1
1
1
L2
0
0
1
1
1
1
1
0
1
1
L3
1
0
1
1
0
1
1
0
1
0
L4
1
0
0
0
1
1
1
0
1
1
Advanced Digital Logic Design
L5
1
0
1
0
0
0
1
0
1
0
L6
1
1
1
1
1
0
0
1
1
1
L7
1
1
0
1
1
1
1
1
1
1
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study – Seven-segment
L1
L4
L6
L2
L5
L7
L3
40
i3
0
0
0
0
0
0
0
0
1
1
i2
0
0
0
0
1
1
1
1
0
0
i1
0
0
1
1
0
0
1
1
0
0
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
Robert Dick
L1
1
0
1
1
0
1
1
1
1
1
L2
0
0
1
1
1
1
1
0
1
1
L3
1
0
1
1
0
1
1
0
1
0
L4
1
0
0
0
1
1
1
0
1
1
Advanced Digital Logic Design
L5
1
0
1
0
0
0
1
0
1
0
L6
1
1
1
1
1
0
0
1
1
1
L7
1
1
0
1
1
1
1
1
1
1
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study – Seven-segment
L1
L4
L6
L2
L5
L7
L3
40
i3
0
0
0
0
0
0
0
0
1
1
i2
0
0
0
0
1
1
1
1
0
0
i1
0
0
1
1
0
0
1
1
0
0
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
Robert Dick
L1
1
0
1
1
0
1
1
1
1
1
L2
0
0
1
1
1
1
1
0
1
1
L3
1
0
1
1
0
1
1
0
1
0
L4
1
0
0
0
1
1
1
0
1
1
Advanced Digital Logic Design
L5
1
0
1
0
0
0
1
0
1
0
L6
1
1
1
1
1
0
0
1
1
1
L7
1
1
0
1
1
1
1
1
1
1
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study – Seven-segment
L1
L4
L6
L2
L5
L7
L3
40
i3
0
0
0
0
0
0
0
0
1
1
i2
0
0
0
0
1
1
1
1
0
0
i1
0
0
1
1
0
0
1
1
0
0
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
Robert Dick
L1
1
0
1
1
0
1
1
1
1
1
L2
0
0
1
1
1
1
1
0
1
1
L3
1
0
1
1
0
1
1
0
1
0
L4
1
0
0
0
1
1
1
0
1
1
Advanced Digital Logic Design
L5
1
0
1
0
0
0
1
0
1
0
L6
1
1
1
1
1
0
0
1
1
1
L7
1
1
0
1
1
1
1
1
1
1
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Case study – Seven-segment
L1
L4
L6
L2
L5
L7
L3
40
i3
0
0
0
0
0
0
0
0
1
1
i2
0
0
0
0
1
1
1
1
0
0
i1
0
0
1
1
0
0
1
1
0
0
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
Robert Dick
L1
1
0
1
1
0
1
1
1
1
1
L2
0
0
1
1
1
1
1
0
1
1
L3
1
0
1
1
0
1
1
0
1
0
L4
1
0
0
0
1
1
1
0
1
1
Advanced Digital Logic Design
L5
1
0
1
0
0
0
1
0
1
0
L6
1
1
1
1
1
0
0
1
1
1
L7
1
1
0
1
1
1
1
1
1
1
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Implement L4
i3
0
0
0
0
0
0
0
0
1
1
41
i2
0
0
0
0
1
1
1
1
0
0
i1
0
0
1
1
0
0
1
1
0
0
Robert Dick
i0
0
1
0
1
0
1
0
1
0
1
dec
0
1
2
3
4
5
6
7
8
9
L4
1
0
0
0
1
1
1
0
1
1
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
L4 implementation
L4
42
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Combinational vs. sequential logic
No feedback between inputs and outputs – combinational
Outputs a function of the current inputs, only
D flip−flops
plain old combinational logic
q
43
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Combinational vs. sequential logic
No feedback between inputs and outputs – combinational
Outputs a function of the current inputs, only
Feedback – sequential
D flip−flops
clock
plain old combinational logic
q
43
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Combinational vs. sequential logic
No feedback between inputs and outputs – combinational
Outputs a function of the current inputs, only
D flip−flops
clock
plain old combinational logic
q
43
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Sequential logic
Outputs depend on current state and (maybe) current inputs
Next state depends on current state and input
For implementable machines, there are a finite number of states
Synchronous
State changes upon clock event (transition) occurs
Asynchronous
State changes upon inputs change, subject to circuit delays
44
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
What can we do?
Finite state machine design
45
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
What can we do?
Finite state machine design
Logic minimization
45
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
What can we do?
Finite state machine design
Logic minimization
Implementation with gates
45
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
What can we do?
Finite state machine design
Logic minimization
Implementation with gates
Need a lot more depth, and a lot more detail!
45
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Ambitious goal for synthesis
Start from single system-level description
Automatically build all hardware
Where do we start?
What are the fundamental barriers?
What new discoveries are necessary?
46
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Conventional synthesis
system level
47
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Conventional synthesis
system level
behavior level
47
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Conventional synthesis
system level
behavior level
register−transfer level
47
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Conventional synthesis
system level
behavior level
register−transfer level
logic level
47
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Conventional synthesis
system level
behavior level
register−transfer level
logic level
layout level
47
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Conventional synthesis
system level
behavior level
register−transfer level
logic level
layout level
transistor level
47
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Conventional synthesis
system level
behavior level
register−transfer level
logic level
layout level
transistor level
47
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Conventional synthesis
system level
47
behavior level
behavior estimation
register−transfer level
register−transfer est.
logic level
logic estimation
layout level
layout estimation
transistor level
transistor estimation
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Status and approach
Understand a few combinational logic design techniques
Much left to learn
Have scratched the surface of sequential logic design
Much left to learn
Little knowledge of automation and its fundamental barriers
Approach: Start from the core we learned in EECS 203
Build breadth and depth
48
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Topics
Goals
Overview and review
Case study
Combinational design
Let’s start by reviewing combinational design
A lot of amazing stuff will build upon this later
49
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Outline
1. Administration
2. Overview of course
3. Homework
4. Misc.
50
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Get Wilkinson lab account
Confirm that you are registered for the course at
http://courses.northwestern.edu/
The administrators have a list of students.
They will create accounts and add physical access to M334 to
your card.
51
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Introductory reading assignments
In general, reading assignments will cover material that will be
presented in the next class.
It may seem like a lot but most should be review from EECS 203.
Even if you think you remember the material from EECS 203,
spend a few minutes with the book to confirm.
M. Morris Mano and Charles R. Kime. Logic and Computer
Design Fundamentals. Prentice-Hall, NJ, fourth edition, 2008
Chapters 2, 3, and 4
52
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Outline
1. Administration
2. Overview of course
3. Homework
4. Misc.
53
Robert Dick
Advanced Digital Logic Design
Administration
Overview of course
Homework
Misc.
Computer geek culture
RLE
Compression geek culture: compression = prediction =
classification
54
Robert Dick
Advanced Digital Logic Design