Spurious Reduction
Techniques in Fractional-N
S th i
Synthesizers
HF Technology Seminar 2012
Technishe Universiteit Eindhoven
Greg Bachmanek
Applications Engineer
Hittite Microwave Canada
1
Hittite Microwave Confidential
April 13, 2012
Hittite Microwave = High Performance
Hittite Microwave Corporation designs and
develops High performance IC’s
IC s, modules
modules,
subsystems and instrumentation for technically
demanding digital, radio frequency (RF),
microwave
i
and
d millimeterwave
illi t
applications
li ti
covering the frequency range of DC to 110 GHz.
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April 13, 2012
Presentation Agenda
3
1.
Fractional-N PLL Basics
2
2.
Spurious modulation concepts in brief
3.
Power supply effects
4
4.
F
Fractional
ti
l modulation
d l ti
modulus
d l effects
ff t and
d their
th i elimination
li i ti
5.
Integer boundary and higher order spurious
6.
Isolation, and two-chip fractional synthesizers for low spurious
7.
Tunable Crystal Solution for elimination of in-close spurious
8.
LDOs to minimize the effect of phase noise and jitter through the
supply voltage
9.
Fixed frequency
f
mode products to eliminate expensive TCXOs
C O
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April 13, 2012
Fractional-N PLL Basics
Reference
Phase
Frequency
Detector
Reference
Divider
freff
Loop
p Filter
fPD
/R
Crystal
O ill t
Oscillator
Charge
Pump
fPD
θR
Output
Divider
VCO
fVCO
PFD
CP
/M
fVCO
M
θO
RF Divider
/N
GOAL
GOAL:
θR = θO
4
ΔΣ
Delta Sigma
g
Modulator
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N x fPD
A phase-locked loop
divides down the feedback
VCO frequency and forces
it’s
it
s output phase to follow
the input reference phase
April 13, 2012
Phase Modulation Model
 Small signal approximation of phase modulation
with FM index , at an offset fm, where  
V(t)
=
cos( ot + sin(mt) )
=
1 - cos(mt) +  cos(-mt)
at o=0

 Peak Phase
m
/2)2
m
sidebands
-m o
power
amplitude
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+ m
+
April 13, 2012
Modulation Sidebands
(fm) = (/2)2 = (f/2fm)2
 A VCO which is deviated by f Hz at an offset
freq
q fm, has FM index of  = f/fm
 Modulation sideband power at offset fm will be
20log(/2) dBc relative to the carrier
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April 13, 2012
Modulation Example
 10uV of modulation at 10kHz with a VCO
sensitivity of 100MHz/V will cause -46dBc
46dBc
sidebands on VCO
Kvco = 100MHz/V
Vn = 10uV at 10kHz
-46dBc
(fm) =
(10kHz)dB
(10uV*100MHz/10kHz) = 10-2
= 20log(/2)
=
-46dBc
-10kHz
10kHz fo +10kHz
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April 13, 2012
VCO Power Supply Pushing
 The power supply pushing spec works in a
similar fashion, but supply pushing is lower
5V Supply
Kpush = 20MHz/V
10kHz
10uV
Kvco = 100MHz/V
-60dBc
GND
push(fm) = 10uV*20MHz/10kHz = 2x10-3
(10kHz)dB = 20log(/2) = -60dBc
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-10kHz fo +10kHz
April 13, 2012
PLL Design Tool for Phase Noise
 Our PLL Design Tool can be downloaded from www.hittite.com
PLL Phase Noise Analysis
y
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April 13, 2012
Open Loop Regulator Noise
 Regulator Noise Density Vn(fm) effect on VCO Pushing
HMC976 R
Regulator
l t N
Noise
i D
Density
it
3nV/rt-Hz
5V Supply
HITT PLL Regulator
R
l t Noise
N i Sim
Si
Kpush = 20MHz/V
Ideal VCO Noise
2vco(fm)
Kvco
GND
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2R(fm)
April 13, 2012
Reference Harmonics




Reference is a fast square wave to keep Ref path gain low
Harmonics at 2GHz only down ~32dB
VCO Gain near carrier
VCO g
gain near carrier about 64dB
is about 64dB
Charge pump includes even harmonics
0dB
9.5dB 9.5dB
16.9dB
-110dBc/Hz
== -110dBm/Hz
31.8dB
3
8d 32.7dB
32 7dB 33.1dB
33 1dB
~0dBm
50
fo
150
3fo
250
5fo
350
7fo
1950
39fo
2050
41fo
2150
43fo
VCO
Ref
PLL
KT
-174dBm/Hz
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April 13, 2012
Integer Boundary Spurs (IBS)
 Operation near a harmonic of ref (Integer Boundary) causes spurs
 Need very large isolation, -60dBc spurs = 0-32 + 64 -(-60) = 92dB !!
 Very
y difficult to achieve
 Power supplies, substrate isolation, device coupling, etc
VCO Gain near carrier
is about 64dB
-110dBc/Hz
== -110dBm/Hz
0dB
-9.5dB -9.5dB
-16.9dB
50
fo
150
3fo
250
5fo
350
7fo
1950
39fo
2050
41fo
2150
43fo
VCO
Ref
~0dBm
-31.8dB
31.8dB-32.7dB
32 7dB -33.1dB
33 1dB
PLL
KT
-174dBm/Hz
1950M
39fo
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April 13, 2012
Dual-Chip Fractional Synthesizer
HMC983LP5E
HMC984LP4E
 Prescaler Chip
 20
Bit RF Resettable Divider
20-Bit
 48-Bit Delta Sigma Modulator
 Phase coherent Sweeper Function
 Trigger Delay Function
 Variable
V i bl Output
O t t Duty
D t Cycle
C l
 Differential RF Input / Output
 PFD-CP Chip
 Ultra Low Noise Differential PFD
 -230/-227 Integer/Frac Mode FOM
 Better than -65 dBc Frac Spurious
 14-bit Reference Divider
 Single
Si l Ended
E d d Programmable
P
bl
2.5mA Charge Pump Output
1
SPI
1
5
3
Digital
SPI, 48-bit DSM
VCO SPI
GPIO
3
GPIO
SPI
1
Digital
Controls, Lock Detect, CSP
4=Sweep Trigger
3
TCXO
xtal
M-Counter
Vtune
(Lock Detect)
REF
CSP Signals
N-Divider
VCO Divided Clock
CML
PFD
To Vtune
CP
LPF
VCO
Separate chips = More Isolation between RF Divider and PFD = BETTER Spurious
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April 13, 2012
Fractional Division Using 
 Fractional synthesizer divides by a rational
number, N = Ni + Nf
Integer Number
0< Rational Fraction <1
VCO
Ref
PD
fout = fref * (Ni + Nf)
fout = fref * (Ni + k/M)
/N
k M are IIntegers,
k,
t
0<=
0< k<M

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Hittite Microwave Confidential
April 13, 2012
Channels Spurs and The Modulus
 Radios often need to work on decimal channel
spacings ie: 100kHz
 Some fractional PLLs achieve exact spacings
p
g
by shortening the modulus to a decimal number
 For Example: 25MHz PD with 240kHz exact
channel spacing used modulus M = 40000
fout = fref * (Ni + k/40000)
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April 13, 2012
Channels Spurs and The Modulus
Exact Frequency Mode uses
Full 24 bit Accumulator, yielding
much better Spur performance
fout = fref * ((Ni + k/2
/ 24)
16
Decimal Modulus makes
channel Spurs on all channels
fout = fref * (Ni + k/40x103)
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April 13, 2012
Determining Best Offset Current
Linear Phase
Detector
17
Charge
Pump
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April 13, 2012
Determining Best Offset Current

Offset Pump = Zero
VR
VO
+iout
Poor Phase Noise
Poor Linearity
with
ith Z
Zero Off
Offsett
pdf
p
Compressed
Pump
Compressed
DN Pump
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
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April 13, 2012
Determining Best Offset Current
Offset Pump, 50MHz PFD,
6GHz VCO at prescaler,
= 3.1nsec offset == 400uA
3.1ns at 50MHz == 56deg
offset
Avg Offset 56 Degrees
+ioutt
400uA

Avg Offset 56 Degrees
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April 13, 2012
Integer Boundary Considerations
 When VCO is close to a Harmonic of the PD then
modulator energy lands inside the VCO loop BW
 When VCO is close to a sub-harmonic of the PD then
gy lands inside the VCO loop
p BW
modulator energy
Fvco/N = FPD
N





24
bits

/N
3
bits
fvco
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April 13, 2012
Integer Boundary Considerations
 Spurs are located at order x offset
 VCO at 10kHz from PD ½ harmonic will have a spur at +/-20kHz
 VCO at 10kHz from PD 1/3 harmonic will have a spur at +/- 30kHz
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April 13, 2012
Fractional Spur Analysis
Fractional Synthesizer Typical 5th Order Spur Plot
-40
-50
Copyright Hittite Microwave
PFD Freq 100.0MHz
Ch
Channel
l1F
Freq 1770.000MHz
1770 000MH
Channel Step 100kHz
Loop Bandwidth 100kHz
N=18
Worst Case Spur (dB
Bc)
1st Order
2nd Order
3dO
3rd
Order
d
4th Order
5th Order
N=19
N=20
-60
1/3
1/2 2/3
Worst case spur
p near
the 20th integer boundary
is -60dBc
1/3 1/2 2/3
-70
1/4
3/4
-80
Worst case spur near
the 1/4 integer boundaries
is -80dBc
-90
-100
1800
1850
1900
VCO Frequency (MHz)
1950
2000
W
Worst
t case spur near the
th 1/10 integer
i t
boundaries is typ >-100dBc!!
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April 13, 2012
Method to Eliminate Spurs
 Operating the Fractional PLL in the 5% to 15%
region results in spurs -100dBc
 Therefore need a tunable Crystal!
25MHz to 100MHz Tunable Reference Output
Crystal
Oscillator
HMC830 PLL VCO
fout = fref * ((Ni + k/224)
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HMC830 PLL VCO
where
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0.05 < k/224 <0.15
April 13, 2012
Cascaded Configuration to Eliminate Spurs
25MHz to 100MHz Tunable Reference Output
Crystal
Oscillator
HMC830 PLL VCO
HMC830 PLL VCO
 One HMC830 PLL-VCO used as a
Tunable Reference is cascaded
with another PLL-VCO
 Algorithm determines what output
value of the Tunable Reference will
virtually eliminate the integer
bo ndar spurious
boundary
sp rio s at an
any gi
given
en
VCO frequency
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April 13, 2012
Cascaded Configuration to Eliminate Spurs
Phase Noise Performance of the
HMC830 PLL-VCO when used
as a Tunable Reference Source
Go from a typical -52dBc Spur
to a -100dBc
100dBc Spur !!!
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April 13, 2012
Ultra Low Noise Voltage Regulators
HMC1060LP3E – Features










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HMC976LP3E - Features
4 outputs: 2x 50mA & 1x 100mA (3.3V default), 1x 300mA (5V default)
Programmable proportional with temperature outputs (PTATB to grd)
Thermal protection
Low noise:
7nV/rtHz at 1KHz offset
3nV/rtHz at 10kHz offset
High PSRR at high frequency
All output voltages adjustable with one resistor (per regulator)
5V output setting by grounding HVx (HV1,HV2,HV3)
<1uA power down current
3x3mm LP3 package
Class 2 HBM ESD (>2500V)
 High current output: 400mA
 Ultra Low Noise:
6nV/rtHz at 1KHz offset
3nV/rtHz at 10kHz offset
 120mV minimum In-Out voltage drop
 Output voltage adjustable with one resistor
 5V output setting by grounding pin HV
 Thermal shutdown
 3x3mm
3 3
LP3 package
k
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April 13, 2012
HMC976LP3E Regulator Performance
-8 0 d B V /H z = 1 0 0 u V /rtH z
-1 0 0 d B V /H z = 1 0 u V /rtH z
-1 2 0 d B V /H z = 1 u V /rtH z
E 3 6 3 1 A “ L o w N o is e ” L a b
P o w e r S u p p ly, T yp ~ $ 1 5 0 0
-1 4 0 d B V /H z = 1 0 0 n V /rtH z
-1 6 0 d B V /H z = 1 0 n V /rtH z
-1 8 0 d B V /H z = 1 n V /rtH z
K T T h e rm a l N o is e
-1 8 5 d B V /H z = 0 .5 4 n V /rtH z
H M C 9 7 6 L P 3 R e g u la to r N o is e
w h ile d rivin g H M C 5 1 3 L P 5 V C O
in 5 0 O h m s
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April 13, 2012
HMC1060LP3E Regulator Performance
HMC1060LP3E NOISE AMBIENT VR1=100mA,VR2,3=50mA, VR4=300mA
VR4 25°C
VR3 °C
VR2 °C
VR1 25°C
1.00E‐04
OUTPUT CAPS 10uF, VREF CAP 1uF
1.00E‐05
0.1OHM IN SERIES WITH VR1,VR4
NOIS
SE V√Hz
1.00E‐06
1.00E‐07
1.00E‐08
1.00E‐09
1.00E‐10
1.00E+00
1.00E+01
1.00E+02
1.00E+03
1.00E+04
1.00E+05
1.00E+06
1.00E+07
1.00E+08
OFFSET Hz
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April 13, 2012
HMC1031MS8E Clock Generator with Integer-N PLL
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Features
Typical Applications
 8-pin MS8 package
 PFD/ 50uA Charge Pump
 4-bit VCO Divider
 Fixed ratios: 1/5/10
 2-Bit Control
 Lock Detect Function
 Low Current < 2mA Typical
 Power Down Function
Fixed ratio PLL to phase lock VCXO’s
to a reference frequency
q
y




Low Jitter Clock Generation
Low Bandwidth Jitter Attenuation
Low Frequency
y PLL
Test Automation to phase lock DUT to
Instrument Reference Frequency ie: 10MHz
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April 13, 2012
Applications Engineering Contacts:
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Don Young
don young@hittite com
don.young@hittite.com
Tel. 1 613 216-2476 ext. 234
Greg Bachmanek
greg.bachmanek@hittite.com
Tel. 1 613 216-2476 ext. 255
Hittite Microwave Canada
380 Hunt Club Road
Suite 100
Ottawa, Ontario
Canada
K1V 1C1
Hittite Microwave Canada
380 Hunt Club Road
Suite 100
Ottawa, Ontario
Canada
K1V 1C1
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April 13, 2012
Thank You
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April 13, 2012