40
CHAPTER 2
AN ANALYSIS OF LC COUPLED SOFT SWITCHING
TECHNIQUE FOR IBC OPERATED IN LOWER
DUTY CYCLE
2.1
INTRODUCTION
Interleaving technique in the boost converter effectively reduces the
ripple current as a function of duty cycle ( ). Hence a heightened soft
switching technique with duty cycle analysis for an IBC’s designed and
proposed in this thesis. An interleaved topology improves converter
performance at the cost of additional inductor, power switching devices and
output rectifiers (Kosai et al 2009). The soft switching process in the
proposed boost converter has less effect on the input/output voltage
relationship and the duty cycle, because the current commutation period is
very short and the circulating current is much smaller than the input current.
As the duty cycle approaches 0 percent, 50 percent and 100 percent, the sum
of the two diode currents approaches DC. At these points, the output capacitor
alone has to filter the inductor ripple current (Michel 2007). The conventional
boost converter is not suitable for the practical devices that produce low
voltage levels, requiring large step up voltage and also to obtain high gain.
Hence the lower duty cycle IBCs can be effectively used in the above kinds of
applications.
41
Battery power systems often need series of stack cells to achieve
higher voltage for high power applications. Based on the requirement, the
device may operate in different duty cycles (lesser than 50% and greater than
50%). Normally, a circuit will have different functionality when the nature of
input changes. Hence, for any device, a stable power conversion system is
necessary for smooth operation. To meet the above necessary requirement, a
soft switching IBC mechanism is designed and analyzed in this thesis at
various levels of duty cycle and analyzing the converter with less than 50% is
proposed in this chapter.
2.2
PROPOSED
CIRCUIT
OF
HEIGHTENED
SOFT
SWITCHING TECHNIQUE FOR IBC
The proposed circuit of heightened soft switching technique for
IBC to be used in analysis of both lower duty cycle and higher duty cycle is
shown in Figure 2.1. The circuit consists of two main switches (
an auxiliary switch
diodes (
and
, three diode rectifiers (
and
),
) and two clamped
). Each switch is driven by its self-parasitic capacitance and
diode. To maintain the stable output voltage, a coupling capacitor is used. The
circuit has two boost inductors
and
that utilizes the basic IBC
topology structure and applies enhanced soft switching methodology by
forming resonant tank in the auxiliary circuit, where the resonant tank itself
triggers the switches for extreme condition. The resonant tank is composed of
resonant capacitor
and resonant inductor
control circuit for the auxiliary switch
which in-turn acts as a
, that is responsible for ZVS and
ZCS function. The circuit is analyzed in CCM with various load ranges.
42
Figure 2.1 Proposed LC resonant tank interleaved boost converter
2.2.1
Principle of Operation
The circuit is operated in fundamental mode with duty cycle which
is exactly symmetrical in function. The circuit is analyzed with certain
assumptions for simplification listed as below:
All switches and diodes are assumed to be in practical condition
with an exponential decay ( ) in the computation for theoretical
analysis.
Idealizing the input and output reactance.
The two boost inductors are equal and magnetically coupled.
Same duty cycles (
Boost inductors
and
) for the main switches
and
.
are energized by the magnetic flow
across the inductor causing fluctuation in the input current. The flow of
43
current in initial phases through the boost inductor has an effect of
interference that results in addition of ripples. Thus, for the ripple free initial
input current, a guard is introduced with magnetic couple by a ferrite core
which has high permittivity. As the flow of current is regulated by the
magnetic coupling across the inductors, the coupling is more effective.
The mutual inductance (
whose inductances are
and
) exerted by both the boost inductors
respectively, is given by the equation (2.1) in
which the inductance depends on the coupling coefficient
permeability (
) and the relative
) of the coupling core.
=
(2.1)
According to the circuit theory, the coupled inductor can be
realized with an uncoupled inductor which needs an additional inductor for
coupling. The coupled inductors have leakage inductance
`
due to the
presence of parasitic elements that can be measured by the difference of
inductance and the mutual inductance. The leakage inductances of boost
inductors
and
are given in the equations (2.2) and (2.3).
(2.2)
(2.3)
These leakage inductances have major influence over the input
current ripple. Also by regulating the coupling coefficient, the amount of
ripples in the input current can be controlled.
The output current ripple from the inductor depends only on the
leakage inductance. The current ripple in the inductor calculated as given in
equation (2.4), is the amount of change in current with respect to change in
44
time while flowing through the inductor. Thus the ripple is caused majorly
due to the leakage inductance in the boost inductor.
=
=
=
(2.4)
The output voltage ( ) influences the change in current through
the inductors and are represented as
and
. The overall current (I) in the
converter is given by the equation (2.5), which is the hypotenuse cosine
function of the capacitance. The total current in the converter increases till an
optimum level and becomes stable thereafter, which is regulated by using the
hypotenuse cosine function.
=
cosh
(2.5)
The current in equation (2.5) depends on total resonance
capacitance (
), interval of time (
/(
(
capacitance (
),
) of switch
resonant capacitor (
), the shunt capacitance
) and the
parasitic
. The significance of the equation is that
overall effectiveness of current sharing of the converter is predetermined from
the inductor current. Flow of current through the two main switches is
calculated by the following equations (2.6) and (2.7).
=
=
(2.6)
(
)
(2.7)
The above current depends on the duty cycle of the reverse
recovery time (
), response time of the converter (
resonant tank (
), which will have major influence in current sharing. As
) and duty cycle of the
45
both the switches are operated in same duty cycle and symmetrical, the
current shared between the switches are equal.
The overall cycle time of the inductor output current with or
without ripples can be expressed in terms of propagation time ( ) of the
inductor current, which usually specified as a function of line frequency of
range 50Hz or 60Hz.
= 2.37 log
(2.8)
In this consideration of the switch
to the main switch
, the total power (
) applied
is given by the expression (2.9). The resistance (R) in
the parasitic elements contributes the maximum power usage in the switch.
= 2(
))
(2.9)
The current during the propagation in the switch for a complete
, which the total current is accumulated from the
cycle is given as
inductor. Thus, the current is linear to the switch and is given as the total
current ( ) from the inductor.
( )
=
(2.10)
Finally, upon substituting the known parameters, the propagation
current of the switch is expressed in the equation (2.11)
=
(
)
sinh
The overall output current
+
+ cos
(2.11)
in the converter is calculated as the
integral of inductor current. The parameters used in the above equation are
inductor current (
) of boost inductor
, capacitance (
) of auxiliary
46
switch, capacitance (
) of main switch
. The current flow purely depends
on the resonant circuit. The resonant voltage controls the switching time. It is
an inevitable fact that in practical conditions, it is not possible to produce the
duty cycle exactly at 50%. Hence, the design is analyzed in duty cycle (D)
lesser than 50% and greater than 50 %.
2.3
ANALYSIS
OF
PROPOSED
SOFT
SWITCHING
TECHNIQUE FOR IBC OPERATED IN LOWER DUTY
CYCLE
The proposed IBC achieves ZCS and ZVS, which depends on duty
cycle of operation. The variation in duty cycle also affects the time of
achieving the same. Thus, the converter must be analyzed with various levels
of duty cycle. This helps in choosing the best converter for the specific
requirement application. Operational analysis is done for the proposed IBC to
know the level of performance when it is operated in duty cycle lesser than
50%. There are sixteen operational phases in one complete cycle. Out of
which, eight phases are related to main switch SS1 and the other are related to
main switch SS2. Based on the analysis the output is equal for both the
switches, due to the symmetrical nature of the interleaving circuit. The
corresponding analytical equations are derived to illustrate the same.
For a particular time period, the driving voltage signals of main
switches and auxiliary switch along with the current flowing through the
inductors are shown clearly in Figure 2.2. The different duty cycle with
respect change in state of components are also shown with the variation in
time. The related waveform of switching phases under the same condition is
shown in Figure 2.3. The currents and voltages of all switches are also
represented along the change in phase. Figures 2.4 - 2.11 shows the active
paths of the converter during this duty cycle operation.
47
t
Figure 2.2 Driving signal of the switches (D<50%)
Figure 2.3 Switching phases when it is operated under D<50%
48
The active phases are dealt based on different time intervals. The
time interval depends on the state of the component in the converter. Hence,
the time interval is not uniform.
Phase I [
2.3.1
]
Figure 2.4 describes the active current flow path between the time
period
vary
and
due
. In this phase, the initial voltage applied to the switch tends to
to
the
magnetic
coupling
in
the
inductor.
Now
the
diode
becomes active, which acts as a rectifier diode. The clamped
diode
is turned off by the positive input cycle. At this juncture, the control
of switches are excited by pulse which is meant to turn off the
switches
. Hence the parasitic capacitance
,
attached with the
main switches and coupling capacitance share equal voltage and gets charged.
DS
Dr
Dc
Dr2
BL1
Dr1
BL2
Cvar
Lrc
Iin
+
Crc
Vin
L
O
A
D
+
Vo
-
Cc
SS1
DS1
+
CS1
VS1
-
Dax
Sax
Cax
DS2
SS2
CS2
+
VS2
-
Figure 2.4 Active current flow path in phase I
The voltage across the parasitic capacitor of main switch (
), coupling capacitor
and
are equal to the output voltage ( ), i.e.
49
. Thus, at the end time the resonant inductor shares the
voltage applied across the circuit and the rectifier diode gets turned off. Under
this circumstance, the time interval can be calculated by the equation (2.12),
and voltage output(
which depends on the boost inductor current
).
(2.12)
The time interval of the phase I is given as the ratio of current and
output voltage. The output voltage is pre-calculated by the duty cycle ratio.
2.3.2
Phase II [
]
Figure 2.5 represents the active current flow path between the time
period
and
. In this phase, the resonant inductor voltage gradually
increases to the peak value and voltage of the main switch gets reduced to
lower values and tends to become zero at last. As a known consequence, the
resonance occurs among parasitic capacitance in switch
(
), coupling capacitance (
,)
capacitance in switch
inductance (
(
,)
parasitic
and resonant
). Due to this resonance occurrence that provides sufficient
change in driving current across the circuit, the diode
is turned ON. The
time taken for the occurrence of resonance is given in the equation (2.13),
which depends on the resonant frequency of the tank.
=
=
(
)
The amount of current induced in the resonant tank (
through the resonant inductor
(2.13)
) flowing
is given in the equation (2.14). This is the
sum of input current from the boost inductor and the current due to the
resonance.
50
( )
+
+
(2.14)
The total impedance between the switch and the resonance is given
by
. The impedance is only due to the reactive elements present in the
switch.
Total impedance (
)=
(2.15)
) is the total resistance across the
The equivalent resistance (
converter during the flow of current.
DS
Dr
Dc
Dr2
BL1
Dr1
BL2
Cvar
Lrc
Iin
+
Crc
Vin
L
O
A
D
+
Vo
-
Cc
SS1
DS1
+
CS1
VS1
-
Dax
Sax
Cax
DS2
SS2
CS2
+
VS2
-
Figure 2.5 Active current flow path in phase II
The angular frequency (
) of the resonant elements present in the
active phase is given by the equation (2.16), in which the resonant capacitor is
neglected, as the reactance is cancelled by the parasitic capacitance in the
auxiliary switch.
=
[
]
(2.16)
51
In this phase, the resonant circuit gives additional control to the
driving circuit which helps in the reduction of switching phases of the
converter.
Phase III [
2.3.3
]
At the end of Phase II, the main switch voltage
zero. So the diode of switch
is turned ON at the end of
denotes the active current flow path between the time period
decreases to
. Figure 2.6
and
. In this
phase, though the main switch has the ability to achieve ZVS, the starting
time
of the auxiliary switch
needs additional time to achieve ZVS due
to the series resonance which causes maximum voltage across the switch. At
the end of this phase, the main switch (
) exhibits ZVS during turn ON,
before the current starts increase to the next phase.
DS
Dr
Dc
Dr2
BL1
Dr1
BL2
Cvar
Lrc
Iin
+
Crc
Vin
L
O
A
D
+
Vo
-
Cc
SS1
DS1
+
CS1
VS1
-
Dax
Sax
Cax
DS2
SS2
CS2
+
VS2
-
Figure 2.6 Active current flow path in phase III
The maximum time of phase III is the total time from the initial
phase to the initialization of the III phase. The time is given as
52
[
+
]
(2.17)
The sum of time is expressed in the equation (2.17) based on the
circuit elements. When
current
tends to turn ON. The
then the rectifier current is expressed as,
=
(
+
The time
)
[
(2.18)
]
is the maximum time to complete the Phase III.
Phase IV [
2.3.4
, then
]
Figure 2.7 indicates the active current flow path between the time
period
and
. In this phase, the clamp diode
is turned off. Here the
) charge is transferred to the coupling capacitor (
boost inductor
resonant capacitor (
) and
).
DS
Dr
Dc
Dr2
BL1
Dr1
BL2
Cvar
Lrc
Iin
+
Crc
Vin
Cc
SS1
DS1
+
CS1
VS1
-
Dax
Sax
Cax
DS2
SS2
CS2
Figure 2.7 Active current flow path in phase IV
+
VS2
-
L
O
A
D
+
Vo
-
53
The applied boost current to the capacitor energizes the parasitic
capacitors at
and
of the auxiliary switch and is transferred to the
resonant inductor at ( ), which is given at
. The current in the
resonance circuit is altered in this phase.
The resonant inductor current is given in the equation (2.19) which
describes the resonance effect that takes place in the converter.
( )=
(
+
)
(2.19)
The above equation is complex in calculation. Hence, it is
simplified by neglecting the series capacitance and after the integration, the
signal result is given as in equation (2.20),
( )=
(
)
(
)
(2.20)
The capacitance ( ) of the circuit is the total capacitance of resonance
capacitance and coupling capacitance (
=
is given by
2.3.5
Phase V [
). The series capacitance
.
]
Figure 2.8 specifies the active current flow path between the time
period
and
. In this phase, the clamp diode
is turned to ON state. Thus
the energy in the resonant circuit starts to discharge. The energy is transferred
to output load via clamped diode
switch
and it is turned on when the auxiliary
is turned ON by the control from resonant circuit. Thus the time
gap between the two phases IV and V is given by the equation (2.21). From
54
this, the circuit control is transferred to the resonant tank that produces
sustained control signal for controlling the operation of switches.
[
]
(2.21)
The time is dependent on the duty cycle of the resonant tank (
).
The overall execution time of this phase depends on active time of switch
(i.e., time after ZVS).
( )
( )
(2.22)
In this phase, the current is constant, as there is no additional supply to
the resonant tank from the boost inductor.
The currents of the resonant tank between t4 and t5 are almost equal.
Figure 2.8 Active current flow path in phase V
( )
(
)
sinh
(2.23)
55
The current is simplified to be a linear model of boost
converter
( )
.
Here the resonance tends to increase linearly with time as the
boost current helps the resonant circuit to produce sustained oscillations and
with the help of clamp diode, a pulse train control is imparted to the auxiliary
switch.
2.3.6
Phase VI [
]
Figure 2.9 refers the active current flow path between the time
period
and
. In this phase, the resonant circuit current
linearly until it reaches
and the rectifier diode current
increases
decreases to
‘0’. This state is called critical state where the rectified input to the switches is
zero. So the switch
tends to achieve ZCS. So the main switch exhibits
ZCS at phase VI, whereas at phase III it exhibits ZVS. The time taken for
achieving the intermediate state (before voltage starts increase) is given by
equation (2.24).
(2.24)
The time between the intermediate phase and the time for achieving
ZCS is given in the equation (2.25)
=
=
(
)
(2.25)
Here the time of transition in ZCS is equal to the time transition at
ZVS. So, the excitation current at the switches are given by
56
Figure 2.9 Active current flow path in phase VI
( )
( )=
( )+
(2.26)
(
)
The above equation describes the current at the resonant tank at the
time of ZCS. The time of ZCS is longer than the time to achieve ZVS.
Phase VII [
2.3.7
]
Figure 2.10 signifies the active current flow path between the time
period
and
. In this phase, both main switch and auxiliary switch is
turned OFF and the charge stored in resonant tank is discharged to the load
via
, which is a clamped diode that acts as a bypass for the current flow.
Simultaneously, the input current charges the parasitic capacitance. The time
change is expressed in terms of frequency which is given in equation (2.27).
=
( )+
(2.27)
57
( )+
=
(2.28)
(
)
Figure 2.10 Active current flow path in phase VII
At this phase, all the voltages tends to be equal where the current
flow is regulated from the switch
and makes the
to OFF state. The
voltage at the resonant capacitor is equal to the voltages at the main switches
and coupling capacitors and shown in the equation (2.29).
( )
( )
( )
( )
(2.29)
The voltage levels are calculated from the basic equation and the
relation to the current flow across the switch, in terms of time interval phase
VII is given in the equation (2.30).
=(
)
( )
(2.30)
At the end of this phase, the charged inductor helps the rectifier
diode to turn ON. The rectifier diode converts the output of boost inductor to
58
the DC source. The output from the rectifier diode increases the potential of
capacitor attached with the main switch.
2.3.8
Phase VIII [
]
Figure 2.11 directs the active current flow path between the time
period
and
. In this phase, the ideal nature of operation of the interleaved
boost converter is obtained, which is similar to that of conventional converter
operation. This is the final phase, from which the control is transferred to the
main switch SS2 and hence called as regressive regeneration time of the
converter which is mainly constant for the delay in switching. The time
should be a fraction of normal operational time of phases. The time to end this
phase is given in the equation (2.31)
=
(
)
(2.31)
Figure 2.11 Active current flow path in phase VIII
The new time
is low by a fraction of only 8% of half cycle. It is
the symmetrical phase for next switch that is incorporated to the system. This
59
phase is the final phase of the main switch
, after this the switch
starts
with initial phase to achieve the same time of operation. The inference from
the above analysis is that the stage of switching is constant for both the
switches.
2.3.9
Voltage Ratio
Voltage ratio is the actual ratio of voltages in active and inactive
phases of a switch. Since, it cannot be calculated by direct voltage
comparison, it is derived from the boost inductor output current. It is derived
specifically for the calculation of effective utilization of voltage in various
duty cycles that exhibits the implication.
Boost inductor current
, when switch is active in duty cycle less
than 50%, where active phases are (
). In active phase the amount
of voltage is equal to the total time of active flow is expressed in the equation
(2.32).
=
(
)
(2.32)
The timing is calculated in the terms of percent of duty cycle in which
the switch is active. The active voltage of switch is given by the equation
(2.33).
=
(
+ 0.5
+2
Boost inductor current
)
(2.33)
, when switch is inactive in duty cycle
less than 50%, where active phases are(
). In this the voltage in
OFF state is calculated, to simplify the calculation the active period is
subtracted from the total duty cycle.
60
=
[
]
(
)
(
=
+ 0.5
+2
(2.34)
)
(2.35)
Then the conversion voltage ratio (2.36) is derived from the
definition i.e. dividing the voltage in equation (2.33) and (2.35),
=1+
(
(2.36)
)
The voltage conversion ratio helps in calculating the maximum
ability of the converter to boost the output. This detail gives the necessary
condition of selecting the boosting coefficient for a specific application.
2.4
DESIGN CONSIDERATION FOR SIMULATION AND SOFT
SWITCHING TIMING ANALYSIS
2.4.1
Converter Specification
The switching frequency is
= 500
and the range of output power
range of operating voltage is 150
2.4.2
= 50
, the output voltage is
is 200
800
. The
240 .
Estimation of Boost Inductors and Output Capacitor
To support wide range of load, a variable capacitor is used to
provide impedance matching between the output stages. The range of output
capacitance is 200
inductors
and
700
, most preferably above 400
. The boost
are designed to operate in CCM.
The boost inductance is calculated based on the parameters such as
duty cycle of various components, maximum resistance offered by the
61
converter to the flow of current and finally the line frequency. The inductance
of boost inductor is calculated in equation (2.37).
)[
=
=10
where,
,
=3
)]
,
=24
(2.37)
,
=10
= 50
then
= 23
As the IBC is symmetrical, inductance of boost inductors are equal
).
(
2.4.3
Estimation of Resonant Capacitor and Coupling Capacitor
Resonant capacitor plays an important role in all aspects of
switching, energy storage, impedance matching and load driving etc., and
hence the design of resonant capacitor enhances the overall performance of
the converter. The total reactance of the system is the sum of reactance from
capacitor and inductor which is equal to the overall energy stored in the
system.
+
(2.38)
The total charge in the resonant tank is calculated based on the
reactance of inductor and capacitor is
= 1/2
&
=
respectively
.
Consider the charge and equivalent energy charge per storage in
resonant tank. The operating frequency ( ) of the tank circuit is given by
50Hz, so the value of resonant capacitor is obtained from equation (2.38) by
assuming the reactance is zero at the initial condition of the circuit. For the
calculation of coupling capacitor the frequency of switching is used, the
62
calculation is based on the estimation of equation (2.39) with known values of
switching frequency
(
and
and parasitic capacitance of MOSFET switches
) and in resonance condition
=
.
)
(2.39)
The parasitic capacitance in MOSFET switches used as 1.6
, and
thus the coupling capacitance and resonant capacitance is calculated as
1.5
2.4.4
and 2.5
respectively.
Design of Arrival Time of ZVS Condition
When time taken by the switch SS1 to achieve ZVS, the voltage
across the source to drain must be zero. The same is achieved in phase III for
mode D<50%. The minimum time considered for the arrival of ZVS is given
as follows.
For phase III (D<50%), the calculation of ZVS arrival time is given
by the equation (2.40), the equation shows the maximum time to achieve ZVS
by the switch.
=
=
(2.40)
×
= 203.50
The maximum time to achieve ZVS is 203.50
which is similar
to the simulation result obtained from the MATLAB Simulink Model (Power
System Block set) referred in Appendix.
63
2.4.5
Design of Arrival Time of ZCS Condition
Time at which the switch
achieves ZCS is in phase V for mode
D<50%. The minimum time considered for the arrival of ZCS is given by the
resonant inductor current.
Therefore in Phase V (D<50%), the calculation of ZCS arrival time
is given by the equation (2.41) and final calculation is done when the current
is equalized to zero, after substituting the values of circuit elements gives the
exact time of ZCS
( )
( )+
=
= 6.905
+
(2.41)
)
(2.42)
= 225
Thus, the design yields the maximum duty time of soft switching
condition with the above constraints.
All the above parameter values are tabulated in Table 2.1.
Table 2.1 Parameters and components of the converter
Input Voltage
Duty Cycle
Output Voltage
Output Current
Output Power
Switching Frequency
Boost_L1 and Boost_L2
Output Capacitor
Resonant Inductor
Resonant Capacitor
Coupling Capacitor
150-240V
<50% for Simulation 25%
500V
0.5A-1.45A
200-800W
50 Hz
23µH, Ferrite core µr = 10
200-700µF
5µH
1.5µF
2.5µF
64
The parameters tabulated above are used for simulation of the
converter.
2.5
SIMULATION RESULTS AND DISCUSSIONS
The design analysis is simulated using “MATLAB Simulink model”
which illustrates the better performance of the converter. The output of
various parameters is shown in Figure from 2.12 to 2.19. The results
discussed in this analysis explain the significant features of the proposed
converter.
2.5.1
Partial Boost Voltage Applied to LC Tank and Resonant
Voltage
Usually, a LC tank is an oscillator that produces damped
oscillations. In this switching technique, the LC resonant tank is acted upon as
a control circuitry. Hence, it is necessary to sustain the output without
damping. In order to realise this, it must be provided with a voltage source
that can drive the output of the LC tank to beat constant level while driving
the switches, which will not affect the operation.
Figure 2.12 shows the voltage applied to the resonant tank and the
desired change in the voltage level in the resonant tank. The variation is due
to the addition of partial input boost voltage to the resonant tank. The
maximum time for sustaining oscillation is 0.2 s. This sustained oscillation
timing is responsible for controlling the switches and once it is achieved, the
control circuitry takes over the converter, which now acts as a PWM
converter with 180 phase shift.
65
Figure 2.12
2.5.2
Applied voltage for the LC resonant tank and the voltage
developed in the resonant tank
Amount of Ripples in Voltage
Ripples present in the output voltage are the main cause of THD.
Hence, it is necessary to reduce the number of ripples after a particular period
to make the system steady. This result gives the exact requirement of
feedback to control the ripple addition.
The major issue in the process of boosting is “when an input is
boosted with a co-efficient of ten, the output with the ripple is also boosted
with same coefficient causing adverse effect in the channel”. For this reason,
the ripple should be filtered before boosting the input. Hence, a maximum
care is to be taken for the ripple cancellation and reduction.
66
Figure 2.13
Simulated voltage levels in ripples filtered showing ripple
free output and total ripple eliminated
Figure 2.13 shows the amount of ripples and ripple output that are
obtained from the boost output stages. This ripple is mainly due to the leakage
inductance in the boost inductor. In order to minimize the leakage inductance,
a ferrite coupling core is placed, which reduces the overall ripple in the output
and thus producing a steady and ripple free output. From the output, it is
clearly shown that, the amount of ripple in the output after the filtration is of
only 0.15% of total ripple. Because of this ripple free output, there is no
possibility of natural boosting of ripples during the circuit working condition.
Even if the ripples are present in the successive stages under unavoidable
circumstances, the feedback will control the amount of ripple addition and
make it ripple free after seven cycles of boosting stages. The above ripple is
calculated by mathematical subtraction of practical value to the theoretical
value with reference to equation (2.30).
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2.5.3
Output from Ripple Filter vs. Input
The main function of ripple filter is to reduce the total harmonic
loss and to minimize the input ripple. The waveform in the Figure 2.14
represents the harmonic free output and harmonic stages from 3 rd to 13th,
which is represented by a sinusoidal function with 45 phase shifted.
Figure 2.14
Simulated waveform for input to the ripple filter and the
boosted output from the ripple filter which is 45 phase
shifted
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This is a Fourier function of input signal providing value on FFT.
Based on analyzing the simulated output, the average THD is only 4.93% of
overall ripple in the system, which effectively depicts the performance of the
converter
2.5.4
Boosted Voltage vs. Control from LC Tank
Due to the control signal from the resonant tank, the boosting
stages and switching time can be altered, which influences on the
performance of the system. Figure 2.15 shows the switching control and the
bypassed voltage through clamped diode at the output stage.
Figure 2.15
Simulated waves of resonant control after feeding to the
control circuitry and relative change in boosted output
voltage
The control signal from resonant tank has the capability to drive the
switches and to change the operating voltage level of the switches. The trigger
69
control and the change in the boost stage is simultaneous, as it resembles the
symmetrical nature of the circuit. The nature of change in the resonant trigger
is altered by desired control that stabilizes the operation of the circuit as
required for the specific application.
2.5.5
Outputs of Main Switches
In IBC, the switches are normally designed with 180 phase shift
for operation. Figure 2.16 shows the simulation output wave form of the
switches having the same 180 phase shift. Also it is cleared that when the
main switch
is in active stage, then the other main switch
will be
inactive and vice versa. The voltage level of the triggered switching gives
necessary condition for selecting the path.
Figure 2.16
Simulated output waveforms of the switches resembling
PWM converter’s output
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2.5.6
Region of Convergence when Main Switch S s1 is Active
Figure 2.17
Simulated convergence region of main switch Ss1 and the
operating region of switch Ss2, when Ss1 is active
Region of convergence of operation is defined as the region at
which, the switch tends to transform from one state to another state. The
convergence region of main switch is dependent on parasitic elements like
capacitance and resistance parallel to the switches. These elements play a vital
role in transformation of the switching stages.
Figure 2.17 shows the simulated convergence region of main
switch
and the operating region of switch
when
is active.
The region of the switches while changing the state is usually
measured in terms of degree change per unit time. For better accuracy the
change should be high for unit time. This is a Laplace function of input to the
output where the switching stages exactly converges is given. This
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convergence graph shows the region of ZVS in main switch SS1 and ZCS in
main switch SS2.
2.5.7
Region of Convergence when Main Switch S S2 is Active
Figure 2.17 shows the simulated convergence region of main
switch
and the operating region of switch
when
is active. This
convergence graph shows the region of ZVS in main switch SS2 and ZCS in
main switch
.
From the above two regions of convergence output, it is clearly
shown that the region of ZVS and ZCS in main switches converges
simultaneously with respect to the active state of the switch.
Figure 2.18
Simulated convergence region of main switch Ss2 and the
operating region of switch Ss1, when SS2 is active
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2.5.8
Charging Current and Voltage of the LC Resonant Tank
Figure 2.19
Simulated levels of voltage and current in LC resonant
tank
The induced voltage and current in the resonant tank controls the
operating voltage of switches. The switches used in the converter are
thyristor, so the switching voltage level can be controlled by the gate voltage.
Based on the output of resonant tank, the operating voltage level of the
converter can be modified. In case of increasing the switching voltage level,
the output of the resonant tank is varied, in accordance with the constraints
that are necessary as per the requirements.
Figure 2.19 shows that the simulated levels of voltage and current
in the resonant tank are constant after sustaining the damped oscillation. The
change of voltage in resonant tank is a function of inductance and capacitance
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of the resonant tank. This is also regulated by the additional supply of the
boost voltage through the resistance as per design requirements.
2.5.9
Overall Boosting Level of the Converter
Figure 2.20
Output levels of the boost converter i.e. output voltage,
output current, input voltage
The designed converter is operated with an input of 150V in Duty
cycle less than 50%. The variation in output after switching and boosting
process is illustrated in the Figure 2.20. Thus the designed boost converter
performs the boosting operation with minimal loss, reduced distortion and
with low ripple in all stages of the output.
Based on the obtained constraints, the converter is suitable for
application where the output voltage is needed with minimum ripple. This is a
module of input in many electronic devices that can accelerate the
74
performance of the system. This can provide maximum impedance matching
between low power sources and high power application.
2.5.10
ZVS and ZCS Output of the Converter
The above output shows the operation of the converter under the
load varies from 200 to 800W with the duty cycle less than 50%. Based on the
design consideration and required conditions, the proposed IBC with both
ZVS and ZCS characteristics is built and it is shown in concerned places with
proper indication. ZVS is attained at phase III and ZCS is achieved at phase
VI respectively. The simulated output waveforms in Figure 2.21 of the
proposed circuit are obtained with an input voltage of 150V and the load
current of 0.65A. While verifying the output of both the switches S S1 and SS2,
it will be same, as the circuit is symmetrical.
From the results, it is very clearly indicated that the voltage
reaches zero before the switch is turned ON, which depicts the ZVS as
shown in Figure 2.21a. Also the switch current
is less than or equal to zero
when the main switch turned OFF, which depicts ZCS as shown in
Figure 2.21b. The switching timings of ZCS and ZVS are tabulated in
Table 2.2, which compares the timing of existing converter and proposed
converter. The switching timing of the proposed converter indicates the fast
switching transition of the circuit when compared with existing topology.
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(a)
Figure 2.21
(b)
Simulation waveforms of the main switches SS1, SS2
(a) ZVS and (b) ZCS operation while operating in duty
cycle below 50% with load current 0.65A
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Table 2.2
Comparison of switching timings under less than 50% duty
cycle
Timing/
Authors
LEE et al
(2000)
Stein et al
(2002)
Yao et al
(2007)
Chen et al
(2012)
Proposed
IBC
ZVS
In ms
In ms
In ms
225 ns
203.5ns
ZCS
In ms
In ms
In ms
249 ns
225 ns
Table 2.2 depicts the comparison of switching timings for existing
topologies and proposed topology. It shows that ZVS and ZCS timing are
very low when compared to other topologies.
Table 2.3 illustrates the various parameter results obtained from the
simulation output of the proposed analysis operating under duty cycle less
than 50%. Thus the simultaneous achievements of soft switching ZVS, ZCS
and its fast achieving time, equal current sharing, better THD, less reverse
recover loss of the diodes, improved efficiency show that the proposed soft
switching technique for IBC with enhanced characteristics is efficient.
Table 2.3 Various results of the proposed converter under less than
50% duty cycle
Parameters
Results obtained
Current Sharing by Switches
3.25A (each)
THD
4.93%
Reverse Recovery Loss
1.56%
Efficiency
97.8%
The proposed method has a designed switch with a practical decay
constant ( ) which is dependent factor on temperature, working life span,
range of conductivity, and various physical factors. Further, the results shows
that the proposed converter can be implemented with better power factor for
the practical applications like Solar System, PV Panel, Grid Systems, Green
Power System and Semiconductor Industries.
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2.6
SUMMARY
An improved soft switching technique for an IBC operating under
less than 50% duty cycle is proposed in this chapter. It is noted that, the main
switches
and
can achieve both ZVS and ZCS, which can also be
adjusted by driving circuit through LC resonant tank and used as controlling
module as well as energy storage device for driving huge load even under
lower duty cycle. The sharing of input current is equal between the switches.
The circuit can drive heavy load with greater efficiency due to
impedance matching which is achieved by energy storing elements (resonant
tank and variable output capacitor). Better switching timing for ZVS and ZCS
is also obtained by using bypass networks. The number of phases has been
reduced without affecting the smooth soft switching and reveals the best
while operating in duty cycle less than 50%. The auxiliary circuit reactance is
further reduced which has decreased conduction loss in the converter. The
clamped diode acts as a bypass path that can reduce the loss in conduction.
Coupling capacity between auxiliary unit and main switch reduce the voltage
stress over the switches during switching.
The simulation results obtained from the proposed model gives the
exact functional verification of the system. Based on the results, this module
can be implemented in application like battery powered systems, two batterypowered applications that use boost converters with Hybrid Electric Vehicles
(HEV) and lighting systems and solar power PV panel which is specifically
operated in lower duty cycles. In Satellite power system, the light is available
only for half cycle of rotation so the system must be more efficient in
grasping the light for the utilization in two processes (i.e. when the light is
available it should be enough to provide power for function of satellite and for
charging the battery backup, whereas in dark period, it should be boosted
enough to provide required voltage from battery). This converter is highly
suitable for such applications.