<0.4 Ω CMOS 1.8 V to 5.5 V
SPST Switches
ADG801/ADG802
FUNCTIONAL BLOCK DIAGRAM
FEATURES
0.4 Ω maximum on resistance @ 125°C
0.08 Ω maximum on resistance flatness @ 125°C
1.8 V to 5.5 V single supply
Automotive temperature range from −40°C to +125°C
400 mA current-carrying capability
Tiny 6-lead SOT-23, 8-lead MSOP, and 6-ball WLCSP packages
35 ns switching times
Low power consumption
TTL-/CMOS-compatible inputs
Pin compatible with ADG701/ADG702
ADG801
D
S
IN
ADG802
D
S
APPLICATIONS
SWITCHES SHOWN FOR
A LOGIC 1 INPUT
02800-001
IN
Power routing
Cellular phones
Modems
PCMCIA cards
Hard drives
Data acquisition systems
Communications systems
Relay replacement
Battery-powered systems
Figure 1.
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The ADG801 and ADG802 are monolithic CMOS, single-pole,
single throw (SPST) switches with on resistance of less than
0.4 Ω. These switches are designed using an advanced
submicron process that provides extremely low on resistance,
high switching speed, and low leakage currents.
1.
Low on resistance (0.25 Ω typical).
2.
1.8 V to 5.5 V single-supply operation.
3.
Tiny 6-lead SOT-23, 8-lead MSOP, and 6-ball WLCSP
packages.
The low on resistance of <0.4 Ω makes these parts ideal for
applications where low on resistance switching is critical.
4.
400 mA current-carrying capability.
5.
Automotive temperature range from −40°C to +125°C.
The ADG801 switch is normally open (NO), while the ADG802
is normally closed (NC). Each switch conducts equally well in
both directions when on.
6.
Pin compatible with ADG701 (ADG801) and ADG702
(ADG802).
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2002–2007 Analog Devices, Inc. All rights reserved.
ADG801/ADG802
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................5
Applications....................................................................................... 1
Pin Configuration and Function Descriptions..............................6
Functional Block Diagram .............................................................. 1
Terminology .......................................................................................7
General Description ......................................................................... 1
Typical Performance Characteristics ..............................................8
Product Highlights ........................................................................... 1
Test Circuits..................................................................................... 10
Revision History ............................................................................... 2
Outline Dimensions ....................................................................... 12
Specifications..................................................................................... 3
Ordering Guide .......................................................................... 14
Absolute Maximum Ratings............................................................ 5
REVISION HISTORY
3/07—Rev. 0 to Rev. A
Updated Format..................................................................Universal
Added 6-Ball WLCSP Package (Text and Figures) ........Universal
Replaced Typical Performance Characteristics Section .............. 8
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 14
5/02—Revision 0: Initial Version
Rev. A | Page 2 of 16
ADG801/ADG802
SPECIFICATIONS
VDD = 5 V ± 10%, GND = 0 V, unless otherwise noted. The automotive temperature range is −40°C to +125°C.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
25°C
0.25
0.3
0.05
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS 2
tON
Test Conditions/Comments
0 V to VDD
V
Ω typ
Ω max
Ω typ
Ω max
VS = 0 V to VDD, IS = 100 mA; Test Circuit 1
VS = 0 V to VDD, IS = 100 mA; Test Circuit 1
VS = 0 V to VDD, IS = 100 mA
0.35
0.4
0.07
0.08
nA typ
±3
±30
±0.01
nA max
nA typ
VDD = 5.5 V
VS = 4.5 V/1 V, VD = 1 V/4.5 V; Test
Circuit 2
VS = 4.5 V/1 V, VD = 1 V/4.5 V; Test
Circuit 2
VS = 4.5 V/1 V, VD = 1 V/4.5 V; Test
Circuit 2
VS = 4.5 V/1 V, VD = 1 V/4.5 V; Test
Circuit 2
VS = VD = 1 V, or 4.5 V; Test Circuit 3
VS = VD = 1 V, or 4.5 V; Test Circuit 3
±0.25
±3
±30
nA max
±0.01
±0.25
±3
±30
nA typ
nA max
2.0
0.8
V min
V max
μA typ
μA max
pF typ
VIN = VINL or VINH
±0.1
ns typ
ns max
ns typ
ns max
pC typ
RL = 50 Ω, CL = 35 pF
VS = 3 V; Test Circuit 4
RL = 50 Ω, CL = 35 pF
VS = 3 V; Test Circuit 4
VS = 2.5 V, RS = 0 Ω; CL = 1 nF;
Test Circuit 5
RL = 50 Ω, CL = 5 pF; f = 100 kHz;
Test Circuit 6
RL = 50 Ω, CL = 5 pF; Test Circuit 7
f = 1 MHz
f = 1 MHz
f = 1 MHz
VDD = 5.5 V
Digital inputs = 0 V or 5.5 V
0.005
5
Charge Injection
Off Isolation
−61
dB typ
12
180
180
420
MHz typ
pF typ
pF typ
pF typ
Bandwidth −3 dB
CS (Off )
CD (Off )
CD, CS (On)
POWER REQUIREMENTS
IDD
50
55
18
21
0.001
1.0
2
Unit
35
45
9
15
50
tOFF
1
−40°C to +125°C 1
±0.01
±0.25
Drain Off Leakage, ID (Off )
−40°C to +85°C
2.0
On resistance parameters tested with IS = 10 mA.
Guaranteed by design, not subject to production test.
Rev. A | Page 3 of 16
μA typ
μA max
ADG801/ADG802
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. The automotive temperature range is −40°C to +125°C.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Drain Off Leakage, ID (Off )
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
CIN, Digital Input Capacitance
DYNAMIC CHARACTERISTICS2
tON
tOFF
Charge Injection
Off Isolation
Bandwidth −3 dB
CS (Off )
CD (Off )
CD, CS (On)
POWER REQUIREMENTS
IDD
25°C
0.4
0.6
0.1
±0.01
±0.25
±0.01
±0.25
±0.01
±0.25
−40°C to +85°C
2
Unit
0 V to VDD
V
Ω typ
Ω max
Ω typ
VS = 0 V to VDD, IS = 100 mA; Test Circuit 1
VS = 0 V to VDD, IS = 100 mA; Test Circuit 1
VS = 0 V to VDD, IS = 100 mA
VDD = 3.6 V
VS = 3.3 V/1 V, VD = 1 V/3.3 V; Test Circuit 2
VS = 3.3 V/1 V, VD = 1 V/3.3 V; Test Circuit 2
VS = 3.3 V/1 V, VD = 1 V/3.3 V; Test Circuit 2
VS = 3.3 V/1 V, VD = 1 V/3.3 V; Test Circuit 2
VS = VD = 1 V, or 3.3 V; Test Circuit 3
VS = VD = 1 V, or 3.3 V; Test Circuit 3
0.7
0.1
±3
±30
±3
±30
±3
±30
nA typ
nA max
nA typ
nA max
nA typ
nA max
2.0
0.8
V min
V max
μA typ
μA max
pF typ
VIN = VINL or VINH
±0.1
ns typ
ns max
ns typ
ns max
pC typ
dB typ
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; Test Circuit 4
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; Test Circuit 4
VS = 1.5 V, RS = 0 Ω, CL = 1 nF; Test Circuit 5
RL = 50 Ω, CL = 5 pF, f = 100 kHz;
Test Circuit 6
RL = 50 Ω, CL = 5 pF; Test Circuit 7
f = 1 MHz
f = 1 MHz
f = 1 MHz
VDD = 3.6 V
Digital inputs = 0 V or 3.6 V
0.005
5
40
55
9
15
10
−61
Test Conditions/Comments
0.65
0.1
60
65
18
21
12
180
180
420
MHz typ
pF typ
pF typ
pF typ
0.001
1.0
1
−40°C to +125°C1
2.0
On resistance parameters tested with IS = 10 mA.
Guaranteed by design, not subject to production test.
Rev. A | Page 4 of 16
μA typ
μA max
ADG801/ADG802
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Parameter
VDD to GND
Analog Inputs1
Digital Inputs1
Continuous Current, Pin S or Pin D
Peak Current, Pin S or Pin D
Operating Temperature Range
Automotive
Storage Temperature Range
Junction Temperature (TJMAX)
Package Power Dissipation
MSOP
θJA Thermal Impedance
θJC Thermal Impedance
SOT-23 (4-Layer Board)
θJA Thermal Impedance
θJC Thermal Impedance
WLCSP (4-Layer Board)
θJA Thermal Impedance
Lead Temperature, Soldering
(10 sec)
IR Reflow, Peak Temperature
(<20 sec)
Reflow Soldering (Pb-Free)
Peak Temperature
Time at Peak Temperature
1
Rating
−0.3 V to +7 V
−0.3 V to VDD + 0.3 V or
30 mA, whichever occurs first
−0.3 V to VDD + 0.3 V or
30 mA, whichever occurs first
400 mA
800 mA, pulsed at 1 ms,
10% duty cycle max
−40°C to +125°C
−65°C to +150°C
150°C
(TJMAX – TA)/θJA
206°C/W
44°C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 3. Truth Table
ADG801 (Pin IN)
0
1
ESD CAUTION
119°C/W
91.99°C/W
120°C/W
300°C
235°C
260(+0/−5)°C
10 sec to 40 sec
Overvoltages at Pin IN, Pin S, or Pin D are clamped by internal diodes.
Current should be limited to the maximum ratings provided.
Rev. A | Page 5 of 16
ADG802 (Pin IN)
1
0
Switch Condition
Off
On
ADG801/ADG802
D 1
S 2
AD801/
ADG802
TOP VIEW
(Not to Scale)
GND 3
6
VDD
5
NC
4
IN
NC = NO CONNECT
02800-002
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
D 1
NC 2
NC 3
VDD 4
ADG801/
ADG802
TOP VIEW
(Not to Scale)
8
S
7
GND
6
IN
5
NC
NC = NO CONNECT
02800-003
Figure 2. 6-Lead SOT-23
(RJ-6)
Figure 3. 8-Lead MSOP
(RM-8)
BALL A1
INDICATOR
A
B
VDD
D
NC
S
IN
GND
1
2
3
TOP VIEW
(BALL SIDE DOWN)
Not to Scale
NC = NO CONNECT
02800-020
ADG801/
ADG802
Figure 4. 6-Ball 2 ×3 WLCSP
(CB-6-1)
Table 4. Pin Function Descriptions
SOT-23
1
2
3
4
5
6
Pin Number
MSOP
1
8
7
6
2, 3, 5
4
WLCSP
B1
B2
B3
A3
A2
A1
Mnemonic
D
S
GND
IN
NC
VDD
Description
Drain Terminal. Can be an input or an output.
Source Terminal. Can be an input or an output.
Ground (0 V) Reference.
Logic Control Input.
Most Positive Power Supply Potential.
Most Positive Power Supply Potential.
Rev. A | Page 6 of 16
ADG801/ADG802
TERMINOLOGY
VDD
The most positive power supply potential.
IINL (IINH)
Input current of the digital input.
IDD
Positive supply current.
CS (Off)
The off switch source capacitance is measured with reference
to ground.
GND
Ground (0 V) reference.
CD (Off)
The off switch drain capacitance is measured with reference
to ground.
S
The source terminal can be an input or an output.
D
The drain terminal can be an input or an output.
CD, CS (On)
The on switch capacitance is measured with reference
to ground.
IN
Logic control input.
CIN
Digital input capacitance.
VD (VS)
Analog voltage on Terminal D and Terminal S.
tON
The delay between applying the digital control input and when
the output switches on. See Figure 17.
RON
Ohmic resistance between Terminal D and Terminal S.
RFLAT(ON)
The difference between the maximum and minimum value of
on resistance as measured over the specified analog signal range.
tOFF
The delay between applying the digital control input and when
the output switches off.
IS (Off)
Source leakage current with the switch off.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
ID (Off)
Drain leakage current with the switch off.
Off Isolation
A measure of unwanted signal coupling through an off switch.
ID, IS (On)
Channel leakage current with the switch on.
Bandwidth
The frequency at which the output is attenuated by 3 dB.
VINL
Maximum input voltage for Logic 0.
On Response
The frequency response of the on switch.
VINH
Minimum input voltage for Logic 1.
Insertion Loss
The loss due to the on resistance of the switch.
Rev. A | Page 7 of 16
ADG801/ADG802
TYPICAL PERFORMANCE CHARACTERISTICS
0.50
0.45
VDD = 5V, 3V
3.0
VDD = 3.0V
VDD = 3.3V
0.40
0.35
2.5
VDD = 4.5V
0.30
0.25
0.20
2.0
CURRENT (nA)
VDD = 5.5V
IS, ID (ON)
1.5
1.0
ID (OFF)
0.15
VDD = 5.0V
0.5
0.10
0
0.05
0
1.0
2.0
3.0
4.0
5.0
5.5
VD (VS) (V)
–0.5
02800-004
0
IS (OFF)
0
20
100
120
Figure 8. Leakage Current vs. Temperature
400
VDD = 5V
TA = 25°C
0.45
VDD = 5V
300
0.40
+125°C
0.35
CHARGE INJECTION (pC)
ON RESISTANCE (Ω)
80
60
TEMPERATURE (°C)
Figure 5. On Resistance vs. VD (VS)
0.50
40
02800-007
ON RESISTANCE (Ω)
3.5
TA = 25°C
VDD = 2.7V
+85°C
0.30
0.25
0.20
0.15
+25°C
–40°C
0.10
200
VDD = 3V
100
0
–100
0.05
1.0
1.5
2.0
2.5
3.0
VD (VS) (V)
3.5
4.0
4.5
5.0
–200
0
Figure 6. On Resistance vs. VD (VS) for Different Temperatures
0.50
35
0.30
30
TIME (ns)
0.35
0.25
+25°C
2.5
3.0
VS (V)
3.5
4.0
4.5
5.0
–40°C
0.10
10
0.05
5
1.5
2.0
2.5
3.0
VD (VS) (V)
VDD = 5V
20
15
1.0
VDD = 3V
tON
25
0.15
0
–40
02800-006
ON RESISTANCE (Ω)
+85°C
40
0.5
2.0
45
+125°C
0.40
0
1.5
50
0.45
0
1.0
Figure 9. Charge Injection vs. Source Voltage
VDD = 3V
0.20
0.5
02800-008
0.5
VDD = 3V, 5V
tOFF
–20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 10. tON/tOFF Times vs. Temperature
Figure 7. On Resistance vs. VD (VS) for Different Temperatures
Rev. A | Page 8 of 16
120
02800-009
0
02800-005
0
ADG801/ADG802
–10
1.8
TA = 25°C
VDD = 3V, 5V
1.6
LOGIC THRESHOLD VOLTAGE (V)
ATTENUATION (dB)
–20
–30
–40
–50
–60
1.4
VIN RISING
1.2
1.0
VIN FALLING
0.8
0.6
0.4
0.1
1
10
FREQUENCY (MHz)
0
02800-010
–70
0
–1
–3
–4
–5
–6
–7
TA = 25°C
VDD = 3V, 5V
0.2
1
FREQUENCY (MHz)
10
20
02800-011
ATTENUATION (dB)
–2
–9
1
2
3
VDD (V)
4
5
Figure 13. Logic Threshold Voltage vs. Supply Voltage
Figure 11. Off Isolation vs. Frequency
–8
0
Figure 12. On Response vs. Frequency
Rev. A | Page 9 of 16
6
02800-012
0.2
ADG801/ADG802
TEST CIRCUITS
S
D
ID (OFF)
V1
VD
RON = V1/IDS
NC
D
NC = NO CONNECT
A
VD
02800-013
Figure 15. Off Leakage
Figure 14. On Resistance
VDD
0.1µF
VIN
VDD
S
VS
Figure 16. On Leakage
ADG801
50%
50%
50%
50%
VOUT
D
VIN
RL
50Ω
IN
CL
35pF
ADG802
90%
VOUT
90%
GND
tOFF
tON
Figure 17. Switching Times
VDD
VDD
RS
S
VIN
D
IN
GND
ON
OFF
VOUT
CL
1nF
VS
ADG801
VIN
ADG802
VOUT
QINJ = CL × ΔVOUT
Figure 18. Charge Injection
Rev. A | Page 10 of 16
ΔVOUT
02800-017
VS
D
S
02800-016
S
ID (ON)
A
02800-015
A
02800-014
IS (OFF)
IDS
ADG801/ADG802
VDD
0.1µF
NETWORK
ANALYZER
VDD
S
50Ω
50Ω
VS
D
VIN
RL
50Ω
GND
VOUT
OFF ISOLATION = 20 log
VOUT
VS
02800-018
IN
Figure 19. Off Isolation
VDD
0.1µF
NETWORK
ANALYZER
VDD
S
50Ω
IN
VS
D
RL
50Ω
GND
INSERTION LOSS = 20 log
VOUT
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
Figure 20. Bandwidth
Rev. A | Page 11 of 16
02800-019
VIN
ADG801/ADG802
OUTLINE DIMENSIONS
2.90 BSC
6
5
4
1
2
3
2.80 BSC
1.60 BSC
PIN 1
INDICATOR
0.95 BSC
1.90
BSC
1.30
1.15
0.90
1.45 MAX
0.50
0.30
0.15 MAX
0.22
0.08
10°
4°
0°
SEATING
PLANE
0.60
0.45
0.30
COMPLIANT TO JEDEC STANDARDS MO-178-AB
Figure 21. 6-Lead Small Outline Transistor Package [SOT-23]
(RJ-6)
Dimensions shown in inches and (millimetes)
3.20
3.00
2.80
8
3.20
3.00
2.80
1
5
5.15
4.90
4.65
4
PIN 1
0.65 BSC
0.95
0.85
0.75
1.10 MAX
0.15
0.00
0.38
0.22
COPLANARITY
0.10
0.23
0.08
8°
0°
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 22. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Rev. A | Page 12 of 16
0.80
0.60
0.40
ADG801/ADG802
1.34
1.14
0.94
0.44
0.36
0.28
0.67
0.57
0.47
0.50
BALL PITCH
BALL 1
IDENTIFIER
0.50
0.32
SEATING
PLANE
0.32 NOM
2.38
2.18
1.98
0.59
0.24 MAX
COPLANARITY
Figure 23. 6-Ball Wafer Level Chip Scale Package [WLCSP]
(CB-6-1)
Dimensions shown in millimeters
Rev. A | Page 13 of 16
BOTTOM VIEW
(BALL SIDE UP)
062206-A
TOP VIEW
(BALL SIDE DOWN)
ADG801/ADG802
ORDERING GUIDE
Model
ADG801BCB-REEL7
ADG801BCBZ-REEL7 2
ADG801BRM
ADG801BRM-REEL
ADG801BRM-REEL7
ADG801BRMZ2
ADG801BRMZ-REEL2
ADG801BRMZ-REEL72
ADG801BRT-R2
ADG801BRT-500RL7
ADG801BRT-REEL
ADG801BRT-REEL7
ADG801BRTZ-500RL72
ADG801BRTZ-REEL2
ADG801BRTZ-REEL72
ADG802BCB-REEL7
ADG802BCBZ-REEL72
ADG802BRM-R2
ADG802BRM
ADG802BRM-REEL
ADG802BRM-REEL7
ADG802BRMZ2
ADG802BRMZ-REEL2
ADG802BRMZ-REEL72
ADG802BRT-500RL7
ADG802BRT-REEL
ADG802BRT-REEL7
ADG802BRTZ-500RL72
ADG802BRTZ-REEL2
ADG802BRTZ-REEL72
1
2
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
6-Ball Wafer Level Chip Scale Package [WLCSP]
6-Ball Wafer Level Chip Scale Package [WLCSP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Ball Wafer Level Chip Scale Package [WLCSP]
6-Ball Wafer Level Chip Scale Package [WLCSP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
6-Lead Small Outline Transistor Package [SOT-23]
Branding on SOT-23 and MSOP packages is limited to three characters due to space constraints.
Z = RoHS Compliant Part.
3
Rev. A | Page 14 of 16
Package Option
CB-6-1
CB-6-1
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RJ-6
RJ-6
RJ-6
RJ-6
RJ-6
RJ-6
RJ-6
CB-6-1
CB-6-1
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
RJ-6
RJ-6
RJ-6
RJ-6
RJ-6
RJ-6
Branding 1
SLB
S06
SLB
SLB
SLB
S06
S06
S06
SLB
SLB
SLB
SLB
S06
S06
S06
SMB
S0F
SMB
SMB
SMB
SMB
S0F
S0F
S0F
SMB
SMB
SMB
S0F
S0F
S0F
ADG801/ADG802
NOTES
Rev. A | Page 15 of 16
ADG801/ADG802
NOTES
©2002–2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02800-0-3/07(A)
Rev. A | Page 16 of 16