UNIVERSITY OF CALIFORNIA, SAN DIEGO
An Improved Small Outline Package for Radio Frequency Integrated
Circuits
A dissertation submitted in partial satisfaction of the
requirements for the degree Doctor of Philosophy
in
Electrical Engineering (Electronic Circuits & Systems)
by
Darryl Jessie
Committee in charge:
Professor Lawrence Larson, Chair
Professor Peter Asbeck
Professor Robert Bitmead
Professor Bill Hodgkiss
Professor Kevin Quest
2003
Copyright
Darryl Jessie, 2003
All rights reserved.
The dissertation of Darryl Jessie is approved, and it is acceptable in quality and form for publication on microfilm:
Chair
University of California, San Diego
2003
iii
TABLE OF CONTENTS
Signature Page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
iv
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
v
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vi
Acknowledgements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii
Vita, Publications, and Fields of Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiii
Abstract . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiv
I
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I.1 The Role of Packaging in RFIC Applications . . . . . . . . . . . . . . . . . . . . . . . . .
I.2 Survey of Package Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I.3 Research Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I.4 Plastic Leaded Package Equivalent Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I.5 The Design of Package Leads as a Matched Transmission Line . . . . . . . . . .
I.6 Dissertation Focus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I.7 Dissertation Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1
5
8
10
16
21
21
II
Analysis of Embedded Coplanar Waveguide with Finite Grounds . . . . . . . . . . . . .
II.1 Modifying an SSOP8 Lead Frame into a Transmission Line . . . . . . . . . . . . .
II.2 Embedded Coplanar Waveguide with Finite Ground . . . . . . . . . . . . . . . . . . . .
II.3 Conformal Mapping of ECPWFG Transmission Lines . . . . . . . . . . . . . . . . . .
II.3.1 ECPWFG Package Susceptibility to Slotline Mode . . . . . . . . . . . . . .
II.3.2 ECPWFG Package Susceptibility to Parallel Plate Waveguide Mode
II.3.3 ECPWFG Package Susceptibility to Microstrip Mode . . . . . . . . . . . .
II.4 Impedance Calculations of ECPWFG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
II.5 Conformal Mapping with the Schwarz-Christoffel Transformation . . . . . . . .
II.5.1 Calculation of Capacitance Above Conductors . . . . . . . . . . . . . . . . . .
II.5.2 Calculation of Capacitance Below Conductors . . . . . . . . . . . . . . . . . .
II.6 Edge Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
II.7 Impedance and ef f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
II.8 Comparison to Asymptotic Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
II.9 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
23
23
26
27
29
30
32
32
34
36
42
45
45
45
56
iv
III
High-Frequency Measurement of SO-type Packages . . . . . . . . . . . . . . . . . . . . . . . .
III.1 SSOP8 Test Topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
III.2 ECPWFG Package Construction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
III.3 ECPWFG Package Measurement Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
III.4 Complex Permittivity Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
III.4.1 Bulk Material Properties Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . .
III.4.2 Sumitomo 6300H Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
III.4.3 Smoothcast 321 Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
III.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
58
59
64
68
72
72
75
84
86
IV Numerical Electromagnetic Modeling of SO Packages . . . . . . . . . . . . . . . . . . . . . . 88
IV.1 Numerical Electromagnetic Simulation Overview . . . . . . . . . . . . . . . . . . . . . . 88
IV.2 Short Circuit SSOP8 EM Simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
IV.3 ECPWFG Transmission Line Simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
IV.4 ECPWFG Package with Embedded Microstrip Thru . . . . . . . . . . . . . . . . . . . 97
IV.5 SSOP8 Thru EM Simulations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
IV.6 ECPWFG Package in MSOP Form Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
IV.7 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
V
Circuit Modeling of Leaded Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
V.1 Lumped Element Modeling of Transmission Line Structures . . . . . . . . . . . . . 112
V.1.1 Constant-k Filter versus Distributed Transmission Line . . . . . . . . . . . 113
V.2 Lumped Equivalent Circuit Modeling of Leaded Packages . . . . . . . . . . . . . . 121
V.2.1 Circuit Synthesis Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
V.2.2 Static Solver Solutions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
V.3 ECPWFG Thru Transmission Line Equivalent Circuit . . . . . . . . . . . . . . . . . . 138
V.4 Two-port Modeling of ECPWFG Packages for Improved Microwave Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
V.4.1 SSOP Package Model with Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . 147
V.4.2 ECPWFG Package Model with Isolation . . . . . . . . . . . . . . . . . . . . . . . 151
V.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
VI Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
VI.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
VI.2 ECPWFG Package DOE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
VI.3 ECPWFG Package Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
VI.4 ECPWFG Package Cost Estimates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
VI.5 ECPWFG Package Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
VI.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
VII Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170
v
A
Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
A.1 Measurement Error Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
A.1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
A.1.2 TRL Calibration Kit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
A.1.3 TRL Calibration Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
A.2 ICM TRL Calibration Kit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188
vi
LIST OF FIGURES
I.1
I.2
I.3
I.4
I.5
I.6
Classic SSOP8 with signal paths through the package and die. Only one
coupled path is shown. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Four catagories of plastic packages: a) DIP; b) SO-type; c) QFP; d) Bump
Chip Carrier (BCC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Traditional SO-type leaded package: a) Cross-section showing the origination of package parasitics; b) Simple electrical model of six leads including nearest neighbor coupling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Relationship between Cin and equivalent circuit of all other lead frame
parasitics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cross-section showing the origination of transmission line package parasitics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Plots of lead frame input impedance (Z11) magnitude and phase: a) coupling capacitance variation; b) magnetic coupling variation; c) 50 Ω lead
frame transmission line. The asterisk (*) indicates resonance. . . . . . . . . . . .
Changes necessary to construct an ECPWFG transmission line: Top: Classic SSOP8 pin package; Bottom: An ECPWFG transmission line. . . . . . . .
II.2 The ECPWFG package with embedded microstrip lines on the paddle. . . . .
II.3 ECPWFG lead frame cross-section. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
II.4 Slotline mode. Electric fields concentrate only between one set of conductors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
II.5 Conditions for parallel plate mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
II.6 ECPWFG transmission line capacitances. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
II.7 Relationship of points in W-plane to Z-plane. . . . . . . . . . . . . . . . . . . . . . . . . .
II.8 Conformal mapping of top face of ECPWFG without dielectric: a) physical coordinates; b) intermediate transformation to colinear points in the
t-plane; c) final transformation into the W-plane. . . . . . . . . . . . . . . . . . . . . . .
II.9 Conformal mapping of top face of ECPWFG with plastic dielectric: a)
physical coordinates; b) intermediate transformation to colinear points in
the t-plane; c) final transformation into the W-plane. . . . . . . . . . . . . . . . . . . .
II.10 Conformal mapping of bottom face of ECPWFG with plastic dielectric:
a) physical coordinates; b) intermediate transformation to colinear points
in the t-plane; c) final transformation into the W-plane. Note the physical arrangement in the Z-plane has been mirrored to above the conductor
interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
II.11 Lead frame cross-section for increasing waveguide ground widths. Dimensions in mils. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
7
12
13
18
20
II.1
vii
25
26
27
30
31
34
35
37
40
43
47
II.12 Results with c varied, b=18 mil, a=10 mil: a) effective dielectric constant;
b) characteristic impedance. Excellent agreement is obtained at high c/a
ratio (as expected). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
II.13 Lead frame cross-section for narrow (2 mil) waveguide grounds and b
varied. Dimensions in mils. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
II.14 Results with b varied, a=10 mil, c = b + 2 mil: a) effective dielectric
constant; b) characteristic impedance. Good agreement is seen when the
conductors are tightly coupled (ground widths approach ∞). . . . . . . . . . . . .
II.15 Three transmission line systems: a) Buried microstrip line; b) Buried
CPW; c) ECPWFG. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
III.1
III.2
III.3
III.4
III.5
III.6
III.7
III.8
III.9
III.10
III.11
III.12
III.13
IV.1
IV.2
IV.3
IV.4
IV.5
SSOP8 encapsulated (left) and decapsulated (right) with wirebonds. . . . . . .
A: Midsection used to test SSOP8 packages; B: Midsection placed in fixture.
Measured input impedance of shorted SSOP8. . . . . . . . . . . . . . . . . . . . . . . . .
Dimensioned view of ECPWFG package as constructed. . . . . . . . . . . . . . . . .
ECPWFG X-ray view for W=8mil, S=12mil. A: Side View; B: Top View. .
Package Construction Steps. A: Lead frame on anvil; B: Mold to bend
lead frame; C: Lead frame in cavity; D: Finished package on PC board. . . .
ECPWFG with microstrip line Thru before encalsulating. . . . . . . . . . . . . . . .
Measured results for three ECPWFG Thru packages: a) Return Loss, b)
Insertion Loss. Width (W) and Space (S) are in mils. . . . . . . . . . . . . . . . . . . .
Measured results for ECPWFG package with embedded microstrip Thru
of W=5 mil. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Three-dimensional representation of ECPWFG with microstrip line Thru.
Perfromance is plotted in Figure III.9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Resonant Cavity. A: Actual cavity. B: Idealized outline and cross-section. .
Sumitomo 6300H measured (solid line) and simulated (light line) response
for 4.99 GHz case. resonant frequencies are in GHz. . . . . . . . . . . . . . . . . . . .
Smoothcast321 measured (dark line) and simulated (light line) response
for 5.55 GHz case. Resonant frequencies are in GHz. . . . . . . . . . . . . . . . . . .
Dimensions of shorted SSOP8 package as constructed. . . . . . . . . . . . . . . . . .
EM simulated and measured input impedance for the SSOP8 shorted package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dimensions of ECPWFG Thru package as constructed, measured and
simulated. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Simulated (thin line) and measured (thick line) response for ECPWFG
Thru package W=20 mil, S=8 mil designed to 55.5 Ω. . . . . . . . . . . . . . . . . . .
Simulated (thin lines) and measured (thick lines) response for ECPWFG
Thru package W=20 mil, S=12 mil designed to 66.9 Ω. . . . . . . . . . . . . . . . . .
viii
48
49
50
53
61
62
63
64
65
66
67
70
71
71
78
83
85
90
92
93
94
95
IV.6
IV.7
IV.8
IV.9
IV.10
IV.11
IV.12
IV.13
V.1
V.2
V.3
V.4
V.5
V.6
V.7
V.8
V.9
V.10
V.11
V.12
V.13
V.14
V.15
V.16
V.17
V.18
V.19
Simulated (thin line) and measured (thick line) response for ECPWFG
Thru package W=16 mil, S=12 mil designed to 69.6 Ω. . . . . . . . . . . . . . . . . . 96
Dimensions of ECPWFG package with embedded microstrip Thru and
three dimensional representation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Simulated (thin line) and measured (thick line) response for ECPWFG
package with embedded microstrip Thru: (a) return loss, (b) insertion loss. 99
Traditional (a) and proposed modified (ECPWFG) (b) SSOP8 packages.
The ECPWFG package is shown in (c). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Simulated SSOP8 Thru response: a) return and insertion loss, b) isolation. . 104
Simulated ECPWFG package with embedded mircostrip Thrus. . . . . . . . . . 106
Dimensions of ECPWFG Thru in MSOP form factor. . . . . . . . . . . . . . . . . . . 107
Simulated ECPWFG package with embedded microstrip Thru in MSOP
form factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Top: Classic distributed transmission line; Middle: Cascaded π-networks;
Bottom: Constant-k π-network. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Two models for lead frames: a) Classic π-network; b) Transmission line
defined by characteristic impedance and electrical length. . . . . . . . . . . . . . . . 115
Sketch of coupling mechanisms: Electro-Capacitive (solid lines) and MagnetoInductive (dotted lines). ECPWFG package (a) and SSOP package (b). . . . 118
Mutual inductance calculated for two current carrying filaments. . . . . . . . . . 120
Dimensions of SSOP8 package as constructed. . . . . . . . . . . . . . . . . . . . . . . . . 123
Measured SSOP8 pole zero plot for Z22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Shorted SSOP8 measured vs polynomial equation for Z22. . . . . . . . . . . . . . . 126
Circuit synthesized, part 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Circuit synthesized, part 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Circuit synthesized, part 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
Final synthesized circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
Plot comparing measured and synthesized a), and on expanded scale b). . . . 131
Transforming non-frequency dependent series resistance to frequency dependent resistance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Typical SO-type package equivalent circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Plot comparing measured, synthesized, and static simulated a) and on expanded scale b). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Simple ECPWFG Thru model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
The PCB-to-ECPWFG parasitics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
Measured (thick line) and modeled (thin line) results for 69.6 Ω ECPWFG
Thru. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
Measured (thick line) and modeled (thin line) results for 65.9 Ω ECPWFG
Thru. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141
ix
V.20 Measured (thick line) and modeled (thin line) results for 55.5 Ω ECPWFG
Thru. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
V.21 ECPWFG package with embedded 50Ω Thru line. The lead pitch is varied
to present a 50Ω characteristic impedance to the bondwire location. All
dimensions in mils. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
V.22 ECWPFG Thru package equivalent circuit. Capacitance is in pF, inductance in nH, impedance in Ω, and electrical length (EL) in degrees. . . . . . . . 146
V.23 Model vs Measured for ECPWFG embedded microstrip line. Light curve
is measured, solid curve is modeled. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
V.24 Classic SSOP8 package (a) and ECPWFG package (b). . . . . . . . . . . . . . . . . . 147
V.25 The SSOP8 Thru package equivalent circuit. Capacitance is in pF, inductance in nH, impedance in Ω, and electrical length (EL) in degrees. . . . . . . . 148
V.26 Model vs simulated for SSOP8 with embedded microstrip line: a) return
and insertion loss; b) isolation. Light curve is simulated, solid curve is
modeled. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
V.27 The ECPWFG Thru package equivalent circuit. Capacitance is in pF, inductance in nH, impedance in Ω, and electrical length (EL) in degrees. . . . . 152
V.28 Model vs simulated for simulated ECPWFG with embedded microstrip
line: a) return and insertion loss; b) isolation. Light curve is simulated,
solid curve is modeled. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
VI.1 Main variables for DOE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
VI.2 Package wire bond variations. The horizontal segment was kept a constant
8 mil. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
VI.3 Box-Behnken variations. The dots represent the thirteen trials. . . . . . . . . . . . 161
VI.4 Thirteen DOE trial results: a) insertion loss; b) return loss; c) isolation. . . . 162
VI.5 Package variation performance for return loss. . . . . . . . . . . . . . . . . . . . . . . . . 163
VI.6 Pin assignments for: a) 8-pin package; b) 10-pin package. . . . . . . . . . . . . . . 168
A.1
A.2
A.3
A.4
A.5
A.6
A.7
A.8
A.9
S-parameter error terms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
Microstrip cross-section. The white area is RG4350 dielectric. . . . . . . . . . . . 177
Calibration standards, verification standards, and test board layout. . . . . . . . 178
Test fixture with calibration kit substrate inserted. . . . . . . . . . . . . . . . . . . . . . 179
Simulated and measured response for Thru standard. . . . . . . . . . . . . . . . . . . . 182
S11 simulated and measured data for Open verification standard. . . . . . . . . . 183
Simulated and measured response for Bedde standard. . . . . . . . . . . . . . . . . . 185
S11 TRL and TOSL measured response with Thru standard. . . . . . . . . . . . . 186
ICM calibration standards. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
x
LIST OF TABLES
I.1
I.2
I.3
Selected RF and Microwave Frequency Bands . . . . . . . . . . . . . . . . . . . . . . . .
Relationship between Γ, RL, IL, and Power Lost . . . . . . . . . . . . . . . . . . . . . .
Package Families and Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
II.1
ECPWFG Comparison on Silicon Wafer [65]. Note the excellent agreement for ef f . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Case 1: Analytic Comparison of Embedded Microstrip, CPW and ECPWFG Transmission Lines [74, 66] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Case 2: Analytic Comparison of Embedded Microstrip, CPW and ECPWFG Transmission Lines [74, 66] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
II.2
II.3
III.1
2
4
6
III.2
III.3
III.4
III.5
III.6
III.7
ECPWFG Impedance using Relative Permittivity r = 2.8, t=4 mil, h1 =40
mil, h2 =28 mil. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sumitomo 6300H Ingredients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sumitomo 6300H Data Provided by Sumitomo . . . . . . . . . . . . . . . . . . . . . . . .
Measured Sumitomo 6300H Data From HP4291 . . . . . . . . . . . . . . . . . . . . . .
Expected Simple Resonator Frequencies for Sumitomo 6300H, r = 3.6 . .
Measured Sumitomo 6300H Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Measured Smoothcast 321 Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IV.1
Simulation Performance Comparison for Three Different Configurations . . 111
V.1
V.2
Values from Spicelink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
Circuit Parameters of Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
65
75
76
77
79
82
84
VI.1 ECPWFG DOE Variations and Return Loss Results . . . . . . . . . . . . . . . . . . . . 164
VI.2 DOE Regression Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
A.1
Standard Corrections for Custom TRL Calibration Kit . . . . . . . . . . . . . . . . . 177
xi
ACKNOWLEDGEMENTS
Please spare a few moments to acknowledge with me some of the people that helped
make this dissertation possible - nothing of this size and complexity spanning half a decade
could be accomplished in a vacuum.
The foremost appreciation goes to my advisor Professor Lawrence E. Larson. He has
been my mentor, counselor, editor, instructor, and inspiration. Your help with all the work,
particularly the presentation at RAW CON 2002, will always be remembered.
To my friends and colleagues at Qualcomm who contributed to this magnus opus
in one way or another. As I write, I’m thinking of Ken Montalvo, Craig Lilja, Dr. Andy
Zhang, Dennis Fuoss and most of all, my current manager, Charlie Persico - VP of RF/Analog
ASIC Group of Qualcomm CDMA Technologies. His encouragement and support in this
endeavor was and will always be remembered. There are others not mentioned but their
help and interaction is just as appreciated.
To my two children, Ben and Sophie, who many times wanted to run and play with
Dad but had to wait their turn. Please remember I made myself as available as I could so
that we could share our lives together. Someday you will understand more fully the reasons
behind my distraction.
To my wife Julie, who with patient kindness supported me through the life and times
of this thesis. You truly are a blessing to me.
Finally, the Alpha and Omega - the Lord Jesus Christ. The maker of light so that we
may study it. Without Him we would have nothing to do.
xii
VITA
1989–1993
B.Sc., Engineering Physics (with Distinction), University of
Saskatchewan, Canada
1993–1995
M.Sc., Engineering Physics, University of Saskatchewan, Canada
1996–2003
Qualcomm, San Diego, United States
1997–2003
Ph.D., Electrical Engineering (Electronic Circuits & Systems), University of California, San Diego, United States
PUBLICATIONS
D. Jessie and E. Norum, “A linear accelerator bunch length monitor,” IEEE Trans. on
Nuclear Science, Vol. 43, No. 3, pp. 2154-2162, June 1996.
D. Jessie and L.E. Larson, “Improved techniques for the measurement and modeling of
plastic surface mount packages to 20 GHz,” Radio and Wireless Conference (RAWCON)
2000, pp. 243-246, 2000.
D. Jessie and L.E. Larson, “Conformal mapping for buried CPW with finite grounds,”
Electronic Letters, Vol. 37, No. 25, pp. 1521-1523, 6th Dec. 2001.
D. Jessie and L.E. Larson, “Design techniques for improved microwave performance of
small outline packages,” IEEE Intl. Microwave Symp., MTT-S, Vol. 1, pp. 297-300, 2002.
D. Jessie and L.E. Larson, “An improved characterization method for the dielectric properties of RFIC encapsulating plastics,” Radio and Wireless Conference (RAWCON) 2002, pp.
197-200, 2002.
D. Jessie and L.E. Larson, “An x-band small outline leaded plastic package for mmic applications,” IEEE Trans. on Advanced Packaging, Vol. 25, No. 3, pp. 439-447, Aug.
2002.
D. Jessie and L.E. Larson, “An improved leaded small outline package and equivalent circuit,” IEEE Microwave and Wireless Components Letters, accepted for publication.
D. Jessie and C. Persico, “Bump metal conductor with strapping,” Patent Submission, July
9, 2002, patent pending.
FIELDS OF STUDY
Major Field: Electrical and Computer Engineering
Studies in Electromagnetic Package Design
Professor Lawrence E. Larson
xiii
ABSTRACT OF THE DISSERTATION
An Improved Small Outline Package for Radio Frequency Integrated Circuits
by
Darryl Jessie
Doctor of Philosophy in Electrical Engineering (Electronic Circuits & Systems)
University of California, San Diego, 2003
Professor Lawrence E. Larson, Chair
Package parasitics can significantly degrade the performance of Radio Frequency
Integrated Circuits (RFIC). The most insidious problem is the loss of energy due to the
mismatch between the printed circuit (PC) board transmission line and the RFIC contained
in a package. Traditional small outline (SO) packages present significant reactive elements
between the PC board transmission line and die. This fundamentally limits the usefulness
of these packages to a few GHz. In addition, as commercial frequency bands increase above
5 GHz, SO packages need modification if they are to be useful at these frequencies. To date,
physical and equivalent circuit modeling of these packages has been well understood, but
limited attention has been given to SO package improvement.
If the lead frame can be modified to reduce or eliminate the reactive parasitic effects,
two mutually beneficial results occur. The lead frame has a greater return loss at lower
frequencies, and the useful application of the package can be extended to higher frequencies. The most direct method to accomplish this is to design the lead frame as a CPW-like
transmission line system from the PC board to the wire bond connection point. A set of
new equations have been developed that predict the performance of Embedded Coplanar
xiv
Waveguide with Finite Ground (ECPWFG) transmission lines, which are implemented into
an SO package body. Prototypes of these packages have been constructed and measured
to verify the accuracy of the ECPWFG equations. Circuit models of the new lead frame
have been developed and presented. In addition, three dimensional electromagnetic simulations have been completed to extend the work beyond what was obtained with constructed
prototype packages.
xv
Chapter I
Introduction
I.1
The Role of Packaging in RFIC Applications
The wireless industry is undergoing tremendous growth spurred in part by small,
low-cost Radio Frequency Integrated Circuits (RFICs). RFICs are created from silicon
wafers where the top layer is doped and patterned to provide active regions for circuit
design. These active regions are insulated with an oxide, which contains metal conductors
for interconnecting circuit components.
The simplest RFICs are designed to perform a single, discrete function, such as amplification or mixing. These chip sizes are usually less than one square millimeter in area,
and require less than a dozen connections to off-chip circuitry. More involved RFICs can
contain complete receive or transmit chains, or combinations of both chains into the total
RF portion of a radio. These transceiver chips require several dozen I/O connections to the
printed circuit board (PCB).
Every wireless appliance contains RFICs. This covers a broad spectrum of applications that can only be fully discussed in textbook-sized references such as that given by
Kobb [1]. Table I.1 contains a brief list of typical frequencies used by RFICs.
RFICs must be environmentally protected and have easy electrical connectivity to
the PCB for them to be useful. It is the objective of electronic packaging to provide this
connectivity. A general statement of what an electronic package does can be written as:
1
2
Table I.1: Selected RF and Microwave Frequency Bands
Designation
AM Radio
CATV
Cellular
PCS
Frequency (GHz)
0.001
< 0.512
0.9
1.9
Multichannel Multipoint
Distribution System (MMDS)
WLAN
Satellite CATV
3
5
6.5
Direct Broadcast
Satellite (DBS)
Wireless Ethernet
12.5
Local Multipoint
Distribution System (LMDS)
30
Vehicle Anti-collision
Radar
77
18.5
An electronic package is used to house an electronic device in order to provide environmental protection, mechanical rigidity, and electrical connectivity to the circuit board.
It should be noted that not only are packages used to house active components, but
are also used for high performance passive components. Devices such as couplers, filters,
isolators, attenuators, and just about any other component used in RF and microwave circuit
design, uses electronic packaging as environmental protection, mechanical rigidity, and
electrical connectivity.
The recent trend in new commercial frequency allocations is to higher frequency and
faster rise times. For instance, WLAN, DBS, and wireless ethernet have all been commercially exploited in the past ten years [1]. This has rendered the old design paradigm of
emphasizing the mechanical characteristics of packages with disregard of the RF performance obsolete. Any new package design must have the RF performance at least at the
same priority as mechanical concerns, since lead frame parasitics can cause the package to
3
seriously degrade RFIC performance, if not render the chip unusable.
The ideal package creates a transparent link between the printed circuit board signals
and the silicon chip. Any deviation from the ideal package causes the input signal to be
degraded. This degradation manifests itself in three ways: Insertion Loss (IL), Return Loss
(RL), and pin-to-pin isolation. Figure I.1 illustrates the classic SSOP 8-pin package. The
RF input signal energy is either reflected, transmitted, or coupled throughout the die and
leads. In practical applications all three signal paths exist in varying degrees of magnitude.
Classic SSOP8
RFcoupled
die with active
circuitry and
interconnects
RFin
RFout
RFreflect
210
50
72
All Dimensions in mils (1 mil=25.4 micron)
Figure I.1: Classic SSOP8 with signal paths through the package and die. Only one coupled
path is shown.
The IL and RL are related as [2]
RL = −20log(|Γ|)
(I.1)
IL = −20log(1 − |Γ|)
(I.2)
4
where |Γ| is the reflection coefficient from the leads of the package. The quantity |Γ| is
the ratio of reflected voltage wave magnitude to incident voltage wave magnitude. The
insertion loss is a function of two variables, them being dissipative and mismatch loss
components - which are usually lumped together. Power lost (P L ) because of lead frame
parasitics is given by:
PL = 1 − |Γ|2
(I.3)
Table I.2 lists the relationship between IL, RL, and Power Lost (P L ) for several values
of Γ.
Table I.2: Relationship between Γ, RL, IL, and Power Lost
Γ
RL (dB) IL (dB) Percent PL
0.001
60
0.0087
0.0001
0.01
40
0.0864
0.01
0.1
20
0.9151
1
0.2
13.98
1.938
4
1
0
∞
100
These loss mechanisms can be broadly grouped into radiative, Ohmic, dielectric, and
mismatch. As an example, or 14 dB RL, the IL is almost 2 dB. The power lost because
of the package lead frame is then 4 %. This is power removed from the system and not
available for use by the chip. At 20 dB RL, the IL is 1 dB, and the power lost is 1 %. A
power loss percentage of 1 % or less is used by most package designers as the figure of
merit for acceptable functionality of the package [3, 4, 5].
The isolation is another metric that defines the usefulness of a package, which is a
measure of the energy that is coupled between package leads. A common example of the
effect of poor isolation is the intermodulation distortion in a mixer, since LO energy can
5
combine with the input RF signal before mixing occurs. Another example is the output signal of an amplifier leaking back into the input and causing oscillations. Industry generally
places a 20 dB figure of merit on pin-to-pin isolation as an acceptable value [3, 4, 5], but
whether 20 dB is enough will depend on the gain of the circuit.
Furthering the discussion on the relationship between IL, RL, and isolation, it should
be kept in mind that perfect RL (∞ dB) and IL (0 dB) implies perfect isolation, since
all the input energy is transmitted through the circuit. However, perfect isolation (∞ dB)
does not mean perfect RL and IL, since there may be a significant mismatch or other loss
mechanism intrinsic to the lead frame. Generally, good RL and IL are necessary but not
sufficient conditions for good package performance.
I.2
Survey of Package Types
Now that the framework of RFIC technology has been discussed, it is time to turn
to a survey of what types of packages are available. The package families listed in Table
I.3 are a general summary of the state of traditional packaging at this time. The table includes a description of physical characteristics and maximum operating frequency defined
by the RL, IL, and isolation criteria discussed above. Figure I.2 illustrates the outline of
the packages of Table I.3.
Every RFIC has a unique requirement for I/O paths, and the first step in the selection
process of matching an RFIC to the appropriate package begins with lead count. The In-line
package types such as Plastic Dual In-line Package (PDIP), Ceramic Dual In-line Package
(CERDIP), and Single In-line Package (SIP) are useful for die in the 8-20 I/O range that
require through-hole mounting. The Small Outline (SO) packages in J-bend leads (SOJ),
C-shaped leads (SOC), Shrink SO body size (SSOP), and Miniature SO body size (MSOP)
6
Table I.3: Package Families and Characteristics
Package
Family
Physical
Characteristics
Examples
Figure
I.2
fmax
(GHz)
Ref.
In-line
Leads on opposing
or same sides
PDIP, SIP,
CERDIP
(a)
2
[6]
Small Outline
Leads on two or
four sides, small body
SOJ, SOC,
SSOP, MSOP
(b)
5
[7, 8, 9]
Quad Surface
Mount
Leads on four sides,
large body
PQFP, PLCC,
CERQUAD
(c)
3
[10]
Grid Array
Pins or pads placed
in array on body
BCC, BGA
(d)
7a
[11]
a
The Return Loss peaks to 18 dB at 3 GHz then drops below 20 dB to 7 GHz.
are smaller than the In-line types and are surface mountable. For I/O leads greater than 16,
The Plastic Quad Flat Pack (PQFP), Plastic Leadless Chip Carrier (PLCC), and Ceramic
Quad Flat Pack (CERQUAD) are more appropriate. The most recent developed packages
for use in high pin count (> 20) applications are the Bump Chip Carrier (BCC) and the
Ball Grid Array (BGA). Further details on package types can be found in [6, 12, 13].
7
b)
a)
c)
Not to scale
d)
Figure I.2: Four catagories of plastic packages: a) DIP; b) SO-type; c) QFP; d) Bump Chip
Carrier (BCC).
8
I.3
Research Motivation
It is important to understand the advantages to be gained by improving the pack-
age RF performance. There are at least six reasons why we have selected plastic leaded
packages as the target for this research. The reasons for this choice are discussed in this
section.
The lack of serious research published concerning the improvement of plastic
leaded packages. There has been much effort devoted to the modeling of plastic leaded
packages, but very little has been published on improvement of this class of package [7, 11,
15]. Most of the recent effort in package improvement is in developing new technologies,
such as ceramic [16], BGA [17], Flip-Chip [18], and mm-Wave topologies [5, 19].
The author would like to stress the difficulty experienced in finding any research paper devoted to the improvement of SO plastic packages. Plastic leaded packages have been
neglected in improvement of their RF performance, other than the most basic modification
of skrinking to a smaller package body size. This size reduction is nothing more than a
mechanical scaling of the original SO package type to smaller body sizes. This merely
reduces the magnitude of parasitic electrical components, without seriously investigating
the mechanisms for good RF signal transmission.
Some research effort has been published in improving the interface circuitry between
PC board and die for a Tape Automated Bonding (TAB) process. Wentworth [20] modified
the spacings between TAB leads to present a 50 Ω transmission line impedance between the
PCB and silicon wafer. The conductors were designed into Ground-Signal-Ground (GSG)
configuration which lent itself to a CoPlanar Waveguide (CPW) transmission line system.
The match between the die and PC board showed dramatic improvement.
Ceramic leaded packages have received some attention in signal improvement tech-
9
niques. Kyocera has been a leader in innovative leaded ceramic package improvement.
A Ku-band four lead ceramic package with leads orthogonally centered in the edges of a
square package have shown excellent RL (> 20 dB) and IL (< 1 dB) to 20 GHz [16, 4]. The
presented results do not include the isolation between leads. The methodology is based on
Finite Element Method (FEM) simulations and an iterative approach to reduce or translate
the resonances of the circuit to higher frequencies.
The ubiquitous use of low pin count plastic leaded packages. Although several
non-leaded packages have been developed in recent years, such as the BGA, Bump Chip
Carrier (BCC), Flip-Chip, and mm-Wave topologies, low pin count (< 20 pins) plastic
leaded packages still hold a dominant position as a low-cost, low pin count package alternative. A recent trade journal 1 contains many advertisements for RF components using SO
type plastic leaded packages. Companies such as Sirenza Microdevices, RF Micro Devices,
Hittite, WJ, MCC, Polyfet, and Mini-Ciruits all use these packages in volume.
Extend the useful operating bandwidth to higher frequencies. As integrated circuit technology continues to advance to higher and higher levels of performance, designers
are finding that the characteristics of traditional leaded packages have a greater impact
on their designs. This problem is especially acute for newly emerging consumer-oriented
wireless and fiber-optic systems, such as WLANs operating at 5 GHz, UWB systems, lowcost OC-192, and wireless ethernet (18-19 GHz) applications [1]. The resonances and loss
associated with current plastic leaded packages at these frequencies can severely limit the
performance of these systems.
Better RF performance of leaded packages at lower frequencies. A poorly designed package will affect circuit performance in low frequency applications by removing
1
Microwave Journal, December 2001 issue.
10
energy due to mismatch and insertion loss. Low frequency applications include CATV
(< 512 MHz), Cellular (900 MHz), Personal Communication Service (PCS) (1900 MHz),
Multichannel Multipoint Distribution System (MMDS) (3 GHz), and satellite cable TV
(3.7-6.5 GHz), to name a few [1]. Although the classic SSOP8 package can be used in
applications to 4 GHz, it represents a significant impedance mismatch primarily due to
large series inductance. A package that has close to ideal performance at low frequencies
provides a significant design advantage in the competitive market of commercial wireless,
since little or no matching is required.
Plastic is much lower in cost than ceramic encapsulant. Ceramic leaded packages
have been developed for high performance applications such as Direct Broadcast Satellite
(DBS) service (12.2-12.7 GHz) and Local Multipoint Distribution Service (LMDS) (2432 GHz) [1, 16]. A four-lead ceramic package has an in-volume cost of roughly $ 5 per
package [4], while plastic leaded packages cost approximately $0.01 per lead in-volume
[3]. Ceramic is thus two orders of magnitude greater in cost, and demonstrates the financial
importance of this research.
The research techniques developed can be used for other packages. The techniques developed in this research can be extended to packages with higher pin counts (>
20 pins) such as QFP. Other more exotic package lead frames at mm-Wave frequencies can
also benefit by designing the lead frame as a transmission line rather than a lumped circuit.
I.4
Plastic Leaded Package Equivalent Circuit
The need for modeling the transistion from the PC board to die has produced a
plethora of research papers [7-10,21-27]. SO package lead frame equivalent circuits are
usually expressed as a lumped circuit array where every lead and wirebond is coupled to
11
every other lead and wirebond in an RLCM matrix.
Figure I.3(a) is the cross section of a SO-type plastic leaded package. Included in the
diagram is the outline of the plastic body, lead frame, wirebond, and die. In Figure I.3(b),
a simplified electrical representation of the SO package is given. For simplicity, only six
leads are shown. Note the package must then be mounted on a PC board.
The capacitance Cin is created between the lead frame solder pad and the backplane
ground. It is dependent on the dielectric constant and thickness of the PCB. The quantity
LLf is the lumped inductance of the lead frame conductor and captures some of the PCB
to lead frame parasitic inductance. The inductance Lwb is the lumped inductance of the
wirebond. Cd is the bondpad capacitance where the wirebond attaches to the die. The
terms kLf and kwb are the magnetic coupling coefficients between the lead frame pins and
the wirebonds, respectively. There is also a capacitive coupling term C c between pins. It
should be noted that all pins in a package couple to every other pin, but coupling between
nearest neighbors are usually the most dominant.
A qualitative look at the electrical performance of each element of Figure I.3(b) will
provide an intuitive understanding of their effects on the circuit, and suggest possible design
changes that reduce or eliminate them. We will look at the series elements first and then
the coupling elements.
12
wirebond
leadframe
wirebond
leadframe
die
microstrip-leadframe
leadframe-microstrip
package
PCB
die
a)
L wb
LLf
L wb
LLf
1
6
Cin
k Lf
Cc
k wb
L wb
LLf
2
Cin
3
k Lf
LLf
Cin
Cc
k wb
L wb
Cd Cd
die
Cd Cd
C d Cd
C
k wb c
L wb
k Lf
Cin
LLf
5
C
k wb c
L wb
k Lf
Cin
4
LLf
Cin
b)
Figure I.3: Traditional SO-type leaded package: a) Cross-section showing the origination
of package parasitics; b) Simple electrical model of six leads including nearest neighbor
coupling.
13
Input Capacitance Cin . In reality, this element is outside the package, but is included in package modeling because of its strong interaction with all other elements. For
instance, Cd , Lwb , LLf , and all coupling terms can be lumped into a reactive component
that is in parallel with Cin as shown in Figure I.4. Any deviation in magnitude, such as
variations in the type of PC board used to mount the package, directly affects RL, IL, and
isolation of the board. This is why in mm-Wave applications the board-to-package transition is crucial [19].
Input
C in
Equivalent
Impedance
Figure I.4: Relationship between Cin and equivalent circuit of all other lead frame parasitics.
Cin is directly dependent on the area of the solder pad, the thickness of the board,
and dielectric constant of the PC board material. The classic parallel plate equation for
capacitance provides a first order approximation for the input capacitance:
Cin ≈ solder pad area
P CB thickness
(I.4)
This research will compare traditional leaded package performance with improved
package designs while keeping the same PCB transition for both. This way, the effects of
the PC board have been normalized in relative comparisons.
Lead Frame Inductance LLf . The lead frame inductance is directly dependent on
the length of the conductor and the cross sectional area i.e. a short thick line has less
inductance than a long thin line. A formula that has proven to be accurate at low frequencies
14
is given by [28]
"
#
"
2l
(w + t)
L(µH) = 0.002l ln
+ 0.50049 +
(w + t)
3l
#!
(I.5)
where l, w, t are the length, width, and thickness of the conductor in cm, respectively.
One can see that scaling the size of the lead shorter in length will directly reduce the
series inductance of the lead frame. This is the motivation to smaller SO type packages
(SOIC → SSOP → MSOP). We have arbitrarily limited the scope the research to SSOP
lead frame pin size in order to target the SSOP market and demonstrate the performance
improvement techniques without resorting to mechanical scaling of the package, i.e. techniques developed here can be easily used in any leaded package.
Wire Bond Inductance Lwb . The wire bond inductance is dependent on the length
of the wirebond and the cross sectional area. Most wirebonds are 25-30 µm in diameter
and between one and two millimeters in length. A formula that has proven accurate at low
frequencies is given [29]
"
#
2l
L(µH) = 0.002l ln
− 0.75
ρ
!
(I.6)
where l and ρ are the length and radius of the wirebond in cm, respectively.
More exotic package technologies such as Flip-Chip eliminate wirebonding all together, but are more costly than SO technology [18]. Double wirebonding can also be
accomplished in order to reduce the total inductance of the connection, but cannot always
be used due to space requirement on the die and manufacturing throughput cost. In our research, we have left the connection from the package to die as a single wirebond, in order to
judge the relative improvement of the package and lead frame using the same connectivity
as traditional SO packages.
15
Bondpad Capacitance Cd . The bondpad capacitance is created by the bondpad area
on the die, which is on the order of 75 × 75 µm. The parallel plate formula for capacitance
cannot be applied directly with any accuracy, since the electric field has significant fringing
in the wafer. However, this capacitance is usually smaller than C in [7].
Coupling Factors kLf and kwb . The mutual inductance between adjacent pins and
wirebonds increase the total reactance of any pin, since the inductive reactances of nearby
pins add to the total reactance. In the Laplace domain, the series inductive reactance of a
lead is given by:
jX = sL + sM
(I.7)
where L is the series inductance of the lead or wirebond and M is the mutual inductance
between adjacent conductors.
The coupling factor k is then related to the mutual inductance by
M12
k=√
L 1 L2
(I.8)
where L1 and L2 are the self inductances of either the lead frame or wirebonds. If L 1 = L2 ,
then the coupling coefficient is directly proportional to the mutual inductance and inversely
proportional to the self inductance. Increasing the self inductance of the lines decreases the
magnetic coupling (if the mutual term is left constant), thus reducing the coupling between
lines and improving the isolation. However, this would increase the series reactance of the
lead and degrading RL and IL.
The mutual inductance of a conductor can be modeled to first order by [29]
16


l
M12 (µH) = 0.002l ln  +
d
s
l2
1+ 2 −
d
s

d2 d
1 + 2 + 
l
l
(I.9)
where l and d are the length and distance apart of the conductors in cm, respectively.
The direct dependence of length is again seen in modeling the magnetic effects of current
carrying conductors.
Capacitive Coupling Cc . The mutual capactitance between adjacent pins and wirebonds is particularly insidious, since the total reactance of the other pin is included in the
reactance of the pin of interest. This has a much larger effect on the impedance of the
lead frame compared to magnetic coupling, which only couples other magnetic elements
to adjacent leads.
The coupling capacitance is difficult to predict with an analytic expression, since the
geometry between leads is not uniform and has significant electric field fringing. However,
the dependence of Cc with geometry and dielectric constant between leads is related to
the amount of electric field coupling to neighboring leads. Reducing the amount of flux
coupling to nearby leads will reduce the magnitude of C c .
I.5
The Design of Package Leads as a Matched Transmission Line
This research will emphasize that a lead frame that is designed as a transmission
line matched to the PC board impedance is superior to that modeled best with a lumped
π-network of Figure I.3. Figure I.5 is a possible equivalent circuit with a lead frame designed as a transmission line. The coupling capacitance Cc has virtually been eliminated
by tight coupling of the electric fields to the transmission line medium, rather than straying
to nearby leads. This has a dramatic effect for the improvement of the useful operating
17
bandwidth of the package (increased isolation), since Cc couples the complete other lead
to the lead under investigation.
Furthermore, the 50 Ω printed circuit board transmission line is effectively extended
to the wirebond location on the input lead. This reduces the number of resonances in the
circuit, and increases those resonances that remain. In addition, the IL is reduced since the
choking effect of the lead frame inductance has been removed. The RL has also improved
since the wirebond inductance alone causes less of a mismatch than the lead frame and
wirebond inductance in series.
18
wirebond
Tline
wirebond
Tline
Die
mircostrip-Tline
Tline-microstrip
package
PCB
die
Transmisson
Line
Transmission
Line
a)
L wb
L wb
1
Cin
Zo,EL
k wb
L wb
2
Cin
Zo,EL
3
Cin
Zo,EL
k wb
L wb
Cd
Cd
die
Cd
Cd
Cd
Cd
k wb
6
Zo,EL
C in
L wb
5
k wb
L wb
Zo,EL
C in
4
Zo,EL
Cin
b)
Figure I.5: Cross-section showing the origination of transmission line package parasitics.
19
This is dramatically seen in plotting the input impedance (Z11) magnitude and phase
of the circuits in Figures I.5(b) and I.3(b). These are given in Figure I.6. All plots have the
input port on Pin 2 (50 Ω), and all other pins are terminated in 50 Ohms.
In Figure I.6(a), a plot of the circuit shown in Figure I.3(b) is given. The values
used are Cin =300 fF, Cb =50 fF, LLf =1 nH, Lwb =0.8 nH, kLf = kwb =0.3, and the coupling
capacitance between leads is varied from 0 fF to 100 fF. These values are typical quantities
for SSOP body size [30, 7, 23]. The Self Resonant Frequency (SRF) is judged by the crossover point in phase from positive to negative. A significant increase in SRF is seen across
the bandwidth, moving from 3.3 GHz, to 4.8 GHz as the coupling capacitance is decreased.
In addition, the magnitude of the impedance is only matched to 50 Ω at 0 GHz, and deviates
rapidly at higher frequencies.
In Figure I.6(b), the values used are Cin =300 fF, Cb =50 fF, LLf =1 nH, Lwb =0.8 nH,
Cc =50 fF, and the coupling coefficients (kLf , kwb ) are varied from 0 to 0.6. It can be seen
that variations of magnetic coupling on the order of 0.3 has a similar effect as changes in
coupling capacitance of 50 fF. In reality, a k factor of > 0.3 is unreasonable large, and
is approximately 0.2 for nearest neighbors in plastic leaded packages. However, coupling
capacitance of 100 fF is not unreasonable.
Figure I.6(c) is the situation expected with ideal transmission lines of Figure I.5. The
values used are Zo = 50 Ω, electrical length (EL)=70◦ a 10 GHz, Cin =60 fF, Cb =50 fF,
LLf =0 nH (effectively replaced by a transmission line), Lwb =0.8 nH, k=0.3. The SRF has
been extended to almost 6 GHz, and the magnitude of the input impedance is closer to 50 Ω
across the whole bandwidth of the simulation. The transmission line approach, if designed
as proposed, is clearly far superior in RF performance than previous designs.
20
Figure I.6: Plots of lead frame input impedance (Z11) magnitude and phase: a) coupling
capacitance variation; b) magnetic coupling variation; c) 50 Ω lead frame transmission line.
The asterisk (*) indicates resonance.
21
I.6
Dissertation Focus
The goal of this research is to improve the SSOP application bandwidth (f max ) to 10
GHz or beyond. This would make the package available for X-band applications that up
to now have been in the realm of more costly ceramic leaded packages. This implies the
package must have a RL and isolation of greater than 20 dB, and IL of less than 1 dB to 10
GHz. This would mark a significant improvement over existing SO-type packages.
The approach used will be to modify the existing SSOP lead frame into a matched
transmission line. As will be shown, slight modifications to the SSOP geometry transforms
the lead frame into a variant of the CoPlanar Waveguide (CPW) transmission line system.
Prototypes will be constructed and tested. These will be compared to detailed Full-wave
electromagnetic simulations. For added insight, equivalent circuit models will be developed. An added benefit of improved package performance by using a transmission line
system is the simplification of the lead frame model.
I.7
Dissertation Organization
Chapter I contains an introduction of the current state of RFIC packaging options,
package lead frame modeling and the concept of the lead frame as a transmission line. The
motivation of this dissertation is detailed.
Chapter II develops characteristic impedance and effective dielectric constant of a
modified package lead frame that performs as a transmission line. Initial verification of the
developed equations are obtained from limiting cases of similar transmission line configurations.
Chapter III involves the development of prototype packages with transmission line
22
lead frames. A custom calibration kit is developed and used to accurately measure the
modified packages. These measurements are taken to 20 GHz, with the reference plane at
the input of the lead frame.
Chapter IV presents measured results compared to three-dimensional electromagnetic simulations. The S-parameters are compared to 20 GHz, and are used to judge the
applicability of such simulators in package development. With accurate simulation methodologies in place, the package design work is extend to a near-optimal leaded package.
Chapter V compares measured results to the equations developed in Chapter II. Simple circuit models are developed that provide insight into the electrical performance of the
packages.
Chapter VI address application issues with the package. Some of the pins must be
grounded, and two possible package pin-out configurations are discuss. In addition, the
effect of manufactured variations in dielectric constant and lead frame pitch are discussed
in relation to RL performance.
Chapter VII concludes the dissertation.
Chapter II
Analysis of Embedded Coplanar
Waveguide with Finite Grounds
II.1
Modifying an SSOP8 Lead Frame into a Transmission Line
In the previous chapter, it was discussed that a lead frame defined by a characteristic
impedance and electrical length provides a much better transmission system for RF energy
than one of lumped elements mutually coupled to neighboring leads. This chapter will
describe what changes are necessary to modify an SSOP8 lead frame into an variant of the
CoPlanar Waveguide (CPW) transmission line. In addition, the characteristic impedance
of the new lead frame will be analyzed, and expressions useful in constructing prototype
packages will be developed.
Figure II.1 illustrates the classic SSOP8 package body and lead frame. Mechanical
requirements influences the structure of the package, such as thermal and lead pull-test limitations. The figure shows Sumitomo 6300H plastic encapsulant extending roughly halfway
between the upper bend in the lead frame and the widening of the lead frame near the paddle. This widening of the lead is used to create a hook in the plastic encapsulant to improve
the adherence of the lead to the encapsulant. This provides mechanical stability for the
leads so that they can withstand some pull tension in placement and temperature cycling
on a PC board. Unfortunately, this compromises the high frequency performance of the
23
24
package as will be shown in more detail in Chapter IV.
Figure II.1 also illustrates the modified SSOP8 package known as the Embedded
Coplanar Waveguide with Finite Grounds (ECPWFG) package. Two physical changes
transform the lead frame into an ECPWFG transmission line. The first is the plastic encapsulant has been extended to encase the curves of the lead frame in the plastic. This
performs the same function as the hooks in the traditional SSOP8 package, but minimizes
the impedance discontinuity. As a result, the mechanical stability of the modified design
is comparable to that of the traditional design, while exhibiting enhanced microwave performance. The extending of the encapsulant has another benefit. The lead frame is now
completely encased in encapsulant, creating a constant profile for the ECPWFG transmission line. If it did not extent the length of the lead frame, a step discontinuity would occur.
The second change requires the space between the leads set to constant value in order
to maintain a constant characteristic impedance. Characteristic impedance depends significantly on the dielectric constant of the encapsulant, thickness and width of the metal leads,
and the spaces between the leads in the encapsulant. The next section develops the equation
that predicts the characteristic impedance as a function of these physical parameters.
In Figure II.2, various views of the ECPWFG package are shown. Two embedded
microstrip transmission lines are included in the drawings.
25
Classic SSOP8
1
8
2
7
210
3
6
4
5
210
50
72
Modified SSOP8
1
2
3
8
constant space
for ECPWFG
7
hooks
removed
6
4
160
5
270
20
72
plastic extended
30 mil both sides
All Dimensions in mils (1 mil=25.4 micron)
Figure II.1: Changes necessary to construct an ECPWFG transmission line: Top: Classic
SSOP8 pin package; Bottom: An ECPWFG transmission line.
26
5 mil thick substrate
36
4
35
50 15
80
15
50
35
150
space
70
20
20
280
Figure II.2: The ECPWFG package with embedded microstrip lines on the paddle.
II.2
Embedded Coplanar Waveguide with Finite Ground
Figure II.3 is a cross-section illustrating the ECPWFG package lead frame. Conduc-
tors are shown labeled GSG (Ground-Signal-Ground), since grounding the outside leads to
the backplane ground (shown at the bottom of the figure) is a requirement for CPW-like
transmission. The package height extends from the backplane ground to above the lead
frame conductors (h1+t+h2). The lead frame pitch is b+a.
If the input and output signal pins have adjacent pins grounded, the structure resembles a variant of the Coplanar Waveguide (CPW) transmission line. The CPW transmission system was first presented in 1969 [31]. The conventional CPW structure has infinite
27
Air
h2
G
S
G
t
2a
Dielectric
2b
h1
2c
Ground
Figure II.3: ECPWFG lead frame cross-section.
ground planes on each side of the signal line, and was analyzed with dielectric extending
to infinitum below and vacuum above. In the past three decades, many variants of the basic
CPW structure have been studied [32-45].
In all practical applications, the CPW structure will have finite width ground planes.
These coplanar waveguides with finite grounds (CPWFG) have been studied in many variations [20,46-65]. One important variation that has not been published is the CPW structure
having finite ground planes, a grounded layer below, embedded in r 6= 1 dielectric, and
having finite width (ECPWFG). The analysis of this structure will now be given.
II.3
Conformal Mapping of ECPWFG Transmission Lines
The most fundamental description of a transmission line system includes its charac-
teristic impedance and electrical length. Therefore, an analytic expression that accurately
predicts these characteristics is necessary before design can begin. For the ECPWFG transmission line, the method of formulation to obtain these expressions is developed using the
28
Conformal Mapping Method [32, 67]. The method is a quasi-static analysis applicable to
problems where the wavelength is large compared to the transverse physical dimensions of
the waveguide system. The qualification of “large” is generally understood to be an order
of magnitude. The term ‘quasi-static’ also implies a magnetic wall existing at the interface
plane between signal and ground conductors at all frequencies. The approach does not
provide electric and magnetic field values as a function of frequency, and will not predict
parasitic modes a priori.
Before pursuing the quasi-static approach of ECPWFG transmission line modeling
as applied to package structures, a rough calculation to determine the appropriateness of
the method is in order. If the ECPWFG transmission line is assumed to have an effective
dielectric permittivity the same as the relative permittivity of the encapsulating plastic, the
electrical length (EL) of the conductor spacings (b − a) of the transmission line system of
Figure II.3 can be calculated. At 20 GHz, the EL is then
EL = 360◦
physical space between leads
0.0005 m
= 360◦ 3×108 m/s = 21◦
wavelength in medium
√
9 −1
(II.1)
r ×20×10 s
where a typical value for package plastic of r = 2.8 and the space between signal line and
ground conductor of 0.5 mm is used. The result (21◦ ) is less than a tenth of a wavelength,
therefore conformal mapping is deemed appropriate for this application.
A brief comment on the applicability of the full-wave analysis to obtain the characteristic impedance of ECPWFG transmission line will put the quasi-static approach in
perspective. Although more time consuming and involved, full-wave analysis provides a
rigorous solution for all six Cartesian components of the electric and magnetic fields as a
function of frequency [66]. Full-wave solutions are recommended in CPW-like structures
to be carried out if the operating frequency is above 40 GHz. In our case the frequency
29
of interest is 20 GHz or less, and a constant value for effective dielectric permittivity and
ultimately of the characteristic impedance is deemed accurate enough.
An added benefit of full-wave analysis is that frequency dependent characteristic
impedance and transmission line losses can be determined. However, Gupta [66] has developed attenuation expressions that include conductor, dielectric, and radiative losses for
CPW-like transmission line structures. These can be used directly on the ECPWFG transmission line.
Another advantage of full-wave analysis of ECPWFG systems is that parasitic modes
can usually be determined from the developed expression. On the other hand, the research
publications on CPW-like structures contain criteria for determining the possibility of parasitic modes that accompany these type of structures [66, 65]. A brief survey of these
criteria will determine if and when the ECPWFG package geometry is susceptible to these
parasitic modes.
II.3.1 ECPWFG Package Susceptibility to Slotline Mode
The slotline mode can develop if two adjacent conductors shown in Figure II.4 are
at the same electric potential thus forcing the electric field to concentrate completely in the
other slot. Although the slotline mode is not inherently inferior, it is regarded as a parasitic
mode if the ECPWFG transmission line is designed to carry signal in even mode.
To avoid the slotline mode, the two conductors on either side of the signal conductor
must be kept at the same potential. This insures the traveling wave is in the even mode
[52]. A typical method to accomplish this is to connect the two conductors with bridging
[65] near discontinuities that would allow the establishment of slotline mode. To insure
this same potential, the bridge distance from discontinuities must be smaller than the guide
30
wavelength to prevent slotline mode from being established. In the ECPWFG case, Equation II.1 can be used to determine the EL of the travelling wave, and where bridging must
occur.
Air
V1
Dielectric
V1
ground
Electric field
lines
Ground
Figure II.4: Slotline mode. Electric fields concentrate only between one set of conductors.
If the fields are tightly coupled in a ECPWFG system, the effective dielectric constant
can be equated to the relative dielectric constant. Using a relative dielectric permittivity of
2.8, the wavelength in the transmission system at 20 GHz is then 9 mm or 360 mil. The
total length of the ECPWFG lead frame from the PC board transition to wire bond location
is roughly 80 mil. This is less than half the guide wavelength, and meets the criteria for
avoiding parasitic slotline mode.
II.3.2 ECPWFG Package Susceptibility to Parallel Plate Waveguide
Mode
The parasitic parallel plate mode can occur if the waveguide grounds and the backplane ground are at different potentials, and the signal conductor is wider than the guide
31
wavelength. Keeping all grounds at the same potential can be done with vias or in the case
of the ECPWFG package, the waveguide grounds in Figure II.5 are tied to the backplane
ground at the PCB interface.
grounds narrow
and far away
Air
signal
Dielectric
Electric field
lines
Ground
Figure II.5: Conditions for parallel plate mode.
The parallel plate mode can propagate TEM, TM and TE modes [35, 65, 66]. The
parallel plate waveguide has a higher effective dielectric constant than CPW, which causes
the phase velocity to be lower than that of CPW. When this occurs, some of the propagating energy in CPW mode is lost to parallel plate mode. This is referred to as a “leaky”
waveguide. As in the dielectric slab mode, there is a surface wave.
The cutoff wavelength for the lowest order T M1 and T E1 modes are a half wavelength. In a geometry such as the SSOP8 package, the total substrate height is 72 mil
and the relative dielectric constant is 2.8. Equation II.1 can be used to find the frequency
which the substrate thickness corresponds to 180◦ . This calculates to a cutoff wavelength
of 50 GHz, well beyond our frequency range of interest (i.e. TE and TM modes will not
propagate).
32
II.3.3 ECPWFG Package Susceptibility to Microstrip Mode
If the waveguide grounds are placed a distance greater than the thickness of the substrate under the conductors (b > h1 in Figure II.3), a parasitic microstrip mode can develop.
This is a less extreme version of the parallel plate mode. It is recommended [48, 57, 66] that
both the lateral conductor dimensions and substrate height should be kept below a quarter
wavelength. Equation II.1 can be used to find the frequency that the substrate thickness
corresponds to 90◦ . For a relative dielectric constant of 2.8, the wavelength at 20 GHz is 9
mm (360 mil) of which a quarter wavelength is 90 mil. The value of h1 is approximately
40 mil, less than half the 90 mil maximum recommended in [66].
II.4
Impedance Calculations of ECPWFG
The preceding sections have described the appropriateness of the conformal map-
ping method in developing the characteristic impedance of an ECPWFG transmission line,
along with some concerns about parasitic modes and their effects. Now, we will move
on to developing the equation that predicts the characteristic impedance of an ECPWFG
transmission line.
In quasi-static analysis, the line capacitance per unit length is not a function of frequency. Therefore, the general expression for the effective dielectric constant of the transmission system can then be written
ef f =
C
Ca
(II.2)
where C is the total capacitance per unit length of the ECPWFG and C a is the capacitance
of the line with all dielectrics replaced by air.
The effective permittivity is sometimes written
33
ef f = 1 + q (r − 1)
(II.3)
where q is known as the filling factor and r is the relative dielectric permittivity of the
material. For an infintesimally thin conductor and dielectric ( r 6= 1) extending to infinity
below and vacuum above, q is equal to 0.5 since the fields are equally balanced between
the two mediums.
The phase velocity can be written as [2]
co
vph = √
ef f
(II.4)
where co is the velocity of light. The characteristic impedance can now be written as [2]
Zo =
1
1
= √
Cvph
co ef f C a
(II.5)
where ef f is defined in Equation II.2. This simple expression has the remarkable result
that if the line capacitances with and without dielectrics present are accurately known, the
characteristic impedance of the line is immediately determined.
The transmission line capacitances for the ECPWFG can be drawn as in Figure II.6.
The backplane ground is assumed to extend to infinity. Capacitance C1 is the capacitance
of the top face of the conductors that fringe into the air above. Any solution for these
capacitances must include the boundary condition between plastic dielectric and air. Capacitance C2 is the parallel plate capacitance due to finite metal thickness. Capacitance C3
is caused by the electric fields on the bottom face of the conductors. The capacitance C4 is
the parasitic microstrip mode capacitance that dominates when the ground conductors are
widely separated - as in the parasitic microstrip mode for instance - and can be effectively
ignored in the following development.
34
Air
C1
G
Dielectric
C2
C1
S
C2
C3
G
C3
C4
Ground
Figure II.6: ECPWFG transmission line capacitances.
II.5
Conformal Mapping with the Schwarz-Christoffel Transformation
The electric fields that create capacitances C1 and C3 in Figure II.6 follow a curva-
ture between signal and ground conductors. Conformal mapping transforms these fields in
curved space to straight lines in rectangular space. For CPW-like transmission lines, this
transformation is not as simple as that for a coaxial line. A coaxial line has radial symmetry,
and functions describing the transform can be directly applied.
The ECPWFG transmission lines have complicated electric field structures - which
define the capacitances C1 and C3 - that do not lend themselves to direct transformation.
The method needed to complete the mapping for these lines is the Schwarz-Christoffel
(SC) Transformation [67]. This method takes points in the physical space, usually referred
to as the Z-plane, and maps them into a complex coordinate system (W-plane) where the
capacitance values can be obtained more easily - in our case with simple parallel plate
35
formulas. An example of this transform is given pictorially in II.7, where colinear points
in the Z-plane maps to an enclosed polygon in the W-plane.
It will be shown that the critical vertices of the ECPWFG transmission line do not all
lie along the real Z-axis (Re(Z)). It is then necessary to have an intermediate transformation
of the vertices to the real axis of a temporary (t) plane. Then the SC transformation can be
directly applied from the t-plane to the W-plane.
Z
W
P2
a2
P1
X1
X2
a1
X3 X4
a4
a3
P3
P4
Figure II.7: Relationship of points in W-plane to Z-plane.
The mathematical formulation of the Schwarz-Christoffel transformation is given by
dW
= K (Z − x1 )(α1 /π)−1 (Z − x2 )(α2 /π)−1 • • • (Z − xn )(αn /π)−1 + B
0
dZ
(II.6)
where K is a proportionally constant that scales the image and B rotates it. The quantity a n
is the interior angle and xn are the vertices transformed from the Z-plane. It can be shown
that points at infinity are transformed to unity in Equation II.6 [67]. The solution of this
transformation is in the form of the complete elliptical integral of the first kind [68, 69].
The application of the SC transformation will now be done on the ECPWFG transmission line. From these results we can obtain the capacitances and ultimately the charac-
36
teristic impedance equation.
II.5.1 Calculation of Capacitance Above Conductors
Calculation of Case Where Dielectric not Present
The conformal mapping formulation that follows was used by Owang [71] and is
summarized in [66] for similar, but not identical, structures. The following is an expanded
version of the development published by the author [70]. For each contributing capacitance
of Figure II.6, the derivation will first be described figuratively. Afterwards, the mathematical derivation will be shown.
The first capacitance calculation to develop is that contributed by the fields above the
conductors, illustrated in Figure II.6 as C1. Figure II.8(a) is the top face of the conductors
in the upper right quadrant of Figure II.6. The conductor widths are denoted by the indices
a, b, c according to Figure II.3. This is the Z-plane physical coordinates of x, y.
Figure II.8(b) is an intermediate transformation from the Z-plane to the t-plane. This
is completed with a mathematical function so that point 6 - which bounds the air dielectric above the conductors - is transformed into colinear points on the Re(t) axis. The SC
transformation can now be done from the t-plane to the W-plane.
Figure II.8(c) is the actual SC transformation into the W-plane, which becomes a
parallel plate capacitor - and the classic parallel plate formula can be used. The rectangular
box vertices 1 through 4 are those used in the SC transformation of Equation II.6. Points 5
and 6 are located at infinity and now have no consequence in the capacitance calculation.
37
Im(Z)
6 (infinity)
plastic dielectric
removed above conductors
0
1
2
3
4
5 (infinity)
a
b
c
Re(Z)
(a)
Im(t)
0
6
1
t1
t2
t3
Re(t)
2
3
4
5 (infinity)
(b)
Im(W)
1
2
4
3
5 6
Re(W)
(c)
Figure II.8: Conformal mapping of top face of ECPWFG without dielectric: a) physical
coordinates; b) intermediate transformation to colinear points in the t-plane; c) final transformation into the W-plane.
38
The mathematical development of Figure II.8 will now be given. The transformation
equation to map the physical vertices of Figure II.8(a) to colinear points on the intermediate
t-plane of II.8(b) is given by [72]:
(II.7)
t = z2
Note that at point 5 in the Z-plane, the transform moves the point to positive infinity
in the t-plane. Also, point 6 in the Z-plane at j∞ transforms to negative infinity in the
t-plane.
The Schwarz-Christoffel integral from Figure II.8(b) to II.8(c) is then:
W =
Z
dt
j
i
q
t (t − t1 ) (t − t2 ) (t − t3 )
(II.8)
The indices are then t1 = a2 ,t2 = b2 ,t3 = c2 .
The capacitance per unit length is then
f
K (k1a )
12
C1a = 2o f = 2o 0
K (k1a )
23
(II.9)
e signifies integration over the distances i and j denoted in Figure II.8(c) and Equawhere ij
tion II.8 . The argument k1a is:
k1a
v
u
1−
au
= t
b
1−
b2
c2
a2
c2
(II.10)
The K and K 0 are solutions to the complete elliptic integrals of the first kind and its
complement, respectively.
Hilberg [73] provides accurate approximations to elliptical integral solution ratio
given by
39
K (k)
π
f or 0 ≤ k ≤ 0.707
√
=
0
(1+√k0 )
K (k)
ln 2 1− k0
)
(
 √ 
1  1+ k 
=
ln 2 √ f or 0.707 ≤ k ≤ 1
π
1− k
(II.11a)
(II.11b)
which have a stated accuracy of three parts per million in the range 0 ≤ k ≤ 1.
Calculation of Case Where Dielectric Present
Figure II.9 is the top face of the conductors in the upper right quadrant of Figure
II.6, with dielectric present. Figure II.9(a) is the upper face of the conductors and is in the
actual physical coordinates of x and y. The conductor widths are denoted by the indices
a, b, c. Note h2 is the dielectric thickness above the lead frame. Figure II.9(b) is the intermediate transformation into the t-plane. The dielectric thickness h2 at points 6 (located
at Re(Z)=infinity) and 7 (located at Re(Z),Im(Z) = 0,jh2) are transformed into to points
colinear on the Re(Z) axis. As will be shown, this is readily obtained by the transformation
Eqn. II.12. Figure II.9(c) is the final transformation into the W-plane, which is a parallel
plate capacitor.
40
Im(Z)
jh2
top of plastic
7
6
Er
0
2
3
4
5 (infinity)
a
b
c
Re(Z)
1
(a)
Im(t)
Er
1
6
7
1
t1
t2
t3
Re(t)
2
3
4
5 (infinity)
(b)
Im(W)
2
1
Er
5 6 7
4
3
Re(W)
(c)
Figure II.9: Conformal mapping of top face of ECPWFG with plastic dielectric: a) physical coordinates; b) intermediate transformation to colinear points in the t-plane; c) final
transformation into the W-plane.
41
The transformation equation for the configuration with r 6= 1 dielectric above the
interface is given by [66]:
t = cosh2
πz
2h2
(II.12)
The hyperbolic function includes the effect of the boundary at h 2 . When z = jh2 ,
cosh2
jπ
2
equals cos2
π
2
= 0. This is point 7 on Figure II.9.
The SC integral is then:
W =
Z
dt
j
i
q
(t − t1 ) (t − t2 ) (t − t3 ) (t − t4 )
(II.13)
The capacitance per unit length is then:
f
K (k1d )
12
C1d = 2o (r − 1) f = 2o (r − 1) 0
K (k1d )
23
(II.14)
where the argument k1d is:
k1d
v
u
u
u
u1 −
πa u
sinh 2h
u
2 u
=
πb u
u
sinh 2h
2 u
t1 −
sinh2
sinh2
sinh2
sinh2
πb
2h2
πa
2h2
πc
2h2
πc
2h2
(II.15)
If the ground planes extended to infinity, as is the case for CPW, the mapping function
is the same, but the Schwarz-Christoffel integral is slightly different. The argument k 1d
would then be:
k1d =
πa
2h
2
πb
tanh 2h
2
tanh
(II.16)
This provides a better behaved function when h2 or b is large i.e. it does not diverge to infinity for large h2 or b. This has implications for asymptotic values and will be
42
investigated later.
II.5.2 Calculation of Capacitance Below Conductors
Calculation of Case Where Dielectric Present
The calculation of capacitance C3 below the conductors will now be given. The
formulation with dielectric present below the conductors is similar to that in Figure II.9,
with the exception of h2 replaced with h1. This is illustrated in Figure II.10 where (a)
is the physical coordinates in the Z-plane. Note that the figure has the dielectric mirrored
above the interface. Figure II.10(b) is the intermediate transformation in the t-plane. Figure
II.10(c) is the final transformation into the W-plane.
43
Im(Z)
jh1
7
6
Er
0
1
2
3
4
5 (infinity)
a
b
c
Re(Z)
(a)
Im(t)
Er
1
6
7
1
t1
t2
t3
Re(t)
2
3
4
5 (infinity)
(b)
Im(W)
2
1
Er
5 6 7
4
Re(W)
3
(c)
Figure II.10: Conformal mapping of bottom face of ECPWFG with plastic dielectric: a)
physical coordinates; b) intermediate transformation to colinear points in the t-plane; c)
final transformation into the W-plane. Note the physical arrangement in the Z-plane has
been mirrored to above the conductor interface.
44
The transformation equation for the configuration with only dielectric below the interface is given by [66]:
t = cosh2
πz
2h1
(II.17)
which is the same as Equation II.14 with h2 replaced with h1. The integral is then:
W =
Z
dt
tj
ti
q
(t − t1 ) (t − t2 ) (t − t3 ) (t − t4 )
(II.18)
The capacitance per unit length is then:
The argument k3d is:
f
12
K (k3d )
C3d = 2o r f = 2o r 0
K (k3d )
23
k3d
v
u
u
u
u1 −
πa u
sinh 2h1 u
u
=
πb u
u
sinh 2h
1 u
t1 −
sinh2
sinh2
sinh2
sinh2
πb
2h1
πa
2h1
πc
2h1
πc
2h1
(II.19)
(II.20)
Calculation of Case Where Dielectric Removed
The capacitance C3a is the capacitance C3d with air dielectric replacing r . Then:
f
K (k3d )
12
C3a = 2o f = 2o 0
K (k3d )
23
(II.21)
The argument k3a is the same as k3d :
k3a
v
u
u
u
u1 −
πa u
sinh 2h1 u
u
=
πb u
u
sinh 2h
1 u
t1 −
sinh2
sinh2
sinh2
sinh2
πb
2h1
πa
2h1
πc
2h1
πc
2h1
(II.22)
45
II.6
Edge Capacitance
The capacitance due to finite metal thickness is calculated by the parallel plate ca-
pacitor formula, since the fringing fields at the top and bottom faces of the conductors are
contained in the above derivations [20]. With no dielectric present:
C2a =
2o t
b−a
(II.23)
With dielectric present, C2d = C2a × r .
II.7
Impedance and ef f
The impedance can now be calculated with all known capacitances understood. The
effective dielectric constant is then:
ef f =
C1a + C1d + C3d + C2d
C
=
a
C
C1a + C3a + C2a
(II.24)
The capacitance C4 does not appear in the expression since it is significant only when
the parasitic microstrip mode is established. The impedance is then
1
1
Zo = √
= √
a
v ef f C
v ef f (C1a + C3a + C2a )
(II.25)
where v is the speed of light in vacuum.
II.8
Comparison to Asymptotic Values
Since Equation II.24 and II.25 are new equations not found in the literature 1 , a
good method to check their validity is to compare calculations based on geometries that
W adell [74] incorrectly references W entworth [20] concerning a solution to CPW structures with finite
grounds
1
46
asymptotically approach similar geometries that have known accurate equations. When
using asymptotic values of equations, one must be careful to understand the convergence
of all the capacitance values. The next section will examine several cases.
Comparison to Calculation of Impedance with Wide Groundplanes
This is the case given by [66] of an embedded CPW structure with the value of c in
Figure II.3 extending to infinity. The ECPWFG values are obtained from Equations II.24
and II.25, and the ground planes widths defined by c − b varying from 2 to 182 mil. Figure
II.11 is a pictorial representation of the geometry examined. Figure II.12 plots the change
in ef f and Z0 for h1=40 mil, h2=28 mil, a=10 mil, b=18 mil, t=4 mil, and c varied from
20 to 400 mil.
The value of ef f for ECPWFG approaches that of CPW for wide values of c. The
characteristic impedance has a dramatic difference at low frequency and asymptotically
approaches the CPW value for large values of c. This large difference for narrow values
of waveguide grounds is expected since the total capacitance with 2 mil width waveguide grounds on each side of the signal conductor is much smaller than the CPW with the
grounds extending to infinity. This plot demonstrates the large error in transmission line
design if CPW equations are used for a finite value of waveguide grounds.
47
Air
28
G
Dielectric
S
G
4
20
36
40
varied from 40 to 400
Ground
Figure II.11: Lead frame cross-section for increasing waveguide ground widths. Dimensions in mils.
48
2 .8 3
Ee ff
2 .8 1
CPW [66]
2 .7 8
ECPWFG [Eq.II.24]
2 .7 6
2 .7 3
1 .0
6 .0
1 1 .0
1 6 .0
2 1 .0
c /a
a)
70
Zo (O h m )
65
CPW [66]
60
ECPWFG [Eq.II.25]
55
50
1 .0
6 .0
1 1 .0
1 6 .0
2 1 .0
c /a
b)
Figure II.12: Results with c varied, b=18 mil, a=10 mil: a) effective dielectric constant; b)
characteristic impedance. Excellent agreement is obtained at high c/a ratio (as expected).
49
Comparison to Calculation of Impedance with Narrow Groundplanes
Another result referenced in [66] of an embedded CPW structure with waveguide
grounds extending to infinity can be plotted against Equations II.24 and II.25 for variations
in b − a (gap width). The width of the waveguide grounds are kept a constant 2 mil for all
values of b. Figure II.13 is a pictorial representation of the geometry investigated. Figure
II.14 illustrates the change in ef f and Z0 for h1=40 mil, h2=28 mil, a=10 mil, c = b + 2
mil, t=4 mil, and b varied from 12 to 32 mil.
Air
28
G
Dielectric
S
G
4
varied from 24 to 64
40
20
varied from 28 to 68
Ground
Figure II.13: Lead frame cross-section for narrow (2 mil) waveguide grounds and b varied.
Dimensions in mils.
50
2.90
2.85
Ee ff
2.80
CPW [66]
2.75
ECPW FG [Eq.II.24]
2.70
2.65
2.60
1.2
1.6
2.0
2.4
2.8
3.2
b /a
Zo (O h m )
a)
12 0
11 0
10 0
90
80
70
60
50
40
30
20
CPW [66]
ECPW FG [Eq.II.25]
1.2
1.6
2.0
2.4
2.8
3.2
b /a
b)
Figure II.14: Results with b varied, a=10 mil, c = b + 2 mil: a) effective dielectric constant; b) characteristic impedance. Good agreement is seen when the conductors are tightly
coupled (ground widths approach ∞).
51
For narrow gap widths, the ef f plots converge since the widths of the grounds have
less effect. In other words, as the gap width increases, the electric fields are fringing more
into air as the fields terminate on the waveguide grounds that extend to infinity.
The impedance dependence on b is more dramatic. ECPWFG impedances are greater
than the CPW curve for all b values plotted. In addition, the divergence becomes more
extreme at greater gap widths. Since the characteristic impedance is proportional to the
square root of the ratio of line inductance to capacitance, the ECPWFG has much smaller
total capacitance and thus higher impedance.
Comparison to Calculation of Impedance without Top Dielectric
P onchak [65] measured CPW with Finite Grounds (CPWFG) built on a silicon wafer
with air dielectric above. Measured values of ef f are provided from 1 to 110 GHz. Air
bridges every 8 mil insure the outside conductors are at the same potential, thus thwarting
the establishment of slotline mode.
The measured versus modeled results of the CPWFG are given in Table II.1. Characteristic impedance was not provided in the paper.
Table II.1: ECPWFG Comparison on Silicon Wafer [65]. Note the excellent agreement for
ef f .
Parameter
h2 (mil)
h1 (mil)
a (mil)
b (mil)
c (mil)
t (mil)
r
Value c=5 mil
0
16.5
1
3
5
0.1
11.8
Value c=15 mil
0
16.5
1
5
15
0.1
11.8
ef f (P onchak)
ef f (Eqn.II.24)
6.56
6.58
6.50
6.56
The results in Table II.1 are in remarkable agreement between measured and calcu-
52
lated data. Not shown are results at 110 GHz, where the ef f is reduced to 6.40. This
demonstrates the validity of Equation II.24 to very high frequencies for relatively small
structures. Table II.1 also demonstrate that in this case, ef f has only a slight dependence
on the widths of the grounds (c).
Comparison to Calculation of Impedance for Wide Slots
In this case, W adell [74] has provided expressions for the effective dielectric constant and characteristic impedance for embedded microstrip lines. Using Equations II.24
and 25 and varying b and c to correlate to the embedded microstrip line example, estimates
of accuracy and limitations of the equations can be obtained.
For typical values of a package cross-section of Figure II.3, the effective dielectric
constant and impedance are compared. Figure II.15 illustrates the three examples: embedded microstrip (Figure II.15a), buried CPW (Figure II.15b), and ECPWFG (Figure II.15c).
Note the grounds in the buried CPW and ECPWFG are kept far from the signal conductor
to mimic a buried microstrip line. Tables II.2 and II.3 summarize the results.
53
Air
28
S
4
20
Dielectric
40
Ground
(a)
Air
28
G
S
G
4
20
Dielectric
40
380
infinity
Ground
(b)
Air
28
G
Dielectric
S
G
4
20
380
40
382
Ground
(c)
Figure II.15: Three transmission line systems: a) Buried microstrip line; b) Buried CPW;
c) ECPWFG.
54
Table II.2: Case 1: Analytic Comparison of Embedded Microstrip, CPW and ECPWFG
Transmission Lines [74, 66]
Parameter Buried Microstrip
h2 (mil)
28
h1 (mil)
40
a (mil)
10
b (mil)
N/A
c (mil)
N/A
t (mil)
4
r
2.8
ef f
Zo (Ω)
2.66
102.4
Buried CPW ECPWFG
28
28
40
40
10
10
180
180
∞
181
4
4
2.8
2.8
2.55
109.8
2.64
221.2
Table II.3: Case 2: Analytic Comparison of Embedded Microstrip, CPW and ECPWFG
Transmission Lines [74, 66]
Parameter Buried Microstrip
h2 (mil)
10
h1 (mil)
10
a (mil)
10
b (mil)
N/A
c (mil)
N/A
t (mil)
1
r
3.48
ef f
Zo (Ω)
3.38
48.5
Buried CPW ECPWFG
10
10
10
10
10
10
180
180
∞
181
1
1
3.48
3.48
3.27
57.0
3.24
210.4
55
The values from Equations II.24 used to predict ef f are in close agreement for all
three transmission line modes. However, characteristic impedance diverges most severely
when comparing ECPWFG of Equation II.25 and the published embedded microstrip equation. This can be linked to the differences between Equations II.14, 15 and 16. In Equation
II.16, the tanh function is well behaved for large values of b, and the k 1d value is then finite.
In Equation II.15, the value of k1d tends to infinity for large values of b. This result implies
Equation II.25 is not a good predictor of characteristic impedance if the space between
leads is large.
56
II.9
Summary
This chapter has introduced the modifications necessary to construct an ECPWFG
lead frame in an SO package body size. The modifications include two minor changes to
the existing SO package lead frame. Firstly, plastic encapsulant is extended past the bends
in the lead frame to point where the lead frame is soldered to the PC board. This effectively
extends the transmission line from the wire bond location to the PC board solder joint.
It also provides strong mechanical support, since the bends of the lead frame are deeply
embedded in encapsulant. Second, the lead frame conductors are placed a constant distance
apart along the length of the ECPWFG i.e. from the PC board interface to the wire bond
location. This requires the hooks located at the end of the conventional SO package lead
frame to be removed. This creates a clean ECPWFG transmission line without longitudinal
discontinuities from the PC board to wire bond location.
Conformal mapping was used to determine the required spacing, width, and thickness of the lead frame conductors to provide a 50 Ω ECPWFG transmission line, given a
specified dielectric constant. Conformal mapping is a quasi-static solution, meaning the
geometry of the package lead frame must be electrically small compared to the wavelength. Our highest frequency of interest is 20 GHz, and a simple calculation has shown
the spacing between the ECPWFG lead frame (i.e. the lead frame pitch) is roughly 1/20 of
a wavelength. Thus, the quasi-static approach was deemed appropriate.
An examination of the published literature concerning the conditions for the establishment of parasitics modes is given. The most significant parasitic modes for CPW-like
transmission systems is slotline, parallel plate, and microstrip. In each case it has been
proven the ECPWFG transmission system intended for package lead frames is too electrically small for these modes to develop.
57
An extensive look at the published literature has shown CPW-like transmission line
structures that have similar topologies as ECPWFG. By plotting asymptotic values of these
published transmission line characteristic impedance and effective dielectric constants, they
can be compared in the limit with our ECPWFG transmission line equations. Excellent
agreement is obtained for lead frame geometries encountered in SO type packages.
The next chapter details the construction and measurement of ECPWFG packages
based on these new transmission line equations.
Chapter III
High-Frequency Measurement of
SO-type Packages
Broadband measurement of packages involves careful calibration techniques and
methods. This chapter will detail measurement procedures on leaded packages, starting
with an 8-pin Shrink Small Outline Package (SSOP8). Experience gained on this baseline package will be applied in the more involved measurements of prototype ECPWFG
packages.
There are several reasons for exerting the effort to obtain measured data, rather than
trusting theoretical or simulated results exclusively. Firstly, it provides feedback for any
theoretical development. This feedback is important since it can be used to either verify
the development, or intelligently modify it. Second, insight into the package structure is
extracted that is difficult to obtain from a purely theoretical standpoint. These “insights”
may be planned, or what often happens, they are discoveries made during the testing of
the package. Third, measurements can be used to correlate to simulated data. A mapping
between simulation procedure and measured data can be evolved, so that development work
on unconstructed packages will be more accurate and trusted.
In order to measure SO-type packages, three issues must be addressed: the measurement medium, the calibration procedure, and the interface to test equipment. For practical
reasons, it is best to have the measurement medium closely resemble that encountered
when the package is actually used. The measurements we performed on the SSOP8 and
58
59
ECPWFG packages were on 10 mil substrate interconnected with microstrip lines.
Calibration correction of measurement error is important in order to mathematically
remove parasitic electrical elements between the test equipment and package lead frame.
These extraneous elements enhance the difficulty of de-embedding the performance of the
package from the measurement setup. The procedure used to calibrate our measurements
is the popular Thru-Reflect-Line (TRL) method, and is fully developed in Appendix A.
The interface to the test instrument is usually done with Ground-Signal-Ground (GSG)
probes launched from short transmission lines on the PCB, or microstrip-to-SMA coaxial
cable connectors. We choose the microstrip-to-SMA connection method, and interfaced
with coaxial cables to an HP8720 Vector Network Analyzer (VNA).
One of the most lucid descriptions of board level SO-type package measurements
is published by Godshalk [75] who used a Thru-Open-Short-Load (TOSL) calibration
method for leaded package measurements. The TOSL calibration was done on PC microstrip lines, and the interface to the VNA was with wafer probes. His method has a stated
applicability to 4 GHz, a typical frequency limitation for SO-type packages [22].
A variant of this approach is given by [8] who used the same GSG approach extended
to 26 GHz. The SSOP8 measured had a 50 Ω CPW Thru embedded in the encapsulant. The
package configuration exhibited 20 dB RL to only 2 GHz, and the RL curve peaked to 5
dB at 9 GHz. As will be shown in Chapter IV, this is in good agreement with our results
obtained for an SSOP8 with embedded 50 Ω microstrip Thru.
III.1
SSOP8 Test Topology
The first measurement involved an SSOP8 in a shorted configuration. This was done
to gain some experience in measurement and simulation techniques before much effort was
applied to ECPWFG packages. This section will present and discuss the results, while later
60
chapters will further examine the data by correlating to lumped and simulated models.
Figure III.1 is a top view of an SSOP8. A blank (dummy) package is shown on the
left. The right image is a decapsulated SSOP8, exposing the paddle and segments of the
lead frame. The leads have wire bonds 25 µm in diameter connecting the input pin (pin
“two”) to the paddle. The paddle is also connected to pins “one” and “three” with wire
bonds. These latter pins are shorted to the PC board ground to form a Ground-SignalGround (GSG) lead configuration.
A commercially available Thru-Reflect-Line (TRL) calibration kit was purchase from
Inter-Continental Microwave (ICM) [76] and used to test the SSOP8 package. Details of
this calibration kit are given in Appendix A.2. The test fixture can measure leads directly
opposite to each other, as shown with the microstrip line feeds of Figure III.2(A). Calibration standards are placed into the fixture of Figure III.2(B) one at a time and the calibration
procedure completed.
The mid-section assembly is inserted into the fixture, and decapsulated SSOP8 package of Figure III.1 is then placed in the fixture. The fixture connection to a HP8720 Vector
Network Analyzer (VNA) is through coaxial-to-microstrip connectors. S-parameters are
measured from 1 to 20 GHz and converted to input impedance (Z11). A plot of the magnitude and phase of the Z11 is given in Figure III.3.
The curves in Figure III.3 show a near-ideal short circuit (magnitude is ≈ 0 Ω and
phase ≈ 90o ) to 4 GHz, at which point a resonance occurs. This resonance is due to the
series inductance being coupled in parallel to the parasitic input capacitance created by the
PC board solder pad. A significant higher order resonance is seen at 7.6 GHz that is not
intuitively easy to account for by looking at the test setup [9]. These data will be used in
Chapter V to synthesize an equivalent lumped circuit model.
61
Figure III.1: SSOP8 encapsulated (left) and decapsulated (right) with wirebonds.
Generally, one of the main purposes of obtaining measured data is to develop an
equivalent circuit that can be used in circuit simulators for design purposes [9]. The data
can also be used to validate electromagnetic (EM) simulations of the computer rendering
of the three dimensional package. Once the EM simulation methodology is understood and
agrees with the measured data, future design work can begin with simulation tools rather
than expensive and time consuming measurements. EM simulations and their correlation
to these measured data will be the topic of Chapter IV.
The next section will describe the method used to build prototype ECPWFG packages
used to verify the accuracy of Equation II.25 and performance of 50 Ω lead frames.
62
Figure III.2: A: Midsection used to test SSOP8 packages; B: Midsection placed in fixture.
63
Figure III.3: Measured input impedance of shorted SSOP8.
64
III.2
ECPWFG Package Construction
Several lead frames were constructed into ECPWFG transmission lines to verify the
theory developed in Chapter II. Each package used 4 mil thick copper for the lead frame.
The gap space (S) between leads and lead metal widths (W) were varied to show trends in
performance. Figure III.4 is an outline of the constructed packages. Note that from Figure
II.3 (in Chapter II), W equals 2a and S equals b − a.
Width=W
160
ECPWFG Thru
Space=S
1
8
2
7
3
6
4
5
20
270
72
Figure III.4: Dimensioned view of ECPWFG package as constructed.
Three lead frames were designed into ECPWFG Thru configurations. Using Equations II.24 and 25, predictions for the electrical characteristics of the lines can be obtained.
Table III.1 provides a summary of the expected characteristic impedance and electrical
length of the three ECPWFG Thru packages built. The electrical lengths are determined
from the predicted effective dielectric constant in Equation II.24 and the physical length
of the ECPWFG transmission lines. Each Thru line is 358 mil, which is the total conduc-
65
tor length between PCB connections including the bends. Note that since the dielectric
thickness above and below the conductors is large compared to the conductor separation
distance, ef f will not vary significantly with small variations in separation distances i.e.
the electric field is tightly coupled in the gaps.
Table III.1: ECPWFG Impedance using Relative Permittivity r = 2.8, t=4 mil, h1 =40 mil,
h2 =28 mil.
T
(mil)
4
4
4
W
(mil)
16
20
20
S
(mil)
12
12
10
Impedance ef f
(Ω)
69.6
2.78
66.9
2.78
55.5
2.78
EL = 180◦
(GHz)
9.98
9.98
9.98
Each package was encapsulated in plastic, trimmed and soldered to test boards forming ECPWFG transmission line Thrus. X-ray cross-sections of a ECPWFG Thru with S=8
mil and W=20 mil are given in Figure III.5.
solder
20mil line
8mil gap
input
microstrip
A: Side View
B: Top View
Figure III.5: ECPWFG X-ray view for W=8mil, S=12mil. A: Side View; B: Top View.
66
The production steps involved in making the packages are illustrated in Figure III.6.
Step A is to take the machined lead frame placed on an anvil. Step B takes a mold and
pressed into the anvil, creating the bends in the lead frame. Step C has the bent lead frame
placed into a cavity for encapsulation. Step D is the finished package after trimming the
lead frame and soldering on to the test board.
Figure III.6: Package Construction Steps. A: Lead frame on anvil; B: Mold to bend lead
frame; C: Lead frame in cavity; D: Finished package on PC board.
67
An additional lead frame had a microstrip line embedded in the plastic to form an embedded microstrip line Thru. The embedded substrate used was RG3010 with a published
r of 10.2 at 10 GHz and 5 mil thick. The package has an embedded line width of ideally
5.3 mil for 50 Ω transmission line. Figure III.7 is an image of an embedded microstrip line
before encapsulation.
This package is intended to provide another data point to supplement the idealized
ECPWFG transmission line packages. This configuration can provide lead frame performance similar to that if a die were present. The technique is commonly used to investigate
package performance [7, 5, 16]. Although not exactly the same as lead frame plus die, it is
a closer approximation than just the ECPWFG transmission line Thru package.
Figure III.7: ECPWFG with microstrip line Thru before encalsulating.
68
III.3
ECPWFG Package Measurement Results
Figure III.8 illustrates the Return Loss (RL) and Insertion Loss (IL) for the constructed ECPWFG Thru packages. Figure III.8a is the S11 magnitude plotted as RL. Several important qualitative trends can be seen from the RL plot. First, the ECPWFG Thru
packages shows greater RL for transmission line impedances as they approach 50 Ω. This
is first order confirmation that Equation II.25 qualitatively predicts ECPWFG impedances.
Secondly, the data for the W=16, S=12 mil (69.6 Ω) and W=20, S=12 mil (66.9 Ω) cases
show expected transmission line behavior for a transition from 50 Ω to higher characteristic
impedance (a behavior defined by an electrical length and characteristic impedance) up to
the first resonance, but has increasing ripple beyond 10 GHz. For the W=20, S=8 mil (55.5
Ω) case, the transmission line behavior is not as apparent as the RL curve is essentially flat
up to 10 GHz. This is due to the RL approaching the calibration kit noise floor of 25-30 dB
described in Appendix A.1.
Figure III.8b is the S21 magnitude plot shown as IL. It illustrates better than 1 dB
IL for all three packages to beyond 10 GHz. In addition, decreasing IL is seen as each
ECPWFG transmission line approaches 50 Ω. This IL reduction can be linked to reduced
energy losses due to better impedance mismatch as described in Chapter I.
Figure III.9 is the S-parameter response for the ECPWFG package with a 5 mil (theoretically 50 Ω) embedded microstrip line on dielectric substrate as shown in Figure III.10.
The RL is near 20 dB to frequencies approaching 7 GHz, which is much improved
when compared with the ≈ 4 GHz SRF of SSOP8 packages discussed in the Chapter I.
The increase in RL is evidence that designing a package lead frame matched to the PCB
transmission line impedance is more desirable in transporting RF energy. Had the ECPWFG lead frame been built to an ideal 50 Ω (instead of 55.5 Ω) even greater RL be would
69
expected.
The S21 magnitude plot illustrates less than 1 dB IL up to 8 GHz. A deep minimum
of -11.5 dB is evident at 9.5 GHz and occurs just after the first null in S11 predominately
caused by lumped parasitics of the PC board along with the connection to the embedded
microstrip line. An equivalent lumped circuit will provide some insight into what this
package looks like electrically, and this will be developed in Chapter V.
70
Figure III.8: Measured results for three ECPWFG Thru packages: a) Return Loss, b) Insertion Loss. Width (W) and Space (S) are in mils.
71
Figure III.9: Measured results for ECPWFG package with embedded microstrip Thru of
W=5 mil.
5
4
3
2
6
7
8
1
Figure III.10: Three-dimensional representation of ECPWFG with microstrip line Thru.
Perfromance is plotted in Figure III.9.
72
III.4
Complex Permittivity Measurements
III.4.1 Bulk Material Properties Overview
In order to use electromagnetic (EM) simulation tools effectively, it is imperative to
obtain accurate knowledge of the material properties of the package. The metallic properties of the lead frame can be obtained from published data from the material supplier.
These data are usually well defined and do not vary greatly over frequency. However, the
dielectric properties of encapsulating plastic is usually published only in the MHz region,
and can vary significantly as frequencies approaches near millimeter wave (mmW). Therefore, accurate determination of dielectric properties of the encapsulant must be done for
frequencies in the GHz region.
The goal in measuring the electrical properties of dielectrics is to obtain the complex
permittivity of the material defined as [2]:
= 0 − j00
(III.1)
More common expressions are known as the relative permittivity and loss tangent
defined as
0
o
00
tan δ = 0
r =
(III.2)
(III.3)
where o is the dielectric constant equal to 8.854 × 10−12 [F/m].
A review of the published literature on dielectric measurement methods can be subdivided into several methods [77, 78, 79]. The parallel plate method [80] requires flat,
73
disk-shaped samples. The construction of the sample is relatively simple, and the measurement technique is applicable from near-DC to a several GHz. The HP4291 Impedance
Analyzer is a commercial test instrument designed to measure dielectric properties based
on this method from 1 MHz to 1.8 GHz.
The technique measures the impedance of a sample from which the dielectric permittivity can be obtained. If the sample is assumed to consist of a capacitor in parallel with a
resistor, the total current is the sum of the charging current through the capacitor and the
current through the resistor. If the conductance of the resistor is ωC o 00 , and the capacitance
Co 0 , the admittance of the combination is
Y = (jωCo ) (0 − j00 )
(III.4)
where = 0 − j00 and Co is the free space capacitance of the sample holder. A measurement of admittance then provides 0 and 00 .
A coaxial probe [81] is another method used to measure dielectric properties. It consists of an open coaxial line where the electric fields fringe into the measurement medium.
It works best for fluids and semi-solids, since air gaps cannot occur between probe and
medium.
The transmission line method [82] requires brick or toroidal-shaped samples. The
samples are constructed to fit into a coaxial air-line, and using calculations based on the two
port Scattering parameters, the complex permittivity can be found. The method provides
data over a broad frequency range although the sample must be on the order of the guide
wavelength, limiting the low frequency measurements. The machining of the sample also
increases the error if the sample does not fit smoothly on the interfaces and completely fills
the line.
74
Circuit board elements, such as stripline or microstripline [83, 84] can also be used
to measured the complex permittivity. This method measures the characteristic impedance
of the transmission line and uses known analytical equations to determine the relative dielectric constant. A negative aspect of this method is the difficulty of forming an arbitrary
dielectric material into a planar circuit board.
The resonator method can take the form of series resonant microstrip lines [85]. The
length of the lines determine the dominant resonant location. This method has been used
at discrete frequencies above several GHz, with a different structure is fabricated for each
frequency point.
Partially filled cavities have been used previously [86] to obtain data at the fundamental resonant frequency. The ingenious method in [87] employs a coaxial cavity which
is partially filled and attached to a sliding plunger. The change in cavity length changes the
resonant frequency of the cavity, providing data at a continuum of frequencies from 9 to 12
GHz.
A variation of the cavity method [87] can be employed by filling a resonant cavity
with dielectric and measuring those resonant frequencies above the dominate resonance. A
three dimensional EM simulation tool can be used to accurately determine the permittivity
of the material by iteratively matching the S11 resonant dips of measured data with modeled
results. This method extends the measurement to discrete frequencies above the dominate
resonant frequency - a unique approach that has not been found in the literature. A general
procedure is outlined in [93] and will developed in more detail next section.
75
III.4.2 Sumitomo 6300H Measurements
Sumitomo 6300H is a resin-based plastic used widely in the packaging industry. The
ingredients and general properties can be determined from the Material Safety Data Sheet
(MSDS) [88]. Sumitomo 6300H, also known as Sumikon EME-6300H, is a chemical molding compound. The components by weight are reproduced in Table III.2 [89].
Table III.2: Sumitomo 6300H Ingredients
Name
(%)
Published Published
by weight
ar
tan δ a
Silica Fused
60-90
3.20
0.002
Epoxy, Cresol Novolac (ECN)
10-30
4.11
0.023
Phenol Novolac (Hardener) (EPN)
5-10
4.10
0.025
Antimony Trioxide (Flame Retarder)
1-5
b
Others
<5
Measured at 1 MHz, 25◦ C.
b
Includes: Catalyst, Coupling Agent, Release Agent, Coloring Agent, Low Stress Additive.
a
Where EPN and ECN electrical properties are obtained from [90]. Snow et al. [91]
gives an expression for 0 for resins loaded with separate reinforcement such as the common
PC board material FR-4. This is reproduced in Equation III.5
0
=
h
i
i
Vrsn h
Vrnf
0
0
0
0
(2/3) + (rnf /3rsn ) + 0 Vrsn (2/3) + (rnf /3rsn ) + Vrnf
0
rsn
rnf
(III.5)
where Vrsn and 0rsn are the volume fraction and dielectric constant of the resin, and V rnf
and 0rnf are the volume fraction and dielectric constant of the reinforcement.
Equation III.5 is basically a weighted sum of volumes and dielectric constants of the
constituent materials. A rough approximation of the plastic r and tan δ can be obtained
with a modification of the equation and utilizing several assumptions. These are: 1) The
volume fraction of each material are directly multiplied with dielectric constants; 2) The
76
dielectric properties of the constituents do not change significantly after the bonding process. Taking typical values of the weight fractions, the following estimates for 6300H are
obtained:
r ≈ 0.6(3.2) + 0.3(4.11) + 0.1(4.1) = 3.563
(III.6)
tan δ ≈ 0.6(0.016) + 0.3(0.023) + 0.1(0.025) = 0.019
(III.7)
Although not a rigorous method, the approximation is remarkably close to vendor
supplied data at 1 MHz given in Table III.3. These data are from a Lot of material fabricated
in the mid-1990s, and the measurements were performed by a third-party and supplied to
Sumitomo America.
Table III.3: Sumitomo 6300H Data Provided by Sumitomo
Frequency r
tan δ
(GHz)
0.001
3.84 0.0093
1
3.64 0.0166
5
3.63 0.0182
10
3.65 0.0178
The low frequency material properties of 6300H was measured with the parallel plate
method of the HP4291 Impedance Analyzer. Samples of the Sumitomo 6300H 100 mil
thick where placed in the fixture and measured at 0.1, 1, and 1.8 GHz. The results are
summarized in Table III.4.
To obtain higher frequency measurement points, a variation of the resonator method
is proposed here. By filling a waveguide launch with dielectric and clamping metal at
the open end, a resonant cavity is formed. Broadband S11 measurements reveal resonant
77
Table III.4: Measured Sumitomo 6300H Data From HP4291
Frequency
r
tan δ
(GHz)
0.1
3.820 0.010
0.5
3.762 0.012
1
3.701 0.013
1.8
3.610 0.017
frequencies above the dominant resonance. Expressions for the r and tan δ are well established for the dominant resonance [92], but for higher order modes with permutations in
the cavity (e.g. due to the probe), accurate analytic expressions are difficult to obtain.
However, detailed three dimensional electromagnetic simulations of the geometry
can be used to accurately determine the r and tan δ of the material. This method provides
multiple sample points for determining the electrical material properties into the near mmW
region.
This method has the advantage of using a readily available waveguide launch in a
non-destructive application. Accurate determination of the material properties can be obtained at each resonant location - thus the method is inherently broadband. If desired, these
frequency points can be shifted arbitrarily higher in frequency by inserting a metal plug to
move the resonances higher in frequency.
The method has been called the Multiple-Resonance Method (MRM) [93], and was
used to obtain electrical data above the 1.8 GHz limitation of the HP4291. Figure III.11
illustrates the concept. Figure III.11A contains the actual cavity used and the plastic block
inserted into it. The III.11B illustration contains the idealized outline and cross-section
of the cavity. The dimensions a, b, and c are a = 19.05 mm, b = 9.525 mm and c =
28.575 mm, which are typical for an X-band waveguide launch.
A probe protruding into the chamber is used to excite the cavity. It is sheathed in
78
A: Actual Cavity
SMA
probe
Teflon
b
c
a
plastic
air
B: Idealized Drawing
Figure III.11: Resonant Cavity. A: Actual cavity. B: Idealized outline and cross-section.
79
Teflon and extends 5.334 mm into the cavity. The Teflon is completely through the chamber, as illustrated in Figure III.11B. The probe is calibrated to the end of the coaxial line
using a standard TOSL calibration technique.
The rectangular waveguide resonator of Figure III.11 has resonant frequencies according to the equation [2]
fo =
1
√
2π µ
"
mπ
a
2
nπ
+
b
2
pπ
+
c
2 # 21
(III.8)
where a, b, c are the inside dimensions of the resonator. Table III.5 are expected resonant
frequencies for a cavity with no permutations.
Table III.5: Expected Simple Resonator Frequencies for Sumitomo 6300H, r = 3.6
mode
frequency
(GHz)
T E101
4.98
T E102
6.91
T E011 /T E201
8.74
T M110
9.27
T E111 /T M111
9.68
T E012
9.97
T M210
11.73
T E301
12.74
T E021
16.82
T E120
17.10
The cavity resonant frequencies are expected to shift due to part of the volume of the
cavity being displaced by the dielectric of the probe. An estimate of the overall dielectric
permittivity inside the cavity can be done by using a weighted sum similar to that given
in Equation III.5, even though it is assumed this method is strictly valid for a dielectric
evenly distributed across the cavity. If there is air below the probe and Teflon around it, the
effective dielectric constant can be estimated as
80
ef f =
plastic Vplastic + T ef lon VT ef lon + air Vair
Vtotal
(III.9)
where the subscripts denote the materials in the cavity and V i is the volume fraction of each
material in the cavity. As an example, for plastic = 3.6, Vplastic = 5.05×10−6 m3 , T ef lon =
2.1, VT ef lon = 0.128 × 10−6 m3 , air = 1, Vair = 6.75 × 10−9 m3 , Vtotal = 5.19 × 10−6 m3 ,
the new dielectric constant is 3.55. This would shift the characteristic resonance of the
cavity to 5.02 GHz, about 1 % higher in this case.
On the other hand, the cavity resonant frequencies are expected to shift lower due to
the volume displacement of the probe launch. This is caused by the energy stored in the
electric or magnetic field where the probe is located being displaced by the probe, and the
fields then readjusting to be equal at resonance. For small changes in volume, the shift in
resonant frequency (δω) can be estimated by [92]
δω
δV
=−
ωo
V
(III.10)
where δV and V are the volume fraction displaced and the total volume of the cavity. For
this particular case, the shift lower is roughly 1.3 MHz, or 0.13 %.
Using Equations III.8 and III.10, the expected resonant frequency (ω o ), and using a
dielectric constant of 3.6, a frequency shift of 0.02 GHz lower than the simple resonant frequency of 4.98 GHz in Table III.5 was calculated. The net effect of the multiple dielectrics
and probe displacement is smaller than one percent. This does not mean the same magnitude of effect is expected at higher frequencies, since the field structure inside the cavity is
is different at each resonance.
The loss tangent of a resonant frequency can be determined by measuring the Quality
Factor of a resonance
81
Q=
ω
∆ω
(III.11)
where ω is the resonance frequency and ∆ω is the frequency bandwidth at the half power
(3 dB) point. The total Quality Factor of the cavity is the Q due to the conductive walls and
the dielectric loss tangent, which is defined as
Q=
1
1
+
Qd Qc
!−1
(III.12)
where Qd = 1/tan δ and Qc can be calculated from known equations for a rectangular
cavity [92].
The difficulty in applying the above calculations in determining r and tan δ lies in
obtaining accurate interpretations of the resonant frequency and half-power points from the
S11 magnitude plot. Often, the effects of poles overlap and obtaining meaningful data is
impossible. This often occurs at higher resonances, since they bunch together. In addition,
any anomaly in the dielectric of the resonator, such as the probe or the dielectric around it,
affects the accuracy of the calculations. Simple calculations such as Equation III.9, 10, and
11 are no longer applicable at higher resonances.
The limitations of the theoretical method can be clearly seen in the following examples. Figure III.12 shows measured S11 data for Sumitomo 6300H. The dominant resonance can be seen at 4.99 GHz. Using Equations III.8, III.0, and III.11, the relative dielectric constant is 3.60 and loss tangent 0.019. The vendor supplied data in Table III.3 has r
of 3.63 and tan δ of 0.0182. For this case, it is in good agreement.
For the 9.99 GHz resonance (T E012 ), a calculated r of 3.6 is obtained. The data in
Table III.6 at 10 GHz is at 3.65 - again in good agreement. However, the tan δ value is
difficult to predict because of the corrupting influence of the T E 111 /T M111 resonance at
82
9.68 GHz, which alters the width of the resonance. In addition, the T E 301 resonance at
12.07 GHz has a calculated r of 4.01, which should be either roughly constant at 3.6 or
lower in value, based on the supplied data.
The answer to this problem is in high fidelity three dimensional electromagnetic simulations. These can accurately determine relative dielectric constant and loss tangent of a
material. The simulation tool used is Ansoft High Frequency Structure Simulator (HFSS).
This is a Finite Element Method (FEM) algorithm that divides an enclosed geometry into
many smaller regions where the fields can be numerically solved [94]. For an enclosed resonant cavity, the method is ideally suited. With detail and careful measurements, the cavity
geometry can be drawn in the simulator and material properties assigned. The dielectric
constant and loss tangent of the plastic can be iteratively changed so that the resonant dips
in the measured data can be matched to the simulator. Figure III.12 illustrates an example
of the technique for the 4.99 GHz point.
Using this method, Table III.12 shows good agreement to the measured data supplied
by Sumitomo.
Table III.6: Measured Sumitomo 6300H Data
Frequency
r
tan δ
(GHz)
0.1
3.820 0.010
0.5
3.762 0.012
1
3.701 0.013
1.8
3.610 0.017
4.99
3.599 0.020
6.98
3.458 0.021
11.16
3.413 0.024
12.07
3.519 0.022
83
Figure III.12: Sumitomo 6300H measured (solid line) and simulated (light line) response
for 4.99 GHz case. resonant frequencies are in GHz.
84
III.4.3 Smoothcast 321 Measurements
The same procedure can be applied to other dielectrics. Smoothcast 321 is a two-part
mixture that forms a hard beige colored plastic. The product has the attractive feature in
that no special curing procedure is required [95, 96]. Figure III.13 is the input S-parameter
(S11) response for measured and simulated results. For this particular case, the dielectric
material properties in the simulation are those needed to match the resonant frequency at
5.55 GHz. The results are summarized in Table III.7. This material is used to form the
encapsulant of the prototype ECPWFG packages.
Table III.7: Measured Smoothcast 321 Data
Frequency
r
tan δ
(GHz)
0.1
3.357 0.034
0.5
3.297 0.066
1
3.122 0.077
1.8
2.878 0.070
5.55
2.82 0.068
7.75
2.74 0.069
10.85
2.68 0.075
14.80
2.75 0.070
85
Figure III.13: Smoothcast321 measured (dark line) and simulated (light line) response for
5.55 GHz case. Resonant frequencies are in GHz.
86
III.5
Summary
This chapter has been primarily focused on microwave measurements of leaded packages and their encapsulants. Some discussion was dedicated to the motivation for measuring leaded packages, including: 1) the ability to verify measurements against theory; 2)
gaining deeper understanding of lead frame behavior, and 3) providing benchmark measurements on known cases to correlate to and improve simulation techniques. The ultimate
goal of this correlation is to later investigate“what if” scenarios without constructing packages.
The first measurement described in the chapter involved a SSOP8 pin configured into
an electrical short. This relatively simple case gave us experience in several areas. First,
measurement techniques such as PC board layout and interfacing to test equipment could
be worked out. The Thru-Reflect-Line (TRL) calibration method purchased from a commercial supplier gave insight into how we could develop a more versatile custom calibration
kit for use on unique prototype packages. Secondly, lumped circuit synthesis and modeling
was later completed on the measured data, which will be detailed in Chapter V. In addition,
the Scattering parameter data is used later to correlate full-wave, three dimensional simulation methodology (Chapter IV). Finally, working with the SSOP8 shorted package provided
hands-on test bench experience in construction practices of SO-type plastic packages.
A major topic of the chapter incorporates the design equations in Chapter II (Equations II.24, 25) into prototype ECPWFG Thru packages. Step-by-step procedures of how
to built such packages is given. Three ECPWFG Thru packages built with theoretical
impedances of 69.6, 66.9, and 55.5 Ω were measured with a custom TRL calibration kit
specifically made for this modified lead frame pitch. The data shows good agreement to
predicted impedances, and correlation studies will be more fully developed in Chapter V.
87
In addition, an ECPWFG package was built with a 5 mil wide embedded microstrip
Thru - representing 50 Ω - connecting input with output pins. This configuration is a
common method to gauge the quality of RF match of the ECPWFG lead frame with the
50 Ω PCB transmission lines by de-embedding the effects of the die. The measured data
shows dramatic increase in the useful bandwidth from 5 GHz in the conventional SSOP8
case to nearly 8 GHz with the prototype ECPWFG package.
An often neglected but important component in plastic package modeling and design
is dielectric measurement of the encapsulating plastic. A new method of measurement
called the Multiple Resonance Method (MRM) is described. In this new technique, a oneport waveguide launch is filled with encapsulating dielectric. The open end is then shorted
by clamping the launch onto a sheet of metal and one-port measurements taken. A solid
model of the cavity is also created in a full-wave three dimensional field solver with initial
estimates for the dielectric permittivity and loss tangent. The dominant and high order
resonances are match iteratively between measured and modeled one resonance at a time,
until the material properties give good agreement between simulated and measured data.
This technique has been shown to give superb accuracy at each of the resonant frequency
points with relatively less expense and effort than other dielectric measurement techniques.
In the next chapter, these data form the basis electromagnetic simulation correlations.
Chapter IV
Numerical Electromagnetic Modeling of
SO Packages
IV.1
Numerical Electromagnetic Simulation Overview
Numerical electromagnetic (EM) simulations have been used for package structure
modeling for many years [7, 97]. They provide a cost effective and rapid validation on
the performance of passive circuits. The S-parameters of the package structures built in
Chapter III can be obtained with an EM structure simulator and then compared to measured
data. If good agreement is obtained between simulation and measured data, then the EM
simulation methodology can be used to predict performance on variants of the package
structures without having to physically construct them. In other words, the goal of this
effort is to develop a simulation methodology that can be used on hypothetical structures
to accurately estimate the package S-parameters.
The EM structure simulator selected to model the packages is the High Frequency
Structure Simulator (HFSS) developed by Ansoft Corporation [94]. HFSS has a Graphical
User Interface (GUI) that is used to construct a three dimensional image of the package.
Material properties are entered and input and output ports defined. The generalized Sparameters are then renormalized to 50 Ω and written to a file. This tool was selected over
static solvers since multi-port S-parameters over a wide frequency range can be obtained,
whereas static solvers usually output RLCM matrices with have no inherent frequency
88
89
dependance.
HFSS is based on the Finite Element Method (FEM) solution algorithm which is
used to obtain the electric fields in an enclosed space by dividing the solution volume into
thousands of smaller regions. These regions are defined by four-sided volume polygons
called tetrahedra (tets). The electric fields are manipulated at the four corner nodes and
each midpoint between them, and the center of the tet for a total of eleven points. Dirichlet
and Neumann boundary conditions are enforced at each node, and the field representation
between nodes can approximated with a quasi-quadratic or linear mathematical representations of the fields [98]. We used linear approximations of the fields, since the run-time is
faster even though more tets are required for the same accuracy provided with the quasiquadratic solution [98].
The basic premise of the FEM solution algorithm is to minimize (or maximize) an
expression that is known to be constant (or stationary) about a point. In HFSS, the ports are
excited by electromagnetic waves that are supported by a transmission line having the same
cross section as the port. The energy in each tet is calculated from the electric potential
defined at the port. This energy is then minimized by setting the derivative of the electric
potential formulation equal to zero. This results in a system of equations that requires
the matrix to be inverted to obtain the actual electric field components at each node. The
magnetic field is then derived from the electric field by Maxwell’s Equations. For more
detail on the FEM solutions methodology see [99, 100, 101].
The next sections will describe EM simulation results compared to measured data for
packages in three different configurations.
90
IV.2
Short Circuit SSOP8 EM Simulations
As an initial test case useful for judging the accuracy of the EM simulation procedure, an SSOP8 package was decapsulated and three pins shorted to the paddle. This
configuration and measurement procedure was described in detail in Chapter III.
Figure IV.1 is a dimensioned top view of the structure that was extruded into three
dimensions in HFSS. Pins 1,2 and 3 are shorted to the paddle. Pin 2 is the input lead while
pins 1 and 3 are shorted to ground by vias.
plastic
1
20
8
2
30
7
paddle
210
3
6
120
4
5
50
210
All Dimensions in mils (1 mil=25.4 micron)
45
Figure IV.1: Dimensions of shorted SSOP8 package as constructed.
Figure IV.2 is a plot of the measured and EM simulated input impedance (Z11) magnitude for the shorted package. This simulated data is an improvement from earlier simulation results presented at RAW CON 2000 [9]. The improvements can be attributed to
several factors. First, a denser mesh was used over all solution space (both dielectrics
and metals) giving a better approximation to the electric field. In addition, meshing was
91
completed internal to the conductors. Originally, only the surface of the conductors were
meshed. This will improve the frequency dependent resistance and inductance accuracy of
the structure. Also, the wire bonds were changed from a square cross-section to hexagonal.
In addition, small errors in the placement and length of the wire bonds in the original
structure were corrected. The wire bonds were lengthened 3 mil (about 7 %) and shifted a
few mil relative to each other. This caused the second self resonant frequency (SRF) of the
simulated data to agree more closely to the measured data.
The Z11 data has good agreement up to the first pole frequency. At the second pole
location, at 7.47 GHz, the magnitude has good agreement, although a 300 MHz frequency
error between simulated and measured response is noticeable. This difference is not unexpected since higher order resonances are more sensitive to geometry errors in the simulated
solid model. In addition, the HFSS curve has a low-Q pole at 9.5 GHz that has a shift from
the pole measured at 12 GHz.
As a general statement, this result indicates HFSS data provides good agreement to
the measured results up to the first SRF point, and with lower accuracy up to the second or
third resonance. After the first SRF, small errors in the simulated solid model or material
properties can lead to increased error to measured data.
Great care must be taken to insure the fidelity of the drawn simulation model and
material properties. In the case of the structure’s geometry, X-ray cross-sectioning and
micrometer measurement of the physical location of the metals relative to each other is
necessary. The dielectric properties of the encapsulant must measured with a technique
similar to those outlined in Chapter III.
92
Figure IV.2: EM simulated and measured input impedance for the SSOP8 shorted package.
IV.3
ECPWFG Transmission Line Simulations
Figure IV.3 contains a dimensioned top view of an ECPWFG Thru transmission line
structure. The construction and measurement of these structures were described in Chapter III. The EM simulation methodology developed with the shorted SSOP8 package was
used to predict the performance of these prototype packages before construction. This simulation exercise will further develop our EM simulation techniques to package measured
data.
Measured versus simulated results are shown in Figures IV.4, IV.5, and IV.6. In Figure IV.4, simulated and measured data is plotted for a ECPWFG Thru structure with 20 mil
line widths and 8 mil spaces (nominally 55.5 Ω). The simulated 180 ◦ electrical length (EL)
defined by the minimum S11 magnitude notch occurs at 9.3 GHz. Although the measured
data is somewhat noisy between 3 and 8 GHz, the measured EL is determined to occur at
10.1 GHz. This is within 10 percent of the simulated result. Note that the EL determined
93
space=S
plastic
1
8
2
7
3
6
4
5
20
210
270
All Dimensions in mils (1 mil=25.4 micron)
Figure IV.3: Dimensions of ECPWFG Thru package as constructed, measured and simulated.
from these curves includes the corrupting influence of PC board to ECPWFG transmission
line parasitics, and should not be regarded as the EL of the ECPWFG transmission line
alone.
The characteristic impedance difference between the two curves can be qualitatively
seen at the maximum S11 magnitude located at around 5 GHz. The curves have excellent
agreement at this frequency, but increased error is seen at higher and lower frequencies.
The peaks and valleys in the RL after the first resonance (9.3 GHz) appear in both
measured and simulated data. The measured data generally exhibits more loss and a lower
Q. However, it is noteworthy that HFSS has captured these higher order resonances. This
confirms the suspicion noted with the shorted SSOP8 package that good agreement to the
first SRF is readily obtainable with HFSS, and general agreement after that.
The IL plot is also included to 20 GHz in Figure IV.4. The ripple of the two curves
between 11 and 15 GHz agree remarkably well, although a relative offset of a few hundred
94
Figure IV.4: Simulated (thin line) and measured (thick line) response for ECPWFG Thru
package W=20 mil, S=8 mil designed to 55.5 Ω.
MHz is noticeable.
In Figure IV.5, simulated and measured data is plotted for a ECPWFG Thru structure
with 20 mil line widths and 12 mil spaces (nominally 66.9 Ω). The simulated 180 ◦ electrical
length occurs at 9.9 GHz in the simulated data and 10.8 GHz for measured data. This is
within 10 percent of the simulated result.
Both the measured and simulated EL for this package has shifted to a slightly higher
frequency. This can be attributed to several reasons. The dielectric permittivity may have
been on the lower end of the 2.7-2.8 range after mixing, thus increasing the measured
electrical length. In addition, the PCB-to-ECPWFG transition parasitics may be slightly
higher for this measured package due to soldering inconsistencies. Another culprit could
be the effective increase in electrical length of the ECPWFG transmission lines because of
wider spacing of the conductors (thus decreasing ef f ).
Regardless of these issues, the return loss curves still show good agreement in mag-
95
nitude, although shifted in frequency about 1 GHz: the maximum RL for the measured data
is at 6 GHz, while the simulated curve has the maximum at 5 GHz. This difference can be
attributed to the EL delta between the two curves.
The ripple in the RL curves after the first resonance appear in both measured and
simulated data. These are also visible in the IL data. Again, the difference in EL has
shifted the response with respect to each other, but the general agreement is remarkable.
Figure IV.5: Simulated (thin lines) and measured (thick lines) response for ECPWFG Thru
package W=20 mil, S=12 mil designed to 66.9 Ω.
In Figure IV.6, simulated and measured data is plotted for a ECPWFG structure with
16 mil line widths and 12 mil spaces (nominally 69.6 Ω). The 180 ◦ electrical length occurs
at 10.2 GHz in the simulated data and 10.0 GHz for measured data. This is within two
percent of the simulated data. The impedance of the lines, which is dependant on the
maximum in RL, show excellent agreement at 5 GHz.
The peaks and nulls after the first resonance are again slightly shifted with respect to
each other, but the relative magnitudes have good agreement in both the RL and IL data.
96
The EM simulation methodology developed for prototype ECPWFG Thru package
design has been shown to provide accurate results, especially for frequencies lower than
the first resonance. This provides confidence that the measurement system and threedimensional simulations can predict package performance confidently up to the first resonance (the S11 null). However, one further correlation exercise between constructed and
simulated package response has been done, and is the subject of the next section.
Figure IV.6: Simulated (thin line) and measured (thick line) response for ECPWFG Thru
package W=16 mil, S=12 mil designed to 69.6 Ω.
97
IV.4
ECPWFG Package with Embedded Microstrip Thru
An ECPWFG package was simulated with a 4.5 mil width buried microstrip line
embedded in the encapsulating plastic. The construction of this package was described in
Chapter III. Figure IV.7 is a drawing of the top view of the package and its three dimensional representation.
The substrate chosen for the microstrip line is Rogers 3010. It has a nominal thickness of 5 mil and a published relative dielectric constant of 10.2 at 10 GHz. The lead frame
has 8 mil spaces and 20 mil lead widths, for a nominal 55.5 Ω ECPWFG structure.
15mil gap
plastic
RG3010
embedded microstrip line
1
8
2
7
3
6
70
4
20
210
5
270
All Dimensions in mils (1 mil=25.4 micron)
5
4
3
2
6
7
8
1
Figure IV.7: Dimensions of ECPWFG package with embedded microstrip Thru and three
dimensional representation.
In Figure IV.8, simulated and measured data is plotted for an ECPWFG package
98
with embedded microstrip Thru. The 180◦ electrical length notch occurs at 6.8 GHz in the
simulated data and 6.7 GHz for measured data. This is excellent agreement to the first RL
null. However, after 8 GHz the curves diverge, with the pole at 9.6 GHz on the measured
RL plot occurring earlier than the simulated data at 10.4 GHz, although still within 10
%. In addition, the magnitudes are significantly different, as shown in insertion loss plot
of Figure IV.8b. A comparison of the plots from 12 to 20 GHz shows the curves have
similar trends, but the frequencies where the S-parameter poles and zeros occur and their
magnitudes do not correlate accurately. This is due to the sensitivity of the EM simulated
model to inconsistences in the geometry i.e. geometric inaccuracies equated to errors in the
equivalent reactive circuit elements. The smaller the circuit elements, the more impact the
errors will have.
Although the agreement in RL and IL above 8 GHz is less accurate than that below,
the magnitudes of the curves are in agreement and the peaks and valleys are all visible, only
displaced in frequency. As mentioned in the shorted SSOP8 simulations, minute errors in
constructing the three dimensional solid model manifest themselves in relatively significant
errors at higher frequencies.
99
Figure IV.8: Simulated (thin line) and measured (thick line) response for ECPWFG package with embedded microstrip Thru: (a) return loss, (b) insertion loss.
100
Based on the simulation versus measured data presented for the package structures
with and without embedded microstrip Thru lines, the follow statements can be made regarding the usefulness of EM simulations to accurately predict package performance:
Comment 1: Simulation data can be trusted to the first return loss null (180 ◦ EL) in both
magnitude and frequency.
Comment 2: Simulation data can be trusted only qualitatively after the first null (180 ◦ EL)
in both magnitude and frequency. In other words, the S-parameter poles and zeros
are present, but may exhibit greater than 10 % error in their frequency locations and
magnitudes.
Comment 3: The more complicated the simulation geometry, the more difficult to obtain
good agreement.
Note that the above statements pertain to the simulation methods developed within
this body of work. Other research activity using the FEM of EM simulations will likely
have different caveats.
IV.5
SSOP8 Thru EM Simulations
The purpose to this point in the chapter has been to correlate HFSS to measured
data. In the next sections, the focus will shift emphasis to obtaining simulated data of
hypothetical packages for the purpose of comparing the response of these unbuilt structures.
By way of brief review, Figure IV.9 summarizes the changes proposed to improve
the RF performance of SO-type packages. Figure IV.9a is the traditional SSOP8 package,
while in Figure IV.9b two changes are proposed. The lead frame has been made uniform
from the PCB to the wirebond location. In addition, the encapsulant has been extended
101
to cover the total length of the ECPWFG transmission line. These two changes provide a
cleaner transition form the PCB to the wirebond. Note the paddle length has been decreased
(from 120 to 70 mil), thus increasing the lead frame length. Extending the lead frame length
without the benefit of a transmission line would seriously degrade the package performance
(due larger series and mutual inductance). Figure IV.9c is a three dimensional image of the
ECPWFG package example complete with wirebonds and embedded microstrip lines.
In both cases, two 5 mil wide buried microstrip line are embedded in the encapsulating plastic, similar to that done in the previous section for the prototype ECPWFG package
with embedded microstrip Thru. These are both 50 Ω characteristic impedance lines. Two
microstrip lines were included in the package to estimate the magnitude of the isolation
between signal paths.
102
1
8
2
7
210
120
3
6
4
5
50
210
72
a)
1
8
constant space
for ECPWFG
2
7
hooks
removed
3
6
70
4
160
5
270
20
72
plastic extended
30 mil both sides
b)
5
4
3
2
6
7
8
1
C)
Figure IV.9: Traditional (a) and proposed modified (ECPWFG) (b) SSOP8 packages. The
ECPWFG package is shown in (c).
103
In Figure IV.10, the simulated SSOP8 package with embedded microstrip Thrus are
plotted. The return loss (S22) crosses the 20 dB line at 4.3 GHz, although the isolation
(S42) is greater than 20 dB at 4 GHz. This compares roughly with N dagijimana et al.
[22] estimation for applicable frequency range of existing SO-type packages of 4 GHz. The
insertion loss rolls off rapidly after 4 GHz. The return loss of the outside line (S44) is also
included showing even worse RL, since there is less capacitance in the immediate vicinity.
This frequency limitation severely impacts the utility of the SSOP8 package, which is only
useful for applications to a couple of GHz.
104
Figure IV.10: Simulated SSOP8 Thru response: a) return and insertion loss, b) isolation.
105
Figure IV.11 contains the EM simulation of the ECWPFG package with spaces of
7.8 mil, for a characteristic impedance of 50 Ω for the ECPWFG transmission lines. The
encapsulating plastic dielectric constant was kept at 2.8, which is what was used for the
ECPWFG package encapsulant of Figure IV.8. This meant the embedded microstrip line
Thru had a width of 5.3 mil to insure a 50 Ω line. All other parameters were kept the same
as shown in Figure IV.9.
The ECPWFG package shows dramatic improvement in all important RF metrics
over the traditional SSOP8 package. The return loss (S22) is better than 20 dB to 9.3 GHz
- almost double that seen for the SSOP8 package in Figure IV.10. The insertion loss (S72)
is less than 1 dB to 10.5 GHz, and the isolation better than 20 dB to 7.3 GHz. The return
loss for the outside lead (S44) is much improved over the SSOP8 case, but is lacking the
extra capacitance needed to make an ECPWFG transmission line. These pins could be used
for bias and control voltages. With the subtle improvements detailed in Figure IV.9, is it
clear that the package can be used effectively to 8 GHz and beyond - doubling the effective
usage of the traditional SSOP8.
106
Figure IV.11: Simulated ECPWFG package with embedded mircostrip Thrus.
107
IV.6
ECPWFG Package in MSOP Form Factor
Figure IV.12 is the top view of an ECPWFG package in the form factor of Miniature
SO-type package. The package has been shrunk to a body size of 160 by 100 mil, a reduction of 50 percent in width and 25 percent in length from the standard SSOP8 package.
The input transmission lines have been designed to 50 Ω using Equations II.24 and 25 by
the reduction of the spacings and lead width. The paddle size is now 40 by 100 mil, which
can support a die 1 by 2 mm. This structure was drawn in HFSS and the response plotted
in Figure IV.13. This work was presented in [102].
embedded microstrip lines
15mil gap
plastic
RG3010
7.5mil gap
1
2
3
8
15
7
40
4
6
100
5
160
All Dimensions in mils (1 mil=25.4 micron)
Figure IV.12: Dimensions of ECPWFG Thru in MSOP form factor.
In Figure IV.13, simulated data is plotted for ECPWFG Thru package in MSOP form
factor. The improvement over the SSOP8 Thru response in Figure IV.10 is spectacular. The
MSOP ECPWFG package has 20 dB RL to greater than 16 GHz, far superior to the SSOP8
Thru response.
The IL data illustrates an even larger difference. The IL for the near optimal package
108
is significantly better than 1 dB to above 16 GHz, whereas the SSOP8 is comparable to
only 4 GHz.
The isolation to nearby pins is outstanding compared to the SSOP8. The SSOP8
shows an isolation of 20 dB or better to 4 GHz, whereas this optimal package is 20 dB or
better to 9 GHz. The isolation improvement over that of the ECPWFG in SSOP form factor
is not as dramatic, since the wirebonds have physically moved closer.
109
Figure IV.13: Simulated ECPWFG package with embedded microstrip Thru in MSOP form
factor.
110
IV.7
Summary
The purpose of this chapter was two-fold. First, electromagnetic simulations were
completed on three dimensional computer models of SSOP and ECPWFG packages. The
simulator used was High Frequency Structure Simulator (HFSS), a Finite Element Method
(FEM) full-wave structure simulator. These computer models are based on the packages
measured and described in Chapter III. They include an SSOP8 in a shorted configuration,
three variants of ECPWFG packages, and an ECPWFG package with embedded microstrip
Thru.
In all cases, correlation between simulation and measured data showed good agreement to the first resonance - defined by the first null in return loss of the packages. Beyond
this frequency, the simulations are less accurate but do predict the magnitude of the dominate poles and zeros, but usually shifted in frequency.
The simulation versus measured correlation exercise was important in defining the
applicability of the simulation method to accurately predict package performance. The
next step was to extend the work to investigate the performance improvement in other
configurations that resemble more closely how they would be used. In this manner the true
potential of the ECPWFG lead frame technique can be quantified.
Table IV.1 contains RF performance metrics of packages in three different configurations. The return loss (RL), insertion loss (IL), and isolation of Shrink Small SO, ECPWFG
package in SSOP form factor, and ECPWFG in Miniature SO form factor are given. All
packages had two 50 Ω embedded microstrip Thrus on the paddle and wirebonds connecting the lead frame to microstrip lines. The package usable bandwidth is selected to occur
were RL and isolation is greater than 20 dB, and IL is less than 1 dB.
111
Table IV.1: Simulation Performance Comparison for Three Different Configurations
Package
RL > 20 dB IL < 1 dB Isolation > 20 dB
(form factor)
to (GHz):
to (GHz):
to (GHz):
SSOP
4.3
5.2
4.1
ECPWFG (SSOP)
9.3
10.5
7.3
a
ECPWFG (MSOP)
>16
>16
9
a
The curve peaks up to 19.2 dB at 5 GHz, which I have ignored.
The SSOP example shows a usable bandwidth from DC to roughly 4 GHz. The
ECPWFG in SSOP form factor has roughly doubled the usable bandwidth to nearly 8 GHz.
This is a significant improvement. If the package is shrunk to even smaller dimensions,
such as the MSOP form factor, the package useable bandwidth has increased to over 10
GHz. These examples validate the performance improvement technique of transforming
the lead frame of SO type packages to ECPWFG transmission lines.
In the next chapter, lumped equivalent circuit models for these structures will be developed. These models will provide insight into the electrical performance of the packages
in a more detailed level.
Chapter V
Circuit Modeling of Leaded Packages
V.1
Lumped Element Modeling of Transmission Line Structures
The last chapter dealt with the numerical modeling of plastic leaded SO-type pack-
ages. The results show dramatic improvement in performance of ECPWFG packages over
the traditional SSOP type. These improvements were obtained by modifying the lead frame
into an ECPWFG transmission line electrically modeled best by characteristic impedance
and electrical length rather than lumped LC network. In this chapter, lumped circuit models
based on the measured and simulated results are developed in an attempt to gain more intimate knowledge of the reasons behind the performance improvement. But first, the circuit
concepts related to package modeling discussed in Chapter I will be now be reviewed.
The lumped π-network is a common equivalent circuit implemented to model the
lead frame of existing electronic packages, which consists of series inductance and shunt
capacitors. As will be shown later, this circuit will model a package lead frame adequately
to nearly 10 GHz. However, as an efficient transmission line system, the π-network does
not provide good broadband performance and becomes highly reflective after a few GHz an undesirable situation when attempting to transfer the maximum signal energy.
F ano [103] investigated the maximum bandwidth ideal LC elements could match
a load with source impedance, given a maximum acceptable tolerance on the reflection
112
113
coefficient. This criteria has become known as “Fano Limit”. P aul [104] created a computer code that synthesizes an LC ladder network transmission line made from cascaded πnetworks - in effect, sequentially extending Fano’s Limit to higher frequencies. By adding
more π-networks, a match to any desired bandwidth can be obtained [104]. It is stated that
one π-network can accurately model a transmission line to the frequency corresponding to
approximately one tenth (guide) wavelength. However, this does nothing to improve the
lead frame transmission structure - it only models the performance, however good or bad.
At the most intuitive level, a π-network with series inductance and shunt capacitors
performs as a low pass filter. If the two capacitors are of different values, the response can
resemble Butterworth or Chebechev characteristics [107]. If the values are equivalent, the
response is that of a constant-k filter [2]. The name constant-k is derived from the fact that
if these filter sections are cascaded together, the structure presents a constant propagation
constant to the traveling electromagnetic energy. An investigation into the circuit performance of constant-k networks compared to distributed transmission line performance will
provide an understanding of the frequency limitations of package lead frames.
V.1.1 Constant-k Filter versus Distributed Transmission Line
The constant-k filter forms a link between the distributed LC periodic structure used
to developed the Telegrapher Equation and lumped LC elements. Figure V.1 illustrates
the conceptual steps from a periodic structure to constant-k network. The top circuit is
the classic distributed LC transmission line. This structure can be broken into multiple πnetworks cascaded together. The bottom circuit is a constant-k network approximating the
distributed network at the top, also called a π-network.
The characteristic impedance of a constant-k filter is given by [2] and repeated here
114
L
C
L
C
C
C
L
L
C/2
L
C/2
C/2
L
C/2
C/2 C/2
L
Port 1
C/2
Port 2
C/2
Figure V.1: Top: Classic distributed transmission line; Middle: Cascaded π-networks;
Bottom: Constant-k π-network.
Zo =
s
s
ω 2 LC
L
1−
C
4
(V.1)
where L and C are the lumped inductance and capacitance elements, respectively. The
q
L/C factor can be traced to the classic Telegrapher Equation characteristic impedance.
The second factor shows a frequency dependence that causes the characteristic impedance
of the network to be dispersive. Indeed, for a given inductance, capacitance, and frequency,
the characteristic impedance is zero, or imaginary. The expression has limited usefulness,
since it is only applicable where the line is matched to the load. In most applications this
is not the case, so it is a narrowband approximation of the characteristic impedance.
115
An alternative way to look at the progression from a distributed transmission line to
a single section constant-k filter is by comparing the equations that describe the characteristic impedances. Figure V.2 illustrates important circuit parameters of each transmission
system.
L
Port 1
C
Port 2
C
a)
Zo, EL
Port 1
Port 2
b)
Figure V.2: Two models for lead frames: a) Classic π-network; b) Transmission line defined
by characteristic impedance and electrical length.
The input impedance equation for a distributed transmission line is given by
Zin = Zo
ZL + jZo tanθ
Zo + jZL tanθ
(V.2)
where Zo and ZL are the characteristic impedance of the transmission line and load, respectively. The electrical length variable is denoted by θ. For Z o = ZL , as in the case where
the 50 Ω ECPWFG lead frame is match to a (50 Ω) load, Zin = Zo = ZL and maximum
power can be transferred - the electrical length then becomes irrelevant.
In contrast, from Figure V.2(a) the series inductance of the π-network will act as a
choke at higher frequencies and the capacitors will shunt signal to ground, causing an input
signal to be progressively more attenuated. The frequency which this occurs is roughly one
tenth wavelength in the medium [104].
In order to quantify the input impedance of the π-network to compare to Equation
116
V.2, the derivation for the Zin of the will now be given. The input scattering parameter S11
is the ratio of the reflected voltage wave over the incident voltage wave. In mathematical
terms
Zin − Zo V1− S11 = + V2+ =0 = Γ|V2+ =0 =
V1
Zin + Zo Zo on port 2
(V.3)
where Zo is the characteristic impedance of the input PCB line (50 Ω) and using Figure
V.2(a), Zin can then be equated to

−1
1
Zin =  R
+ jωC 
+ jωL
1+jωCR
=
R (1 − ω 2 CL) + jωL
(1 − ω 2 CL) + jωCR (2 − ω 2 CL)
(V.4)
where R is the terminating resistance on Port 2. S11 is a minimum when Equation V.4 is
equal to 50 + j 0 Ω. By taking the complex conjugate and setting the imaginary part to zero,
the frequency for best return loss is:
ω=
s
L
2 − CR
2
CL
(V.5)
For R = 50 Ω, L = 1.5 nH and C = 0.5 pF, the frequency at which Z in has zero
imaginary part (and 50 Ω real part) is 5.2 GHz. This corresponds to a zero of the constant-k
network, after which the input signal is rapidly attenuated. The value of 5 GHz was shown
in Chapter IV to be the approximate useful bandwidth of SSOP type packages. This is
in contrast with the ECPWFG packages where the transmission line lead frame of 50 Ω
roughly doubled the useful bandwidth of the package, highlighting the difference between
the two models. Note the most significant limitation of the transmission line method of
lead frame development is the wire bond series inductance and shunt capacitance, which
creates a low pass structure at higher (>8 GHz) frequencies.
117
One might comment that the parasitics of the lead frame could be used for a narrowband circuit match. The null of S11 magnitude could be arranged to occur at any frequency
of interest by shifting the null with the input shunt capacitor, which is ultimately dependent on the PC board material and thickness. Using PCB parasitics limits the broadband
usage and generality applicability of this approach i.e. most RFIC designers do not know
the end user PCB board material and thickness. In another example, one researcher has
commented on the potential of using the lead frame as part of the circuit match [106], but
does not provide any specifics on the implementation of the procedure or the limitations.
One would suspect this has limited usefulness since the lead frame cannot be altered and
the resulting parasitics cannot match every circuit imagined - thus again narrowband but
with die space wasted in the circuit match.
The coupling between pins will also degrade circuit performance since RF signal
power is leaked away to other parts of the package. The leakage mechanisms are mutual capacitance and inductance. A simple quantification of this problem is generally not
available, since the geometry of the lead frame can be quite complicated hence the general
reliance of simulation tools to quantify the magnitude of these coupling parasitics. Figure
V.3 provides a general view of the lead frame coupling mechanisms between the two types
of packages. The package lead frame has been cross-sectioned to reveal magnetic (dotted
line) and electric (solid line) field lines. In the SSOP case of Figure V.3(b), the fields are
loosely bound to the lead frame, allowing more stray fields (coupling) between pins.
118
G
S2
S1
G
a)
S2
G
S1
G
b)
Figure V.3: Sketch of coupling mechanisms: Electro-Capacitive (solid lines) and MagnetoInductive (dotted lines). ECPWFG package (a) and SSOP package (b).
119
A closed form expression for the coupling capacitance between S1 and S2 leads with
intervening grounded leads in Figure V.3 does not exist. However, one can use basic relationships to understand the capacitive coupling mechanism. The parallel plate capacitance
formula is given by
C=
A
d
(V.6)
where A is the area perpendicular to the electric field flux and d is the distance between
leads (S1 and S2). By reducing the area of the lead conductors, and moving the conductors far apart, the capacitive coupling can be reduced. In the ECPWFG case, the metal
hooks that are prominent on the SSOP package have been removed, thus reducing the lead
area. However, the leads have been moved closer together to capture the benefit of 50
Ω distributed transmission line effect, which increases coupling. Only three dimensional
simulations can fully determine the effect of capacitive coupling.
An effect not apparent in Equation V.6 is having two grounded conductors electrically
close to the S1 conductor thus reducing stray electric fields. An extreme example of this
tight coupling is the coaxial transmission line, where all electric fields are terminated on
the outside conductive jacket (which is grounded). This transmission line system exhibits
excellent isolation characteristics.
For magnetic coupling, Neumann’s Formula [92] provides a relationship between
geometric variables. Figure V.4 shows two current carrying filaments, which can loosely
be related to two conductors of a lead frame or wirebonds.
The Neumann Formula is given by
~ 1 • dl
~2
µ Z Z dl
M=
4π
R
(V.7)
120
dl1
R
dl2
Figure V.4: Mutual inductance calculated for two current carrying filaments.
~ is a current carrying element, and R is the distance between elements. In order
where dl
to have small magnetic coupling, the filament lengths should be electrically small and far
apart. In the ECPWFG package case, the lead frame has a distributed LC network so
that only the wire bonds will have magnetic coupling. As a rough approximation, for two
parallel wire bonds 0.6 mm in length (RF inductance of ≈ 0.4 nH) and 1.2 mm apart, the
coupling coefficient is k ≈ 0.1. In the SSOP case, the total inductance of the lead and
wirebond are in series, and couple together to other pins. Therefore, we would expect to
the SSOP lead frame to have relatively more coupling than the ECPWFG lead frame.
It has been shown the most effective solution is to minimize or eliminate the parasitics
by modifying the lead frame into a transmission line system that is best described as a
distributed network. This is a broadband solution and ideally can be applicable into near
millimeter wave (mmW) frequencies. In the next section, three different techniques to
obtain equivalent circuit models of package lead frames will be discussed.
121
V.2
Lumped Equivalent Circuit Modeling of Leaded Packages
The lead frame of SO-type packages function as the transition from the PC board to
the die. This transition interacts and filters signals as they pass through the lead frame, thus
degrading the signal. Equivalent circuit modeling with lumped components provides an
electrical description of the components that make up the lead frame, thus giving the RFIC
designer a means to quantify the signal distortion due to the lead frame.
Modeling leaded packages with lumped elements has been done for many years [8,
10, 21, 22]. Generally, there are three methods used to model lead frames. The first and
most straightforward is the analytic approach [24, 27]. A circuit topology is selected for
the lead frame - usually a π or T network - and published analytic expressions for the
inductance, capacitance, resistance, and coupling are applied to the geometry. This method
can have good accuracy if the geometry is relatively simple, or the bandwidth of validity is
narrow (generally < 5GHz for SO-type packages). In other words, the number of variables
in the geometry need to be limited a priori.
The second method involves the use of simulation tools. Most simulation work on
SO-type leaded packages has concentrated on frequencies below 5 GHz [7, 75]. To model
package lead frames, industry relies on software tools that are based on static approximations of RLC equivalent circuits. These are usually accurate only to the first resonance
[105]. A common circuit simulation tool is Ansoft Spicelink static solver, although others
are used [10]. The simulation solution is based on a three dimensional representation of the
package. The methodology uses the Boundary Element Method (BEM) to converge to a
solution by minimizing the error of one solution to the next (known as “adaptive passes”).
With Spicelink, the network is exported from the tool as a T-network in SPICE format.
122
In both the above cases the equivalent circuit topology is derived from an assumed
equivalent circuit topology. This method relies on the experience of the engineer in determining the circuit topology. A third method uses circuit synthesis techniques to obtain an
equivalent circuit topology - thus the most general form of modeling a lead frame.
Unfortunately, there has been little interest in applying synthesis techniques to package modeling because of at least four drawbacks. They are: 1) the intensive mathematical
and time involvement; 2) the need for accurate measured or simulated data from which
an equivalent circuit is synthesized (Z, Y, or S-parameters can be used); 3) the resulting
electrical circuit may not correspond directly to the physical features of the lead frame;
4) although the resulting circuit will have a minimum of circuit elements to describe the
lead frame, more elements are necessary to capture frequency dependent behavior, such as
skin effect. The real power of the method is that an electrical model will always result that
resembles the original measured data over any desired bandwidth.
The next sections will further elaborate on these methods, starting with circuit synthesis methodology on a traditional SSOP8 lead frame.
V.2.1 Circuit Synthesis Solutions
Circuit synthesis techniques have been around for many decades [108, 109], but have
been neglected since the early 1980’s with the advent of powerful circuit optimizers. As
mentioned in the previous section, circuit synthesis is most profitably applied to undeterminable circuit topologies. Optimization techniques only refine a given topology that has
been previously obtained.
As an example of applied circuit synthesis techniques, an SSOP8 shorted into a one
port configuration was measured (as described in Chapter III) and the data will be used to
123
develop a lumped electrical model to 20 GHz. The SSOP8 shorted package top view is
illustrated in Figure V.5, and the magnitude of the circuit response is illustrated in Figure
V.6, where pin ‘2’ is the input measurement pin, and pins ‘1’ and ‘3’ are shorted to the PCB
ground. Note the zero at 18.5 GHz has been ignored.
plastic
1
20
8
2
30
7
paddle
210
3
6
120
4
5
50
210
All Dimensions in mils (1 mil=25.4 micron)
45
Figure V.5: Dimensions of SSOP8 package as constructed.
The goal of this effort is to judge the applicability of lumped synthesis techniques
on modeling an SSOP-like package to high frequencies (20 GHz) - an unusually wide
bandwidth for modeling lead packages. In other words, it is sort of a unique experiment in
synthesis techniques applied to a lead package to judge if the effort is worth the resulting
model.
From the plot of |Z22|, there are three complex poles, two complex zeros, and one
simple zero. As will be seen, a zero at infinity is insured from the construction of the circuit
response in the Laplace domain.
The Z22 polynomial is constructed from Laplace representations of poles and zeros,
which correspond directly to the points of inflection in Figure V.6. By way of review, the
124
L o g M ag n i tu de [dB ]
10000
poles
1000
pole
100
10
zeroes
1
zero
zero @ infinity ->
0.1
0
5
10
15
20
F re q u e n c y [G Hz]
Figure V.6: Measured SSOP8 pole zero plot for Z22.
poles and zeros are defined by:
Simple Zero : s + α
Complex P ole/Zero : s2 +
ωo
s + ωo2
Q
From inspection of Figure V.6, the first (simple) zero can be found from the real
Z22 response at zero frequency. The complex pole and zero values can be determined
√
by measurements of the resonant frequency and the 1/ 2 bandwidth. A limitation of the
method is accurately determining the Quality Factor of a resonance if the pole and zero
are close together, as the pole/zero pair at 12 GHz in Figure V.6 demonstrate. In this case,
an estimation was applied to the measurement, and optimizers used to refine the resulting
polynomial curve. The results of the pole and zeros are:
Zero 1 : F ound f rom s → DC
P ole 1 : fo = 4.634 GHz, Q = 20.2
Zero 2 : fo = 5.233 GHz, Q = 22.8
125
P ole 2 : fo = 7.472 GHz, Q = 73.3
Zero 3 : fo = 11.968 GHz, Q = 5.3
P ole 3 : fo = 12.217 GHz, Q = 6.4
The circuit response in the Laplace domain is then
Z22 =
K (s + α) s2 + 1.43 × 109 s + 1.08 × 1021 s2 + 1.41 × 1010 s + 5.65 × 1021
(s2 + 1.43 × 109 s + 8.47 × 1020 ) (s2 + 6.41 × 108 s + 2.20 × 1021 ) (s2 + 1.20 × 1010 s + 5.89 × 1021 )
(V.8)
where K is a constant found from the imaginary Z22 circuit response at infinity. In this
case we used the result at 20 GHz. This equation is then expanded:
Z22 =
6.39 × 1011 s5 + 9.60 × 1021 s4 + 4.21 × 1033 s3 + 1.85 × 1043 s2 + 3.76 × 1054 s + 4.91 × 1063
s6 + 1.52 × 1010 s5 + 9.19 × 1021 s4 + 5.79 × 1031 s3 + 2.07 × 1043 s2 + 4.99 × 1052 s + 1.17 × 1064
(V.9)
Equation V.9 is plotted in Figure V.7 in comparison to measured data. Ten significant
figures were carried through the calculations although only three significant figures are
shown to simplify the expression. It should be noted that some minor adjustment to the
coefficients were done to keep the synthesis equation positive real, and to provide better
agreement to the low-Q pole/zero pair at 12 GHz.
Figure V.7 shows the poles and zeros at the same frequency locations between measured and polynomial curves. However, the losses in the polynomial case are not as significant as the measured data, even though the two curves agree at DC. A better match
can be obtained if frequency-dependent elements are used instead of the minimum amount
126
L o g M ag n itu de [dB]
10000
measured
1000
100
10
polynomial
1
0.1
0
5
10
15
20
Fre que ncy [G Hz]
Figure V.7: Shorted SSOP8 measured vs polynomial equation for Z22.
of lumped elements [109]. This can readily be seen in the rapid rise in |Z22| from 0 to
1 GHz in the measured data, primarily due to skin effect. Alternatively, the two curves
could be aligned more closely if the DC accuracy of the polynomial was sacrificed. This
frequency-dependant phenomena will be addressed in more detail after the lumped model
is fully developed.
Another discrepancy in Figure V.7 can be seen in the dip of measured data at 18.5
GHz. This zero was neglected in the development of the polynomial in order to simplify
the development.
To begin the synthesis procedure, the first element extracted is a shunt capacitor:
Y 22 =
1
s
=
Z22s→∞
6.3998 × 1011
C → 1.563 pF
Now subtract the result in Equation V.10 from Equation V.9. Z22 is now:
(V.10)
127
Z22 =
6.39 × 1011 s5 + 9.60 × 1021 s4 + 4.21 × 1033 s3 + 1.85 × 1043 s2 + 3.76 × 1054 s + 4.91 × 1063
2.77 × 108 s5 + 2.06 × 1021 s4 + 2.89 × 1031 s3 + 1.48 × 1043 s2 + 4.22 × 1052 s + 1.17 × 1064
(V.11)
The expression is the same order in both numerator and denominator. In this case, s
is replaced with jω, the derivative taken with respect to ω, the roots are found, then the real
part of the expression is plotted and the minimum root selected. In this case, the frequency
where re (Z11) = 0 is a minimum at ω = 0.
Substituting this result into Equation V.11 gives:
Z22 (0) =
4.91 × 1063
1.17 × 1064
(V.12)
R → 0.418 Ω
Subtracting this series resistance from Equation V.11 gives the expression:
Z22 =
6.39 × 1011 s5 + 8.51 × 1021 s4 + 4.20 × 1033 s3 + 1.23 × 1043 s2 + 3.76 × 1054 s
2.77 × 108 s5 + 2.89 × 1021 s4 + 2.89 × 1031 s3 + 1.48 × 1043 s2 + 4.22 × 1052 s + 1.17 × 1064
(V.13)
The next element extracted is a shunt inductor:
Y 22s→0 =
1.17 × 1064
3.74 × 1054 s
L → 0.319 nH
Now subtract the result in Equation V.14 from Equation V.13. Z22 is now:
(V.14)
128
Z22 =
6.22 × 1011 s4 + 8.11 × 1021 s3 + 4.52 × 1033 s + 1.33 × 1043 s2 + 3.24 × 1054
2.47 × 108 s4 + 6.18 × 1020 s3 + 2.40 × 1030 s2 + 1.69 × 1042 s + 3.00 × 1051
(V.15)
The expression is the same order in both numerator and denominator. After the roots
are obtained, the real part of the expression is plotted and the minimum root selected. In
this case, the frequency where re (Z22) = 0 is at ω = 4.40 × 1010 (Hz)−1 .
Substituting this expression into Equation V.15 the result is:
Z22 j4.40 × 1010 = 0.0539 +
s
3.29 × 109
(V.16)
R → 0.0539Ω L → 3.294nH
To graphically review the circuit synthesized at this point, Figure V.8 is given.
0.417 Ohm
0.054 Ohm
3.29nH
1.56pF
0.319nH
Figure V.8: Circuit synthesized, part 1.
The value of R and L given in Equation V.16 is now subtracted from Equation V.15.
The result is now:
Y 22 =
2.47 × 108 s4 + 6.18 × 1020 s3 + 2.41 × 1030 s2 + 1.69 × 1042 s + 3.00 × 1051
(−0.816s3 − 1.41 × 1012 s2 + 1.73 × 1021 s + 1.67 × 1043 ) (s2 + 1.94 × 1021 )
(V.17)
129
To deal with the negative terms in the denominator, Brune’s Impedance Synthesis
Method is now used [109]. This transforms a T-network of three inductors, some possibly
negative, into a realizable transformer. The transformation for the circuit described by
Equation V.17 is shown in Figure V.9. A 0.058 pF capacitor was also extracted in this step.
3.29nH
-2.40nH
k=1
12.1nH
6.45nH
8.85nH
0.058pF
0.058pF
Figure V.9: Circuit synthesized, part 2.
The synthesis equation after this transformation is now:
Z22 =
4.53 × 1011 s2 + 5.43 × 1021 s + 1.66 × 1033
3.39 × 108 s2 + 7.77 × 1020 s + 1.54 × 1030
(V.18)
The expression is the same order in both numerator and denominator. As in Equation
V.11, s is replaced with jω, the derivative taken with respect to ω, the roots are found, then
the real part of the expression is plotted and the minimum root selected. In this case, the
frequency where re (Z22) = 0 is at ω = 6.394 × 1010 (Hz)−1 .
The equation simplifies to:
Z22 j6.394 × 1010 = 6.98 + j3.76
(V.19)
130
R → 6.98 Ω
L → 0.0588 nH
Subtracting this result from Equation V.18 give an expression that requires Brune’s
Impedance Synthesis Method again. The results of the method is shown in Figure V.10.
The last element left is a shunt resistor of 1073 Ω.
6.979Ohm 0.059nH
-0.053nH
6.979Ohm
k=1
0.58nH
0.469nH
0.521nH
0.469pF
0.469pF
Figure V.10: Circuit synthesized, part 3.
The final circuit is illustrated in Figure V.11. Some minor optimization was done to
provide a better match for the Quality Factors of the poles.
0.65
Port 1
0.55
1.00
k=1
0.015
11.5
k=1
3.60
6.98 0.786
0.053
Units: pF,nH,Ohm
Figure V.11: Final synthesized circuit.
0.31
0.646
7700
131
Figure V.12: Plot comparing measured and synthesized a), and on expanded scale b).
132
Figure V.12 compares measured with synthesized results. The poles and zeroes align
properly in frequency, although the synthesized Quality factors are lower, which is the result of not incorporating frequency-dependent elements into the circuit. By replacing each
resistor by a parallel combination of resistance and inductance, as shown in Figure V.13,
the curves can be made to align much closer in magnitude by the use of circuit optimizers
[111, 112]. However, the number of elements has increase, and the series inductance values
must be adjusted to account for the additional series elements.
R constant
R function
of frequency
Figure V.13: Transforming non-frequency dependent series resistance to frequency dependent resistance.
The preceding development has shown the synthesis approach is tedious and involved
- even for a simple one-port circuit. Expanding the method in a two-port application is even
more involved, since transfer functions of both input and transmission equations need to be
dealt with.
The resulting equivalent circuit in Figure V.11 is not easily correlated to the physical
structure of the lead frame. The input capacitance and series resistance are expected, as is
the shunt inductor to ground. The two transformers correspond to the magnetic coupling of
the input wirebond (pin ‘2’) to each side wirebond (pins ‘1’ and ‘3’). The k-factor of one
(k=1) is a result of the fact the input wirebond is shorted through these wirebonds - in other
words, they exhibit perfect coupling.
This author has not found one published paper on synthesis of SO leaded pack-
133
ages since their development in the 1980’s. As stated before, the reason is due to generally lower frequency applications where simple RLC networks suffice, and the advent of
powerful circuit optimizers. The next section will compare the synthesis result to simulations on the same shorted SSOP8 package. This work has been reported by the author at
RAW CON 2000 [9].
V.2.2 Static Solver Solutions
It is worthwhile to compare the static solver approach to package modeling to circuit
synthesis techniques, since this is the most ubiquitous modeling method. The equivalent
circuit of the leads are usually broken into resistance and self and mutual capacitance and
inductance elements [23, 24, 7, 26, 110]. Figure V.14 is a typical circuit topology for three
leads of an SO leaded package. Note coupling terms between ports ‘1’ and ‘3’ could also
have been included.
134
Port 1
R1
L1
Cp1
C1
Cm21
Lm21
RFIC
R2
L2
Port 2
Cp2
C2
Cm32
Port 3
R3
C3
Lm32
L3
Cp3
Figure V.14: Typical SO-type package equivalent circuit.
135
The Spicelink circuit element values are given in Table V.1 for the shorted package synthesized last section. Capacitances are given in femtoFarads (f F ), inductances in
nanoHenries (nH), and resistances in milliOhms (mΩ).
Figure V.15 compares the Z22 input impedance of the lumped circuit values in Table
V.1 with measured data and synthesized results given previously. Note that pins ‘1’ and
‘3’ are shorted to PCB ground and capacitors Cp1, Cp2, Cp3 are shorted together at the
paddle. The mutual inductance values have been converted to coupling coefficients. Figure
V.15b is on a zoomed scale.
Table V.1: Values from Spicelink
Capacitors (f F )
C1
341
C2
233
C3
275
Cm21
43
Cm32
35
Cp1
42
Cp2
42
Cp3
42
Inductors (nH)
L1
1.98
L2
1.76
L3
1.74
k21
0.25
k32
0.26
Resistors (mΩ)
R1
66
R2
63
R3
63
The simulated result from Spicelink has an extremely high Q, which can be attributed to the simple circuit topology and under prediction of the series resistance values.
The agreement between the two modeling methods on the pole/zero locations are remarkably similar. The synthesized pole and zero placement is close to the static solver result,
136
although much more work when into developing the equivalent circuit of Figure V.11.
As a general statement, the synthesis approach will always result in an equivalent circuit (provided the starting transfer function is positive real), but it is also the most intensive.
It works best for circuit topologies that are not easily discerned by inspection or on circuit
applications requiring extremely wide bandwidth. The static solver method is the quickest
and least complicated method to obtain an equivalent circuit, if the circuit losses are not a
high priority in the final application.
In the next section, the analytic modeling approach for the ECPWFG package will
be demonstrated. It will be seen that for clean RF transition from PCB to die, the analytical
approach will give good results, although some optimization is recommended to fine tune
the model.
137
Figure V.15: Plot comparing measured, synthesized, and static simulated a) and on expanded scale b).
138
V.3
ECPWFG Thru Transmission Line Equivalent Circuit
Figure V.16 is the model topology that will be used to develop the ECPWFG Thru
package equivalent circuit. The ECPWFG is modeled as a transmission line defined by
the characteristic impedance Zo , electrical length (EL), and attenuation (a). The electrical
lengths and impedance of the transmission lines are calculated from Equations II.24 and 25.
An attenuation factor of 0.001 dB/mil was incorporated into the model from expressions
for generic coplanar structures that includes both conductor and dielectric losses [66].
L
L
Zo,EL,a
C
C
Figure V.16: Simple ECPWFG Thru model.
The lumped LC networks model the transitions from PCB microstrip to ECPWFG.
Figure V.17 illustrates where the transition parasitics originate. Note that the side-to-side
capacitances and pad capacitance are all in parallel, and have been lumped into one capacitance. The classic parallel plate formula for calculating capacitance was applied to the
broadside and pad capacitances, which resulted in a total capacitance estimate of 0.04 pF.
The ECPWFG-to-microstrip transition inductance can be estimated from [29, 28]
given here:
"
#
"
2l
(w + t)
L = 0.002l ln
+ 0.50049 +
(w + t)
3l
#!
(V.20)
139
where l, w, t are the length, width, and thickness of the conductor in cm, respectively. The
inductance L is in µH. The lead length from the calibration plane located at beginning of
the lead to the plastic body is 20 mil, while the lead thickness is 4 mil. This resulted in a
nominal inductance of 0.096 nH.
plastic package
3
2
1
ustrip
Figure V.17: The PCB-to-ECPWFG parasitics.
The model parameters of the ECPWFG Thru packages are given in Table V.2 and are
based on agreement between measured and model S22 curves of Figures V.18, V.19, and
V.20. Some minor discrepancies can be seen from theoretical values given in Table III.1.
These are caused by: 1) solder inconsistencies from one package test board to another; 2)
sub-mil errors in lead frame spacings; 3) dielectric inconsistencies occurring when mixing
products.
Table V.2: Circuit Parameters of Model
L
C
Zo EL = 180◦
(nH) (pF) (Ω)
(GHz)
0.10 0.05 68.8
9.7
0.09 0.06 65.9
9.9
0.10 0.04 55.0
9.7
140
Figure V.18: Measured (thick line) and modeled (thin line) results for 69.6 Ω ECPWFG
Thru.
141
Figures V.18 and V.19 show excellent agreement to 10 GHz. Higher order effects
(low-Q poles and zeros) - that are not captured by the simple model of Figure V.16 are seen
above 12 GHz. In Figure V.20, the magnitude of the curves are similar up to 10 GHz, but
the measure data shows a 1 dB ripple between 3 and 9 GHz.
Figure V.19: Measured (thick line) and modeled (thin line) results for 65.9 Ω ECPWFG
Thru.
This rippling can be caused in two ways. The first is calibration uncertainties, where
Line standards overlap at 5 and 7 GHz. The second reason can be attributed to other
package parasitics not captured in the simple model of Figure V.16. For instance, as the
ECPWFG characteristic impedance approaches that of the system impedance (50 Ω), the
LC transition parasitics have a more significant roll. The two series inductors alone have
an impedance of j6 Ω at 5 GHz, which equates to a return loss of roughly 24 dB. In other
words, the return loss is so good, second order effects are starting to be resolved.
These higher order parasitics disrupt the transmission line behavior above 10 GHz in
142
all three graphs, but the general trend of RL improvement can be seen between the three
packages. By comparing Tables III.1 and V.2, Equation II.25 can be deemed accurate to
approximately 2 percent in this application.
Figure V.20: Measured (thick line) and modeled (thin line) results for 55.5 Ω ECPWFG
Thru.
143
V.4
Two-port Modeling of ECPWFG Packages for Improved
Microwave Performance
The premise of fabricating and measuring the ECPWFG Thrus has been that if they
demonstrate good RF performance, then placing a paddle with a die in an ECPWFG-based
package should provide better performance over that of a standard SSOP. In simplest terms,
the improvement is caused by replacing the low pass π-network of the SSOP with with a
ECPWFG transmission line.
Figure V.21 is a diagram of a prototype ECPWFG plastic leaded package, the construction of which is detailed in Chapter III.2 in Figure V.21. An embedded microstrip line
“Thru” was placed in the 55.5 Ω ECPWFG Thru package to provide comparisons to the traditional SSOP8. Note the length of lead frame embedded in encapsulant is approximately
three times the lead fame length embedded in the plastic of the SSOP package. In addition,
the lead frame pitch has been reduced from 50 mil to 28 mil (depending primarily on the
dielectric properties of the encapsulant, lead frame thickness, and width), leaving a gap of
roughly 8 mil between leads. Generally, this relatively narrow gap should not seriously
affect PC board layout, since most board houses have trace-to-trace minimum distance of
6 mil.
The design of an embedded microstrip line with 50 Ω characteristic impedance is less
well quantified than a traditional microstrip line with air dielectric above, since the electric
field between the conductor and ground plane is not as well confined. An expression given
by [74] was used to design the embedded microstrip line impedances embedded in a package. The formulation is empirical and bounds the dielectric permittivity of an embedded
microstrip line in two different dielectrics as ef f,ustrip < ef f,eustrip < r , where ustrip
and eustrip are un-embedded and embedded microstrip lines, respectively. For Rogers
144
15mil gap
RG3010
plastic
embedded microstrip line
1
8
S
2
7
W
3
6
4
70
5
270
Figure V.21: ECPWFG package with embedded 50Ω Thru line. The lead pitch is varied to
present a 50Ω characteristic impedance to the bondwire location. All dimensions in mils.
RG3010 with a published r of 10.2, the relation is then 7.2 < ef f,eustrip < 10.2. It was
found that the line actually constructed, which was intended to be 5.3 mil wide for 50 Ω,
was 4.5 mil wide for a characteristic impedance of 64 Ω. This error will cause the package
transmission system to have degraded overall electrical performance, but meaningful data
can still be extracted and used to further our understanding.
Figure V.22 is the equivalent circuit for this package. The LC values of the PC board
transition were obtained from the same method described for the ECPWFG Thrus of the
previous section. The series inductance of the ribbon-like connection from ECPWFG transmission line to embedded microstrip line was calculated from Equation V.20. Although the
series inductance is reduced when a ribbon is used as opposed to a wirebond, a significant
shunt capacitor (0.81 pF) is needed to account for the added capacitance of the ribbon and
electric field fringing at the end of the ECPWFG line. The π-network shunt capacitances
145
connecting the ECPWFG with the embedded microstrip line were estimated and later optimized to provide the best fit to measured data. Note that all package capacitances have 1 kΩ
resistors in parallel due to the lossy nature (tan δ = 0.07) of Smoothcast321 encapsulant.
The ECPWFG transmission line electrical length (76◦ ) and impedance are obtained from
the design equations in Chapter II (Equations II.24, 25), and known material and geometric
factors discussed in the pervious chapter.
A plot of measured and circuit response is given in Figure V.23. Although it is a
prototype package with less than ideal transmission lines, the measured package response
shows respectable return and insertion loss to 8 GHz. This example of an ECPWFG package provides a basis for developing a circuit model that can be used with a more ideal
ECPWFG structure.
The prototype nature of the measurement system and packages did not cover the
measurement of pin-to-pin isolation. The relative improvement in isolation can be done by
simulating the SSOP and ECPWFG packages in four port configurations - constructed with
two embedded microstrip Thrus - and will be given in the next section.
146
ECPWFG-to-ustrip
ECPWFG
ECPWFG-to-ustrip
ECPWFG
ustrip
ustrip-ECPWFG
ustrip-ECPWFG
package
PCB
0.09
0.05
Zo=57
0.34
EL=76
Zo=64
EL=73
0.81
0.05
0.34
Zo=57
EL=76
0.81
0.12 0.12
0.09
0.05
0.05
Figure V.22: ECWPFG Thru package equivalent circuit. Capacitance is in pF, inductance
in nH, impedance in Ω, and electrical length (EL) in degrees.
Figure V.23: Model vs Measured for ECPWFG embedded microstrip line. Light curve is
measured, solid curve is modeled.
147
V.4.1 SSOP Package Model with Isolation
The lumped model for the SSOP8 package in Figure V.24a now be given. For comparison, the ECPWFG package is also given in Figure V.24b, the circuit model will be
given in the next section. Two embedded microstrip lines are on the paddle in both cases to
insure the isolation performance is modeled. Note that the SSOP8 package has its ground
leads shorted to the paddle with metal slugs to directly compare to the ECPWFG package
model performance. A actual SSOP package would have these leads wire bonded.
1
8
2
7
210
3
6
4
5
210
50
a)
8
1
2
7
3
6
4
5
270
160
20
b)
Figure V.24: Classic SSOP8 package (a) and ECPWFG package (b).
The electrical model of the SSOP8 package is given in Figure V.25. The lumped
values of the circuit model were obtained from Spicelink and placed in a standard π-
148
network model. Note the coupling coefficient has decreased from that reported in Table
V.1, primarily because the coupling is between pins ‘2’ and ‘4’, (with a ground in between),
rather than pins ‘2’ and ‘3’. Large series inductances (1.5 and 1.3nH) are coupled to each
other with k factors of 0.178. The shunt capacitances are on the order of 0.45 pF in total,
and coupling capacitances between leads is 0.02 pF.
The embedded microstrip line impedance of 46.5 Ω is close to the ideal 50 Ohm.
The microstrip line electrical length has increased from that constructed in the prototype
ECPWFG package of Figure V.22, due to: 1) the embedded microstrip line in the actual
SSOP is 120 mil, whereas the ECPWFG prototype package is 80 mil; 2) the effective
dielectric constant of the embedded microstrip line is greater than the prototype case, thus
reducing the guide wavelength.
0.23
0.2
1.5
0.23
Zo=46.5
1.5
0.2
4
5
0.18
0.02
EL=140
paddle
0.02
0.18
Zo=46.5
2
0.25
1.3
EL=140
0.23
1.3
7
0.25
0.23
Figure V.25: The SSOP8 Thru package equivalent circuit. Capacitance is in pF, inductance
in nH, impedance in Ω, and electrical length (EL) in degrees.
149
Figure V.26 illustrates the simulated and modeled response of the the equivalent circuit in Figure V.25. The return and insertion loss (S22 and S72, respectively) have good
agreement to roughly 8 GHz. The modeling of isolation could use some improvement,
since the isolation is overestimated by the model to 5 GHz, and underestimated above that.
More lumped elements would capture the fine structure and magnitude of of the isolation
curve at 2.5 GHz.
150
Figure V.26: Model vs simulated for SSOP8 with embedded microstrip line: a) return and
insertion loss; b) isolation. Light curve is simulated, solid curve is modeled.
151
V.4.2 ECPWFG Package Model with Isolation
In Figure V.27, an equivalent circuit model is given for the simulated ECPWFG package. Several significant changes are apparent when compared to the SSOP package model.
First, the small LC transitional elements have been retained from the prototype ECPWFG
Thru development. The electrical length and characteristic impedance of the ECPWFG
transmission line (between ports 2 and 7) are very close to 50 Ohm. Note the electrical
length is smaller than in the prototype case (Figure V.22), since the simulated package lead
frame had slightly shorter overall length (80 mil compared to 100 mil). Short (0.55 mm)
wirebonds were used instead of ribbon conductors as in the prototype case. This reduced
the inductance and also the parasitic shunt capacitance. Indeed, the shunt capacitance of
the ECPWFG path (ports 2 to 7) is a relatively small 0.01 pF. On the other hand, the capacitance is 0.4 pF for the half-ECPWFG transmission line lead frame (between ports 4
and 5), since the electric field is not traveling in a CPW-like mode and has more electrical field fringing capacitance. Also, the electrical length and characteristic impedance of
the half-CPW model is lager by a factor of
√
2 of the ECPWFG mode, since effectively
only half the capacitance per unit length is present. The electrical length and characteristic
impedance of the embedded microstrip line is close to 50 Ohm at 48.5 Ohm. The electrical
length is somewhat smaller than the prototype case (Figure V.22), since the paddle length
was increase to 20 mil (at the expense of the ECPWFG lead frame length).
A comparison between Figure V.26 and Figure V.28 shows a much cleaner RF circuit
response. The first resonance of the package has been translated in frequency to near 10
GHz, almost doubling that obtained from the SSOP8 plot.
152
0.014
0.015
4
0.02
Zo=72
0.39
Zo=51.8
EL=52
0.046
0.001
0.4
Zo=48.5
0.39
EL=105
0.17
2
0.01
0.4
EL=40
0.027
0.02
0.001
paddle
EL=105
0.01 0.001
0.17
0.39
0.015
0.02
5
0.027
Zo=51.8
0.01
0.001
Zo=72
EL=40
Zo=48.5
0.39
0.014
0.02
7
EL=52
0.01
0.046
Figure V.27: The ECPWFG Thru package equivalent circuit. Capacitance is in pF, inductance in nH, impedance in Ω, and electrical length (EL) in degrees.
153
Figure V.28: Model vs simulated for simulated ECPWFG with embedded microstrip line:
a) return and insertion loss; b) isolation. Light curve is simulated, solid curve is modeled.
154
The performance of the ECPWFG package is comparable to other attempts at package improvement for non-leaded packages. The ECPWFG package, which has been based
on the same body size as an SSOP8, is an order of magnitude greater in size than a FlipChip example developed by Jentzsch [18] but still has comparable return loss to 10 GHz.
Both BGA and MEM package response report less return loss [17, 113] than given here,
even though they are again much smaller in size. M enzel [19, 5] has done much work in
the mmW range, and these results compare remarkably well with his results up to 20 GHz.
155
V.5
Summary
This chapter discussed the π-network as a standard equivalent circuit of a leaded
package, also known as a constant-k filter. The impedance is frequency dependent and
therefore dispersive, causing the lead frame to be inherently low pass. Broadband transmission line performance for such a lead frame is impossible to achieve.
Contrasted with the constant-k filter is the distributed transmission line system, which
in our case is the ECPWFG. A distributed network can be matched to the transmission line
characteristic impedance of the PCB input. This is a broadband approach with the potential
for superior return and insertion loss.
Coupling between lead frame pins was also addressed. The traditional SSOP package
exhibits poor isolation because of relatively long parallel current carrying conductors of
the lead frame themselves and strong flux linkage between conductor loops. On the other
hand, the ECPWFG package shows better performance in this important metric, primarily
because the RF energy is traveling in tightly coupled even mode with the nearby grounds
of the ECPWFG.
An investigation into synthesis techniques to expand a model of a SSOP8 package to
Ku-band was completed. The measured performance of a shorted SSOP8 package included
three poles and three zeros from DC to 20 GHz. It was discovered the effort to accomplish
this makes it impractical for most applications.
Static solvers for use in developing package models were also investigated, and provide a circuit model to the first resonance, which for SO-type packages occurs at approximately 5 GHz. Beyond this frequency the model does not predict circuit behavior accurately.
Equivalent circuits for 69.6, 66.9, and 55.5 Ω ECPWFG Thru packages were devel-
156
oped, and good agreement to 12 GHz was obtained. Circuit elements developed for these
packages were used to model an equivalent circuit for an ECPWFG package with a embedded microstrip lines connecting input to output pins. This model included the PC board
to ECPWFG transition, the ECPWFG transmission line, the ECPWFG to embedded microstrip line parasitics, and the embedded microstrip line model. The agreement is good to
10 GHz, and demonstrates the superior microwave performance of the ECPWFG package.
The next chapter will address some manufacturing and corner sensitivity issues of
the ECPWFG package. Variations in dielectric constant and lead frame pitch affect the
ECPWFG transmission line impedance, which ultimately affect the return and insertion
loss, and isolation. A Design of Experiments (DOE) technique will be used to determine
these sensitivities.
Chapter VI
Discussion
VI.1
Overview
The previous chapters have described the RF performance advantages of ECPWFG
lead frames over more traditional lead frame structures found in SO-type plastic packages.
These comparisons are based on measurement and electromagnetic simulation of nominal
prototype packages.
This chapter will address some aspects of the application of the new package. Not the
least of these is manufacturing for high yield. Design of Experiment (DOE) techniques will
be used to determine the sensitivity of the package to variations in material and geometric
variation.
The printed circuit board (PCB) layout of the package is also important, since two or
four leads are needed as dedicated RF grounds. In addition, some aspects of the mechanical
performance of the package are briefly examined, as are cost information and estimates.
VI.2
ECPWFG Package DOE
Equation II.24 has been shown to provide an accurate design guideline in predicting
the characteristic impedance of ECPWFG packages. However, all manufacturing involves
fabrication tolerances of the material properties and geometry. Until now we have used
nominal parameters for the conductivity of the leads, the dielectric properties of the plastic,
157
158
the lead width, thickness, and spacing. We now turn to an examination of how tolerant or
‘robust’ the ECPWFG package is with respect to variations in material and manufacturing
tolerances. The method chosen to accomplish this is statistically based with a DOE.
DOE analysis has been used for research and process enhancement for many years
[114]. All processes exhibit statistical variation among its member population. By changing the manufacturing input variables in a sequence of controlled experiments, the relative
statistical dependencies of the variables on performance can be determined. In the case of
ECPWFG packages, these variables can be separated into two groups, one that is material property based and the other is geometry based i.e. the widths, lengths, and height of
package objects. Figure VI.1 illustrates the variables chosen to quantify in the ECPWFG
package.
wirebonds varied
0.8mm +/- 25%
dielectric constant
varied +/- 10%
lead spacings
varied +/- 10%
Figure VI.1: Main variables for DOE.
One of the most sensitive material property for good RF performance is the encapsulant dielectric constant, since this variable directly affects the characteristic impedance
159
of the ECPWFG transmission line and ultimately the return loss. Variation in this parameter will also affect the isolation between leads, since the electric field ‘tightness’ to the
transmission system is dependant on the dielectric constant of the medium.
Another aspect of encapsulant is the variability in manufactured material properties,
since the material constituent ratios can vary between suppliers (this is discussed in Chapter
III). Therefore, a dielectric constant of 2.8 +/- 0.28 (10 % variation) will be used in the DOE
to estimate its importance to package RF performance.
Two geometric properties will be involved in the DOE. This first is the spacing tolerance of the lead frame. Again, this was chosen as a DOE variable since variation in this
parameter affects the characteristic impedance of the ECPWFG lead frame, and the isolation between leads. The spacing between leads will be allowed to vary 7.5 +/- 0.75 mil (10
% variation).
The second geometric variable is the wire bond length. This parameter has a direct
correlation to the insertion and return loss of the package, since the wire bond inductance is
in series with the ECPWFG transmission line. Variations in wire bond length also have an
effect on loop height, which directly affects the isolation performance between leads. The
wire bond length was 0.8 +/- 0.2 mm (25 %). Figure VI.2 shows the wire bond variations.
The Box-Behnken DOE method [114, 115] was chosen to quantify the relative dependencies of the input variables, since fewer trials are required to investigate a variation
space. The thirteen variations were executed in HF SS, using the methodology discussed
in Chapter IV, to determine the dependance of insertion loss, return loss, and isolation from
1 GHz and 16 GHz. Figure VI.3 illustrates the variation space.
The results of the thirteen trials are plotted in Figure VI.4. Figure VI.4a is the insertion loss variation between the thirteen packages. Very little deviation is observed to
160
8 mil
8 mil
5 mil
2.5 mil
microstrip
23.4 mil
19.2 mil
substrate
13.8 mil
paddle
ECPWFG line
Figure VI.2: Package wire bond variations. The horizontal segment was kept a constant 8
mil.
10 GHz, with the exception of the case r =2.52, S=6.6 mil, lwb =0.8 mm. This trial is also
conspicuous in the return loss plot of Figure VI.4b, exhibiting almost 10 dB return loss at 6
GHz. The other twelve trials have relatively lower return loss, but still show wide variation,
confirming that the three variables selected in the DOE would have a significant impact in
return loss.
Figure VI.4c is a plot of the isolation between neighboring pins. As in the insertion
loss plot, very little variation is observed to 10 GHz, meaning the three variables selected
in the DOE do not show significant impact in isolation.
161
wirebonds varied
0.8mm +/- 25%
dielectric constant
varied +/- 10%
lead spacings
varied +/- 10%
Figure VI.3: Box-Behnken variations. The dots represent the thirteen trials.
162
Figure VI.4: Thirteen DOE trial results: a) insertion loss; b) return loss; c) isolation.
163
Figure VI.5 is a magnified view of the return loss plot. The nominal case for this DOE
is given in the thicker line somewhat in the middle of the curves. By selecting the worst
return loss in the 1 to 10 GHz range, the relative dependence of the three DOE variables
and their interactions on return loss can be obtained. This is a regression technique more
fully described in [114]. Table VI.1 summarizes the DOE results.
Figure VI.5: Package variation performance for return loss.
One can see that Trial 11 is the worst performing package of Figure VI.5. It was
somewhat of a surprise that the nominal case (Trial 13) was not the best performing package
(20.6 dB maximum return loss) - Trial 10 had the slightly better maximum return loss
(23 dB) over the bandwidth. This implied the nominal design was not ‘centered’, and
subsequent investigations showed the best performing package is between Trial 13 and
10. It should be noted that the return loss is also dependent on such factors as PCB pad
capacitance, embedded microstrip line impedance, and a host of other variables. To truly
design center an ECPWFG package - or any package design for that matter - a DOE should
164
Table VI.1: ECPWFG DOE Variations and Return Loss Results
A
B
C
AB BC AC
a
b
c
Trial r
S
lwb
RL
(mil) (mil)
(dB)
1
0
+
+
0
0 13.9
2
0
0
0 16.2
3
0
+
0
+
0 19.5
4
0
+
0
+
0 19.5
5
+
0
+
0
0
17.7
6
0
0
0
20.2
7
+
0
0
0
+ 18.0
8
0
+
0
0
+ 13.9
9
+
+
0
0
0 19.7
10
0
0
0 23.0
11
+
0
+
0
0 11.5
12
+
0
+
0
0 16.7
13
0
0
0
0
0
0 20.6
r +/- 10 %
Spacings +/- 10 %
c
Wirebond length +/- 25 %
a
b
be performed on the final application geometry.
Simple regression techniques can be use to determine dependencies of DOE variables
on performance, also called ‘effect’ [116]. Mathematically, this can be written:
ef f ect =
hX
(+) −
X
i
(−) ÷ N
(VI.1)
Using values from Table VI.1, we can write:
A=
hX
#5, 7, 9, 11 −
X
i
#6, 8, 10, 12 ÷ 4 = −1.725
(VI.2)
Table VI.2 is obtained by continuing the regression throughout Table VI.1. Note
that interactions AB, BC, AC are obtained by XOR operator on the appropriate A, B, C
columns. In the Box-Behnken DOE method, there is no interaction between all three vari-
165
ables (ABC).
Table VI.2: DOE Regression Results
DOE Variable effect
A
-1.725
B
-0.100
C
-2.225
AB
-7.250
BC
4.450
AC
-3.000
Ignoring the sign of the effects for the moment, the relative effect of A (variations
in dielectric constant) are relatively more significant that B (variations in lead spacings),
but not as significant as changes in wire bond length (C). The interaction AB has the most
impact on return loss - this is not surprising since changing the dielectric constant and lead
spacing directly affect the ECPWFG characteristic impedance. The return loss dependence
on changes of lead spacing and wire bond length are relatively not as significant as AB. The
interaction of dielectric constant and wire bond length has the least effect of return loss of
the interaction cases, but still stronger than the main variable interactions.
These effects (divided by 2) equate to the slope of a line in a return loss plot against
the DOE variables (r , S, lwb ). Note the effects of A, B, and C by themselves have negative
slope, implying the return loss gets worse (lower) with increasing variable magnitude.
One can see the slope of the return loss performance is less than unity (-0.8625) for
the main variable A (dielectric constant). This is expected since Equation II.25, the design
equation for characteristic impedance of ECPWFG structures, has an inverse square root
dependance on dielectric constant (to first order).
The slope of the dependance on main variable B (spacings) is near zero (-0.05),
implying over the +/- 10 % range of the DOE, return loss is almost constant with changes
in lead spacing. This is implied in Equation II.25 (to first order), since most of the same
166
partial capacitances appear in the numerator and denominator, thus cancelling each other
for small variations in lead spacing.
The C main variable (wire bond length) has a slope of -1.1125 which is almost unity.
If we equate wire bond length to series inductance directly, the impedance increases linearly
with frequency. To first order, this scales the input impedance of the ECPWFG package
linearly, and ultimately the return loss according to the equation
Zwb − Zo RL = 20 log Zwb + Zo
(VI.3)
since Zwb (wire bond impedance) is much smaller than and Zo (the input transmission line
impedance) at lower frequencies.
In conclusion, DOE techniques are powerful tools that can be used to gain greater
insight into a design. They can be applied to design center the performance, or analyze the
inter-dependencies of variables. The next sections briefly address other topics in the final
application of the ECPWFG package, such as mechanical robustness, cost, and pinout.
VI.3
ECPWFG Package Reliability
Mechanical testing and thermal cycling are important aspects of robust package design. The emphasis in this research has been the electrical performance at room temperature
with a qualitative concern of temperature and mechanical effects.
The prototype ECPWFG package was constructed with copper leads and Smoothcast 321 as the potting material. Plastic SO-type packages are usually constructed with a
Sumitomo plastic and a lead frame made of an alloy of tin, lead and nickel. Smoothcast
321 is softer and more ductile than Sumitomo plastic - any serious testing of the prototype
packages in these areas would only draw dubious conclusions, since the final production
167
package would be constructed with high volume encapsulants and lead frame materials.
However, the ECPWFG prototype packages where manually handled and underwent several solder/de-solder cycles mounting them on the test boards. No physical damage to the
lead frame or enapsulant was noticed in this work. Since the lead frames are quite similar in
construction and in the depth of embedding of the anchor points (the ‘hooks’ in the SSOP
case; the lead frame bends in the ECPWFG package case), major mechanical failures are
not expected.
VI.4
ECPWFG Package Cost Estimates
The emphasis of this research has been to improve leaded package performance in the
body size of the SSOP package. Cost estimates can be broken down into two components.
First, the amount and type of material required for constructing the package and secondly,
the cost of manufacture.
The lead frames of an SSOP and ECPWFG package can be made of the same conductor and they have roughly equivalent volumes. Cost increases due to lead frame material
are not expected. On the other hand, the amount of encapsulant in the ECPWFG package
has increase roughly 20 %. Plastics are relatively cheap (compared to ceramics, for example) and this increase in material volume is expected to have a negligible increase to the
overall material cost.
The manufacturability of the two packages is virtually the same. In the ECPWFG
case, four of the leads are connected directly to the paddle, and four are floating (embedded) in the encapsulant. In the traditional SO-type packages, all the leads are floating
(embedded) in the plastic. The same assembly procedure can be applied in the two packages.
168
In volume production, leaded packages cost roughly a half to one cent per lead [117]
- this rough estimate of cost is excepted to also apply to the ECPWFG package. A manufacturer would only need to invest in re-configuring the lead frame stamping to ECPWFG
outline.
VI.5
ECPWFG Package Pinout
Another matter in applying this package is the pin assignments. In order to gain
the benefit of the ECPWFG transmission line, the pins of the ECPWFG package must
be in a GSG configuration. Figure VI.6 shows possible pin assignments for 8 and 10 pin
packages. Pins labelled V1 through V5 can be considered usable for bias or voltage control.
For packages with ten pins or more, only three pins are necessary for clean ECPWFG
transmission whereas in the 8 pin case, four are necessary.
V1
V2
G
G
RFin
G
RFout
G
a)
G
V5
V4
RFout
G
V3
V2
RFin
G
V1
b)
Figure VI.6: Pin assignments for: a) 8-pin package; b) 10-pin package.
169
VI.6
Summary
This chapter has addressed some fundamental issues concerning ECPWFG applications. Using Design of Experiments (DOE) techniques, a thirteen trial experiment was
conducted using three-dimensional electromagnetic simulation software (HF SS). The dielectric constant varied 2.8 +/- 10 %, lead frame spacing (pitch) varied 7.5 mil +/- 10 %,
and wire bond length 0.8 mm +/- 25 %. It has been shown the effects of dielectric and
lead frame pitch tolerance on the insertion loss and isolation performance of an ECPWFG
package are minimal. The return loss shows significant variation at the corners of the experiment, with return loss between 11.5 dB (worse case) to 23 dB (best case) between 1
GHz to 10 GHz. For small variations in the manufacturing process, say 5 % in dielectric
constant and lead frame pitch, the design is expected to have less than a few dB of variation
in return loss to 10 GHz. The DOE exercise also showed the nominal design is not optimal
- a small change in dielectric constant and lead frame pitch would ‘center’ the design.
Mechanical robustness of the design is also important, but little research effort was
dedicated to this topic since the production packages would have different encapsulant and
lead frame conductor.
Cost estimates for the new package would be roughly the same as typical SO-type
packages. It is expected only NRE (Non-return engineering) costs would be required to
re-tool an assembly line into the new lead frame configuration.
The pins of an ECPWFG package must have a GSG configuration in order to properly
control the ECPWFG impedance. In an eight pin package, four pins are necessary for
grounds resulting in a GSG configuration for RF in and RF out on either side of the package.
In a ten pin package, only three grounds are necessary, since both RF in and RF out can be
located on the same side of the package.
Chapter VII
Conclusion
Plastic packages are a low cost method used to house an electronic device. They
provide environmental protection, mechanical rigidity, and electrical connectivity. RFICs
have used SO type leaded plastic packages for many years in a variety of low frequency
applications.
A plethora of research literature has been dedicated to the successful modeling of
plastic leaded packages up to the limit of their application bandwidth of about 5 GHz.
Package application bandwidth is defined as having greater than 20 dB return loss and pinto-pin isolation, and less than 1 dB insertion loss. The circuit model is usually coupled
LC π-networks. However, since their commercial introduction several decades ago, little
research has been dedicated to the improvement of the RF performance of leaded SO-type
packages.
This thesis has presented a method to increase the application bandwidth of leaded
SO packages to X-band and beyond. With minor changes to existing SO lead frame structures, a variant of the CPW transmission line can be constructed. We have concentrated our
effort on the Shrink Small Outline Package 8-pin (SSOP8) as a proof of concept example.
These changes are two fold: 1) The mechanical hooks embedded in the encapsulant of traditional SSOP8 have been removed, thus creating a constant lead frame cross-section from
the PC board to paddle, and 2) the encapsulant has been extended to include the gull-wing
bends in the leads, providing mechanical rigidity and a contiguous ECPWFG transmission
170
171
cross-section from the PC board to paddle. This new package variant is referred to as Embedded CoPlanar Waveguide with Finite Ground (ECPWFG) package. A unique solution
for the characteristic impedance and effective dielectric constant has been developed for
this new lead frame cross-section.
The accuracy of the expression for the characteristic impedance of an ECPWFG
package lead frame has been verified in several ways. First, existing research literature describing CPW-like measured data and results were compared to the equations. The results
proved the expression converged for asymptotic values of CPW cases. Secondly, prototype
packages were build and measured using a custom Thru-Reflect-Line (TRL) calibration kit
developed in this work. The results showed excellent agreement in return and insertion loss
to above 10 GHz. Third, meticulous electromagnetic (EM) simulations were preformed on
ECPWFG packages and compared to measured data. Excellent agreement in return loss,
insertion loss, and isolation was observed to above 10 GHz.
It was found that the application bandwidth for SO-type packages could be increased
from roughly 5 GHz in the traditional SSOP8 case to 10 GHz in the ECPWFG case. Further
simulations show by shrinking the size of the ECPWFG package to Miniture Small Outline
Package (MSOP) dimensions, the package could be used effectively to 15 GHz.
In the process of developing the package model, a unique method to measure the
dielectric constant and loss tangent of plastic encapsulant was developed. This involved
filling an X-band waveguide cavity with ecapsulant and measuring the input Scattering parameter response. The measured data was then correlated to full wave three dimensional
electromagnetic simulations using Ansoft HF SS. The material properties of the simulation material were iteratively changed until a match at a specific resonance occurred.
Several approaches to equivalent circuit modeling of lead packages were investigated.
172
These methods can be broken down into three broad classes: circuit synthesis, static simulations, and analytic approximations. Each has unique advantages and disadvantages. Circuit
synthesis techniques are by far the most labor intensive, but yield the best broadband solution to 20 GHz. However, frequency dependent elements are not attainable directly, and the
resulting equivalent circuit may not correspond in a meaningful physical way to the package structure. Static simulators such as Ansoft Spicelink provide lumped circuit element
values based on an assumed circuit topology. This method has good accuracy to the first
pole, which for SO type packages occurs at approximately 5 GHz. The last method implements known good analytic solutions for the transmission lines and RLC components. It is
also the fastest modeling method, but the least flexible since the number of variables must
be simplified. The analytic method works best for well defined, electrically small geometries. In modeling the ECPWFG packages, a hybrid approach of full-wave EM simulations
and analytic modeling produced a high fidelity circuit model for the ECPWFG package.
An effort was made to understand the robustness of the RF performance of the ECPWFG package with variations in dielectric constant, lead pitch, and wirebond length. A
Design of Experiments (DOE) analysis showed that the return loss is most sensitive parameter, while insertion loss and isolation are less sensitive. It is estimated that changes of +/5 % in dielectric constant and lead pitch would result in less than 3 dB swing in return loss,
while still maintaining greater than 20 dB return loss to 10 GHz.
Appendix A
Calibration
A.1
Measurement Error Correction
A.1.1 Background
To obtain the most accurate S-parameter measurements of a device, the errors caused
by the fixturing must be removed [118]. These errors include systematic, random and
drift errors. Random and drift errors are changes in the measurement system that are not
repeatable and cannot be corrected. Systematic errors are repeatable and can be effectively
removed.
Systematic errors consist of mismatch and leakage of the test setup, the finite isolation between reference and signal paths, and the system frequency response. These uncertainties can be correlated to signal directivity, source match, load match, isolation, and
frequency response. These errors can be quantified and removed with a well designed
calibration kit.
In a two-port Vector Network Analyzer (VNA), twelve error terms fully define the
test system permutations that corrupt the DUT response [119]. Figure A.1 illustrates the
signal paths for the actual DUT response and error signals.
A calibration kit consists of well defined physical standards, such as transmission
lines, short, and open circuits. Corrections to these standards are necessary to account for
non-ideal responses of real-world circuits. An example is a 50 Ω resistor having a small but
173
174
Exf
Etf
S21
Edf
S11
Esf
S22
Elf
Forward
S12
Erf
Exr
S12
Etr
Elr
S11
S22
Edr
Esr
Reverse
S21
Edf, Edr - Directivity
Etf, Etr - Trans. Tracking
Esf, Esr - Source Match
Exf, Exr - Isolation
Erf, Err - Refl. Tracking
Err
f=forward, r=reverse
Elf, Elr - Load Match
After [125].
Figure A.1: S-parameter error terms.
significant signal delay. This delay past the calibration plane is known as “Offset Delay”.
A.1.2 TRL Calibration Kit
Two common calibration methods were considered for development into a calibration kit. In general, the TOSL method for low frequencies because of the difficulty in
constructing a broad band 50 Ohm load. A good example of this method was published by
[75] which used a Thru-Open-Short-Load (TOSL) calibration method for leaded package
measurements using wafer probes. The calibration kit was applicable to 4 GHz.
The Thru-Reflect-Line (TRL) method is mostly used above a few GHz, because the
line lengths required at lower frequencies become unrealistically long [120, 121]. In addition, only three well defined standards are needed: Thru, Reflect, and Line. To extend
the useful measurement frequency range to 20 GHz, extra Line standards are needed. The
175
calibration kit developed for the ECPWFG packages had three extra Line standards for five
standards in total.
The easiest transmission medium to work with is microstrip. Although the microstrip
medium is slightly dispersive, it is well understood and predictable [2]. An advantage of
microstrip is that components can be soldered on the top layer.
Constrains are necessary in the construction of TRL calibration kits [122]. The Reflect standard must have a reflection coefficient Γ magnitude optimally 1.0 and phase defined within +/− 1/4 λ. Since it is easier to construct a good short than an open in microstrip [123], a short standard was used for the Reflect standard. The Thru standard has
zero electrical length, meaning the calibrated reference plane is located at the center. The
Line standard then establishes the reference impedance during calibration and is in the ideal
case the same as the system impedance of 50 Ω.
For optimal error correction, the Line standard electrical length (EL) should not be
near 0◦ or 180◦ and is recommended to keep the electrical length between 20◦ and 160◦ .
The electrical length can be determined by accurate knowledge of the physical dimensions
of the microstrip line and the dielectric permittivity.
In TRL calibration, measurement uncertainties and ripple are caused by inaccuracies
in determining the characteristic impedance of the microstrip lines. For instance, if the
characteristic impedance of the Line standard is determined to have an impedance of 50 +/0.5 Ω, this results in a measured return loss (RL) error at 20 dB of +/- 1 dB. The uncertainty
increases with greater RL; at 30 dB, the error is +/-3 dB.
Another cause of RL ripple is the uncertainty in determining the electrical length of
the Lines. This is directly related to the effective dielectric constant of the microstrip line,
which is known to have slight dispersion characteristics. Also, error in determining the
176
characteristic impedance causes uncertainty in effective dielectric constant determination.
The EL is given by
EL =
λg
360◦
λo
where λg is the guide wavelength and λo is the freespace wavelength. The guide wavelength
can be calculated by
λg =
c
ef f f
where c = 2.99798 × 108 m/s and f is the frequency of interest. There is a slight change
in ef f over frequency due to the dispersive nature of microstrip lines [124]. [66] provides
an analytic equation that has frequency dependence. For this calibration kit, [2] provides a
simple and accurate expression:
ef f =
r + 1 r − 1
1
q
+
2
2
1 + 12d/W
where d is the dielectric height and W is the microstrip width.
Microstrip transmission lines were manufactured on Rogers 4350 material with nominal 10 mil thickness and 21.5 mil line width. RG4350 has a published r of 3.48 at 10 GHz.
The ef f was calculated at 500 MHz to be 2.560 while at 15 GHz ef f was 2.594. It was
also found that the characteristic impedance of the fabricated boards was near 48.5 Ω due
to the line widths manufactured to 20.8 mil after the construction process and the extra
thickness of the conductor. This impedance was verified with electromagnetic simulations
of the three dimensional structure.
Figure A.2 is a picture of the constructed microstrip line. The white band is the
substrate material 10 mil thick. The microstrip metal is on the top and ground plane on the
bottom. Detailed measurements reveal the microstrip line is embedded in the substrate
177
Figure A.2: Microstrip cross-section. The white area is RG4350 dielectric.
0.2 mil and has a thickness of approximately 4 mil. These two geometric factors increase
the transmission line capacitance thus lowering the characteristic impedance of the transmission system.
This divergence from the ideal 50 Ω characteristic impedance can be implemented
into the calibration kit definition as 48.5 Ω, to force the error correction software in the
VNA correct for non-50 Ω environment. After error correction is applied, the system Z o of
50 Ω is renormalized into the S parameter data.
Using the above values, a table can be made that summarizes the VNA corrections
needed [125]. Table A.1 is a simplified version of similar tables produced in commercially
available calibration kits.
Table A.1: Standard Corrections for Custom TRL Calibration Kit
Standard
Offset
Frequency (GHz)
Delay (ps) Zo (Ω) min
max
Reflect
0
48.5
0.5
20
Thru
0
48.5
0.5
20
Line 1
90.6
48.5
0.5
5.3
Line 2
35.8
48.5 5.29
7
Line 3
16.5
48.5 6.99
20
178
It was found that the calibration kit could be built with a minimum of two Line
standards, but a third was added to improve the frequency response at the cross-over points
of 5.3 GHz and 7 GHz. Figure A.3 is an outline drawing of the calibration, verification and
test boards.
LINE 1
1270
LINE 2
870
LINE 3
730
THRU
Test
610
315
REFLECT (SHORT)
305
Beatty
335
1000
335
Thru
1070
Open
400
Figure A.3: Calibration standards, verification standards, and test board layout.
179
Figure A.4 is an image of the fixture that the PC boards of the calibration kit are
inserted for measurment. Coaxial lines from the VNA are connected to the APC-3.5 mm
launches. The test coupons are inserted and coupled to the coaxial cables with coaxial-tomicrostrip launches.
Figure A.4: Test fixture with calibration kit substrate inserted.
180
A.1.3 TRL Calibration Results
The calibration kit performance was verified with three standards: Thru, Open, and
Bedde. The combination of these standards covers most of the Smith chart [126] [127].
The Thru standard is a 660 mil length of microstrip line with the same impedance as the
TRL lines. This covers the Smith chart area closest to the center. The Open standard is a
95 mil length of microstrip line with the end open. This impedance covers the outside edge
of the Smith chart. The Bedde standard is a 35 mil length of 48.5 Ω microstrip line, a step
discontinuity to a 1000 mil length of 80 mil width length of line (20 Ω), then reduced again
through another step discontinuity to a 35 mil length of 48.5 Ω microstrip line. The Bedde
standard is quarter-wavelength at 1.5 GHz and covers Smith chart areas between the Thru
and Open response.
These verification standards are compared to three dimensional simulations using
Ansoft High F requency Structure Simulator (HFSS). Although careful measurements
are taken and implemented into the simulator, simplifications exist in drawing the geometries and defining the material properties. Fro example, conductors are drawn with smooth
surfaces which neglect the losses from surface roughness. The published relative permittivity of 3.48 for the substrate material was left constant over the entire frequency range.
The simulator itself has limitations on accuracy that correlates directly to the amount
of Finite Element Method (FEM) meshing. HFSS has an algorithm that refines the mesh
with Adaptive Passes and calculates the worse S-parameter error at the ports from the previous pass to the current one. With ten adaptive passes, the maximum ∆S was approximately
0.010, which means the percent change in the maximum S-parameter error is less than 1 %
from pass nine to pass ten. The expected simulation error is then less than 40 dB.
Although limited by ideal geometry and accuracy of geometric and electrical ma-
181
terial properties, the HFSS simulation methodology is a reasonably objective test of the
measurement accuracy of the verification standards.
Thru Standard
Figure A.5 illustrates the agreement of the Thru line between measured and simulated. Note that both simulation and measurement systems are dealing with 48.5 Ω microstrip lines in a 50 Ω environment, therefore the RL is not expected to be infinite. The
S11 simulation ripple dips are remarkably similar to the measured response. The magnitude is less accurate, with the greatest difference at 1.5 and 5 GHz. In The S21 simulation
and measured response follow the same trend, but slowly diverge to 0.15 dB difference at
20 GHz. The measured data shows minor noise ripple across the whole bandwidth that
increases at higher frequencies.
182
Figure A.5: Simulated and measured response for Thru standard.
183
Open Standard
In Figure A.6 the Open standard response Γ is plotted on a Smith chart. The agreement is outstanding across the whole bandwidth. Markers have been included and display
the magnitude and phase agreement at 15 GHz. The phase delta is 1.3 ◦ . The magnitude
delta is somewhat larger, but still within 3 %.
Figure A.6: S11 simulated and measured data for Open verification standard.
184
Bedde Standard
The Bedde standard S11 response versus simulated is illustrated in Figure A.7. The
S11 simulation ripple dips and curve in general are remarkably similar to the measured
response. The choppy nature of the HFSS data is due to the coarse simulation frequency
points. The S21 simulation and measured response track each other and the show excellent
agreement over the measurement bandwidth.
With the results of the verification study, the TRL calibration kit is deemed accurate
to at least 25 dB. But is it superior to the Wiltron fixture of Figure A.4 without calibration?
The next section will answer this question.
185
Figure A.7: Simulated and measured response for Bedde standard.
186
TRL-TOSL Comparison
A TOSL cable calibration at the input to the Anritsu fixture of Figure A.4 was completed. Time-domain measurement was used to find the delay from the calibration plane to
the coaxial-to-microstrip transitions. It was found to be 72 ps, which was dialed into the
port extension menu on the VNA. This is a crude method used to move the measurement
plane to an arbitrary location and assumes a lossless, perfect phase shift. A 660 mil microstrip line was placed into the fixture. This corresponds to the line length of the Thru
verification standard using TRL calibration.
In Figure , the RL is superior for most of the measurement bandwidth [128] using
the custom TRL kit. The low frequency divergence could be improved in the TRL kit with
a Match standard defined from 500 MHz to 1 GHz. Another solution is to have a longer
Line1 length.
Figure A.8: S11 TRL and TOSL measured response with Thru standard.
187
A.2
ICM TRL Calibration Kit
A commercial TRL calibration kit was purchased from Inter-Continental Microwave
(ICM) and used for the shorted SSOP package described in Chapter III. The ICM ThruReflect-Line calibration standards used are those illustrated in Figure A.9. The standards
are arranged from left to right as: Thru, Reflect, Line 1, Line 2, Match. These standards
are placed into the fixture of Figure III.2 one at a time and measurements are performed on
each individually.
Figure A.9: ICM calibration standards.
The internal software performs mathematical corrections to the standards as described in Section A.1 with data similar to Table A.1.
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