Differential Amplifiers
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•
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1
Each circuit has two inputs, outputs.
Desired signal is differential input:
v1-v2.
Differential-mode (DM) output
voltage is the voltage difference
between collectors, drains of the two
transistors.
Common-mode (CM) output is
average of two outputs
Ground-referenced outputs can also
be taken (Single-ended)
Transistors should be perfectly
matched ideally
Bipolar Differential Amplifiers: DC
Analysis
If transistors are matched, terminal
currents are also equal.
Both inputs are set to zero,
emitters are connected together.
2
Small-Signal Transfer Characteristic
•Large-signal transfer characteristic of differential pair:
iOD = iC1
iC2 = 2IC
evID /2UT e
evID /2UT + e
vID /2UT
= 2IC tanh (vID /2UT )
vID /2UT
•Taylor Expansion:
1
•Transconductance of differential pair:
d(iOD )
Gm =
= IC /UT = gm
d(vOD )
•Differential operation costs 2x power
3
iOD/2IC
0.5
0
−0.5
Slope = gm
−1
−5
−4
−3
−2
−1
0
1
vID/2UT
2
3
4
5
Small-Signal Transfer Characteristic
•Large-signal transfer characteristic of differential pair:
iO,D = iC1
iC2 = 2IC tanh
•Taylor "series expansion:
= 2IC
✓
viD
2UT
◆
1
3
✓
viD
2UT
✓
vBE1 vBE2
2UT
◆3
+
2
15
✓
◆
viD
2UT
= 2IC tanh
◆5
17
315
✓
✓
viD
UT
viD
2UT
◆
◆7 #
•Even-order distortion terms are eliminated, increasing signal-handling
capability
•For linear operation, 1st term must dominate. Set 3rd-order term to be
1/10 the linear term.
vid
⇤
2VT 0.3 ⇥ vid
4
27mV
Bipolar Differential Amplifiers: DC
Analysis (Example)
•
•
Problem: Find Q-points of transistors in the differential amplifier.
Given data: VCC=VEE=15 V, REE=RC=75kΩ, βF =100, VBE=0.7 V
•
Analysis:
Due to symmetry, both
transistors are biased at Qpoint (94.4 µA, 8.62V)
5
Bipolar Differential Amplifiers: AC
Analysis
•
•
Break signal into differential-mode and
common-mode components
Symmetry will allow analysis simplification
6
Bipolar Differential Amplifiers: AC
Analysis
•Conversion between CM & DM denoted by
different types of gain:
•Add = differential-mode gain = vod/vid
•Acd = common-mode to differential-mode
conversion gain = vod/vic
•Acc = common-mode gain = voc/vic
•Adc = differential mode to common-mode
conversion gain = voc/vid
•For ideal symmetrical amplifier, Acd = Adc = 0.
•Purely differential-mode input gives purely
differential-mode output and vice versa.
7
Input Resistance: CM vs DM
Common-mode
Differential
VDD
RC
VDD
RC
vO-
RC
vO+
RC
vO-
vI+
vI-
REE
vO+
v
I+
REE
_
+
riC
v
I-
+
_
• Resistance seen by a single hypothetical source
drivinng either a differential or common signal
riD
Bipolar Differential Amplifiers: Differential-mode
Gain and Input Resistance
( gm + g# )( v + v ) = G ve
EE
3 4
"ve(G + 2 g# + 2 gm ) = 0 ! ve = 0
EE
-
Emitter node in differential amplifier is virtual
ground for differential-mode input signals.
Output signal voltages (ignoring ro) are:
9
Bipolar Differential Amplifiers: Differential-mode
Gain and Input Resistance (cont.)
Differential-mode gain for balanced output,
is:
If either vc1 or vc2 is used alone as output, output is said to be single-ended.
vc1
vc2
gm RC Add
gm RC
Add
A =
=!
=
A =
=
=!
d1 v
d2
vid
2
2
2
2
id v =0
v
=0
ic
ic
Differential-mode input resistance is small-signal resistance presented to
differential-mode input voltage between the two transistor bases.
If vid =0,
.
For single-ended outputs, Rout ≅ RC
10
€
Bipolar Differential Amplifiers: Commonmode Gain and Input Resistance
Symmetry→ terminal currents and collector voltages
are equal.
Similar to C-E (or C-S) amplifier with large emitter
(or source) resistor.
Output voltages are:
ve = 2(βo +1)i R
b EE
2(β o +1)R
EE v ≅ v
=
ic ic
rπ + 2(β o +1)R
EE
€
11
Bipolar Differential Amplifiers: Common-mode
Gain and Input Resistance (cont.)
•Common-mode gain is given by:
voc
!o RC
gm RC
R
V
A =
=!
=!
"! C " C
cc v
2REE 2VEE
ic v =0 r" +2(!o +1)REE 1+2gm (1+1/ !o )REE
id
•Symmetrical power supplies, ACM =0.5.
•Acc is 0 if REE =∞ because ro of transistors are
neglected.
•A more accurate expression is:
•Therefore, common-mode conversion gain ACD = 0.
•Assuming perfect matching
•Input resistance:
12
Common-Mode Rejection ratio (CMRR)
•
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Represents ability of amplifier to amplify desired differential-mode input
signal and reject undesired common-mode input signal.
For differential output, common-mode gain of balanced amplifier is zero,
CMRR is infinite. For single-ended output,
For infinite REE , CMRR is limited by βoµf . If term containing REE is
dominant
Thus for differential pair biased by resistor REE , CMRR is limited by
available negative power supply.
• Due to mismatches,
,
gives fractional
•
mismatch between small-signal device parameters in the two arms of
differential pair. Hence gmREE product is maximized.
13
CMRR Budget Example
• Track how CM noise corrupts signal
• CMRR definition depends on output
vCM = 10mV (noise)
vDM = 10µV (signal)
vIn
+
+
-
-
ADD = 46 dB
ACD = -20 dB
ACC = 0 dB
ADC = -20 dB
(CMRR = 66 dB)
vOut
ADC
ADD = 26 dB
ACD = -20 dB
ACC = 0 dB
ADC = -20 dB
(CMRR = 26 dB)
http://commons.wikimedia.org/wiki/File:EEG_cap.jpg
CMRR Budget Example
• Track how CM noise corrupts signal
vcmACC
vCM = 10mV (noise)
vDM = 10µV (signal)
vIn
vCM = 10mV+ 1µV
vDM = 2mV+1mV
+
+
-
-
ADD = 46 dB
ACD = -20 dB
ACC = 0 dB
ADC = -20 dB
(CMRR = 66 dB)
vOutvdmADC
ADC
ADD = 26 dB
ACD = -20 dB
ACC = 0 dB
ADC = -20 dB
(CMRR = 26 dB)
http://commons.wikimedia.org/wiki/File:EEG_cap.jpg
CMRR Budget Example
• Track how CM noise corrupts signal
vCM = 10mV (noise)
vDM = 10µV (signal)
vIn
vCM = 10mV+ 1µV
vDM = 2mV+1mV
+
+
-
-
ADD = 46 dB
ACD = -20 dB
ACC = 0 dB
ADC = -20 dB
(CMRR = 66 dB)
vdmADD
vOut
vcmACD
ADC
ADD = 26 dB
ACD = -20 dB
ACC = 0 dB
ADC = -20 dB
(CMRR = 26 dB)
http://commons.wikimedia.org/wiki/File:EEG_cap.jpg
CMRR Budget Example
• Track how CM noise corrupts signal
vCM = 10mV (noise)
vDM = 10µV (signal)
vIn
vCM = 10mV+ 1µV
vDM = 2mV+1mV
+
+
-
-
ADD = 46 dB
ACD = -20 dB
ACC = 0 dB
ADC = -20 dB
(CMRR = 66 dB)
vdmADD/2
v = 20mV+10mV+
10mV+.5mV+.3mV
vOut
ADC
vcmACC
ADD = 26 dB
ACD = -20 dB
ACC = 0 dB
ADC = -20 dB
(CMRR = 26 dB)
http://commons.wikimedia.org/wiki/File:EEG_cap.jpg
CMRR Budget Example
• Track how CM noise corrupts signal
vCM = 10mV (noise)
vDM = 10µV (signal)
vIn
vCM = 10mV+ 1µV
vDM = 2mV+1mV
+
+
-
-
ADD = 46 dB
ACD = -20 dB
ACC = 0 dB
ADC = -20 dB
(CMRR = 66 dB)
v = 20mV+10mV+
10mV+.5mV+.3mV
vOut
vcmACD/2
ADC
vdmADC
ADD = 26 dB
ACD = -20 dB
ACC = 0 dB
ADC = -20 dB
(CMRR = 26 dB)
http://commons.wikimedia.org/wiki/File:EEG_cap.jpg
CMRR Budget Example
• Track how CM noise corrupts signal
vCM = 10mV (noise)
vDM = 10µV (signal)
vIn
vCM = 10mV+ 1µV
vDM = 2mV+1mV
+
+
-
-
ADD = 46 dB
ACD = -20 dB
ACC = 0 dB
ADC = -20 dB
(CMRR = 66 dB)
v = 20mV+10mV+
10mV+.5mV+.3mV
vOut
ADC
ADD = 26 dB
ACD = -20 dB
ACC = 0 dB
ADC = -20 dB
(CMRR = 26 dB)
http://commons.wikimedia.org/wiki/File:EEG_cap.jpg
Analysis of Differential Amplifiers
Using Half-Circuits
•
•
•
•
•
Construct fully symmetric equivalent circuit
– REE separated into two equal resistors in
parallel.
None of the currents or voltages in the circuit
are changed.
For differential mode signals, points on the
line of symmetry are virtual grounds
– Connect to ground for AC analysis
For common-mode signals, points on line of
symmetry are replaced by open circuits.
Connections across mid-line replaced with
opposite polarity
20
Bipolar Differential-mode Half-circuits
Direct analysis of the half-circuits yield:
vo = v − v
c1 c2
= −gmR v
C id
Applying rules for drawing halfcircuits, the two power supply
lines and emitter become ac
grounds. The half-circuit
represents a C-E amplifier stage.
€
21
Bipolar Common-mode Half-circuits
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•
All points on line of symmetry become open circuits.
DC circuit with VIC set to zero is used to find amplifier’s Q-point.
•
Last circuit is used for for common-mode signal analysis and
represents the C-E amplifier with emitter resistor 2REE.
22
Half-Circuit Example
• Make Symmetric and find mid-line
VDD
vo+
VDD
vo-
vi+
viI1
vo+
VDD
vo-
vi+
viI1/2
I1/2
Half-Circuit Example
• DM: Ground wires that cross symmetry line. Replace crossconnections with inversions
• CM: Open wires crossing symmetry lines. Replace crossconnections.
VDD
vo+
VDD
VDD
vod
vo-
vi+
viI1/2
I1/2
vid
VDD
-vod
voc
vic
I1/2