Quad Precision, High
Speed Operational Amplifier
OP467
PIN CONFIGURATIONS
High slew rate: 170 V/μs
Wide bandwidth: 28 MHz
Fast settling time: <200 ns to 0.01%
Low offset voltage: <500 μV
Unity-gain stable
Low voltage operation: ±5 V to ±15 V
Low supply current: <10 mA
Drives capacitive loads
OUT A 1
14 OUT D
–IN A 2
+
13 –IN D
+
12 +IN D
+IN A 3
OP467
+IN B 5
–IN B 6
+
11 V–
10 +IN C
+
V+ 4
OUT B 7
9
–IN C
8
OUT C
The dc performance of the OP467 includes less than 0.5 mV of
offset, a voltage noise density below 6 nV/√Hz, and a total
supply current under 10 mA. The common-mode rejection
ratio (CMRR) is typically 85 dB. The power supply rejection
ratio (PSRR) is typically 107 dB. PSRR is maintained to better than
40 dB with input frequencies as high as 1 MHz. The low offset and
drift plus high speed and low noise make the OP467 usable in
applications such as high speed detectors and instrumentation.
NC
8
NC
–IN D
9
16
V–
15
NC
14
+IN C
10 11 12 13
00302-003
NC
+IN B 8
11 –IN C
9
OP467
(TOP VIEW)
NC 7
12 +IN C
NC = NO CONNECT
OUT D
NC
V+ 6
13 V–
10 OUT C
–IN A
+IN D
17
–IN C
–IN B 6
OUT B 7
OP467
18
NC 5
–IN B
V+ 4
+IN B 5
20 19
+IN A 4
NC
14 +IN D
1
OUT C
15 –IN D
2
NC = NO CONNECT
Figure 2. 16-Lead SOIC (S Suffix)
Figure 3. 20-Terminal LCC (RC Suffix)
V+
+IN
OUT
–IN
V–
00302-004
The internal compensation of the OP467 ensures stable unitygain operation, and it can drive large capacitive loads without
oscillation. With a gain bandwidth product of 28 MHz driving a
30 pF load, output slew rate is 170 V/μs, and settling time to
0.01% in less than 200 ns, the OP467 provides excellent
dynamic accuracy in high speed data acquisition systems. The
channel-to-channel separation is typically 60 dB at 10 MHz.
–IN A 2
+IN A 3
3
OUT B
The OP467 is a quad, high speed, precision operational
amplifier. It offers the performance of a high speed op amp
combined with the advantages of a precision op amp in a single
package. The OP467 is an ideal choice for applications where,
traditionally, more than one op amp was used to achieve this
level of speed and precision.
16 OUT D
00302-002
GENERAL DESCRIPTION
OUT A 1
OUT A
Figure 1. 14-Lead CERDIP (Y Suffix) and 14-Lead PDIP (P Suffix)
APPLICATIONS
High speed image display drivers
High frequency active filters
Fast instrumentation amplifiers
High speed detectors
Integrators
Photo diode preamps
00302-001
FEATURES
Figure 4. Simplified Schematic
The OP467 is specified for operation from ±5 V to ±15 V over
the extended industrial temperature range (−40°C to +85°C)
and is available in a 14-lead PDIP, a 14-lead CERDIP, a 16-lead
SOIC, and a 20-terminal LCC.
Contact your local sales office for the MIL-STD-883 data sheet
and availability.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
©2007 Analog Devices, Inc. All rights reserved.
OP467
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
@ VS = ±15.0 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Conditions
Min
VOS
Input Bias Current
IB
Input Offset Current
IOS
Common-Mode Rejection
Large Signal Voltage Gain
CMR
CMR
AVO
Offset Voltage Drift
Bias Current Drift
Long-Term Offset Voltage Drift 1
ΔVOS/ΔT
ΔIB/ΔT
ΔVOS/ΔT
−40°C ≤ TA ≤ +85°C
VCM = 0 V
VCM = 0 V, −40°C ≤ TA ≤ +85°C
VCM = 0 V
VCM = 0 V, −40°C ≤ TA ≤ +85°C
VCM = ±12 V
VCM = ±12 V, −40°C ≤ TA ≤ +85°C
RL = 2 kΩ
RL = 2 kΩ, −40°C ≤ TA ≤ +85°C
80
80
83
77.5
Typ
Max
Unit
0.2
0.5
1
600
700
100
150
mV
mV
nA
nA
nA
nA
dB
dB
dB
dB
μV/°C
pA/°C
μV
150
150
10
10
90
88
86
3.5
0.2
750
OUTPUT CHARACTERISTICS
Output Voltage Swing
VO
RL = 2 kΩ
RL = 2 kΩ, −40°C ≤ TA ≤ +85°C
±13.0
±12.9
±13.5
±13.12
V
V
POWER SUPPLY 2
Power Supply Rejection Ratio
PSRR
±4.5 V ≤ VS ≤ ±18 V
−40°C ≤ TA ≤ +85°C
VO = 0 V
VO = 0 V, −40°C ≤ TA ≤ +85°C
96
86
120
115
8
dB
dB
mA
mA
V
Supply Current
ISY
Supply Voltage Range
VS
±4.5
10
13
±18
DYNAMIC PERFORMANCE
Gain Bandwidth Product
Slew Rate
Full-Power Bandwidth
Settling Time
Phase Margin
Input Capacitance
Common Mode
Differential
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
1
2
GBP
SR
BWρ
tS
θ0
eN p-p
eN
iN
AV = +1, CL = 30 pF
VIN = 10 V step, RL = 2 kΩ, CL = 30 pF
AV = +1
AV = −1
VIN = 10 V step
To 0.01%, VIN = 10 V step
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
125
28
MHz
170
350
2.7
200
45
V/μs
V/μs
MHz
ns
Degrees
2.0
1.0
pF
pF
0.15
6
0.8
μV p-p
nV/√Hz
pA/√Hz
Long-term offset voltage drift is guaranteed by 1000 hrs. Life test performed on three independent wafer lots at 125°C, with an LTPD of 1.3.
For proper operation, the positive supply must be sequenced ON before the negative supply.
Rev. F | Page 3 of 20
OP467
@ VS = ±5.0 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Symbol
Min
VOS
Input Bias Current
IB
Input Offset Current
IOS
Common-Mode Rejection
CMR
CMR
AVO
Large Signal Voltage Gain
Conditions
−40°C ≤ TA ≤ +85°C
VCM = 0 V
VCM = 0 V, −40°C ≤ TA ≤ +85°C
VCM = 0 V
VCM = 0 V, −40°C ≤ TA ≤ +85°C
VCM = ±2.0 V
VCM = ±2.0 V, −40°C ≤ TA ≤ +85°C
RL = 2 kΩ
RL = 2 kΩ, −40°C ≤ TA ≤ +85°C
Typ
Max
Unit
0.3
0.5
1
600
700
100
150
3.5
0.2
mV
mV
nA
nA
nA
nA
dB
dB
dB
dB
μV/°C
pA/°C
125
150
20
76
76
80
74
Offset Voltage Drift
Bias Current Drift
OUTPUT CHARACTERISTICS
Output Voltage Swing
VO
RL = 2 kΩ
RL = 2 kΩ, −40°C ≤ TA ≤ +85°C
±3.0
±3.0
±3.5
±3.20
V
V
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
±4.5 V ≤ VS ≤ ±5.5 V
−40°C ≤ TA ≤ +85°C
VO = 0 V
VO = 0 V, −40°C ≤ TA ≤ +85°C
92
83
107
105
8
dB
dB
mA
mA
Supply Current
DYNAMIC PERFORMANCE
Gain Bandwidth Product
Slew Rate
Full-Power Bandwidth
Settling Time
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
ΔVOS/ΔT
ΔIB/ΔT
85
80
83
ISY
GBP
SR
BWρ
tS
θ0
eN p-p
eN
iN
AV = +1
VIN = 5 V step, RL = 2 kΩ, CL = 39 pF
AV = +1
AV = −1
VIN = 5 V step
To 0.01%, VIN = 5 V step
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
Rev. F | Page 4 of 20
10
12
22
MHz
90
90
2.5
280
45
V/μs
V/μs
MHz
ns
Degrees
0.15
7
0.8
μV p-p
nV/√Hz
pA/√Hz
OP467
WAFER TEST LIMITS 1
@ VS = ±15.0 V, TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Offset Voltage
Input Bias Current
Input Offset Current
Input Voltage Range 2
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage Range
Supply Current
Symbol
VOS
IB
IOS
Conditions
CMRR
PSRR
AVO
VO
ISY
VCM = ±12 V
V = ±4.5 V to ±18 V
RL = 2 kΩ
RL = 2 kΩ
VO = 0 V, RL = ∞
VCM = 0 V
VCM = 0 V
1
Limit
±0.5
600
100
±12
80
96
83
±13.0
10
Unit
mV max
nA max
nA max
V min/max
dB min
dB min
dB min
V min
mA max
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult sales to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
2
Guaranteed by CMR test.
Rev. F | Page 5 of 20
OP467
ABSOLUTE MAXIMUM RATINGS
Table 4.
−65°C to +175°C
−65°C to +150°C
−55°C to +125°C
−40°C to +85°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 5.
−65°C to +175°C
−65°C to +150°C
300°C
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2
For proper operation, the positive supply must be sequenced ON before the
negative supply.
3
For supply voltages less than ±18 V, the absolute maximum input voltage is
equal to the supply voltage.
θJA1
94
76
88
78
Package Type
14-Lead CERDIP (Y)
14-Lead PDIP (P)
16-Lead SOIC (S)
20-Terminal LCC (RC)
θJC
10
33
23
33
Unit
°C/W
°C/W
°C/W
°C/W
1
θJA is specified for the worst-case conditions, that is, θJA is specified for device
in socket for CERDIP, PDIP, and LCC packages, and θJA is specified for device
soldered in circuit board for the SOIC package.
–IN A
2
OUT D
DICE CHARACTERISTICS
OUT A
1
14
+IN A 3
V+
13 –IN D
12 +IN D
4
11 V–
+IN B 5
6
7
8
9
Figure 5. 0.111 Inch × 0.100 Inch DIE Size, 11,100 sq. mils,
Substrate Connected to V+, 165 Transistors
ESD CAUTION
Rev. F | Page 6 of 20
–IN C
00302-005
–IN B
10 +IN C
OUT C
1
Rating
±18 V
±18 V
±26 V
Limited
OUT B
Parameter 1
Supply Voltage 2
Input Voltage 3
Differential Input Voltage3
Output Short-Circuit Duration
Storage Temperature Range
14-Lead CERDIP and 20-Terminal LCC
14-Lead PDIP and 16-Lead SOIC
Operating Temperature Range
OP467A
OP467G
Junction Temperature Range
14-Lead CERDIP and 20-Terminal LCC
14-Lead PDIP and 16-Lead SOIC
Lead Temperature (Soldering, 60 sec)
OP467
10.50 (0.4134)
10.10 (0.3976)
9
16
7.60 (0.2992)
7.40 (0.2913)
1
8
1.27 (0.0500)
BSC
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
0.51 (0.0201)
0.31 (0.0122)
10.65 (0.4193)
10.00 (0.3937)
0.75 (0.0295)
0.25 (0.0098)
2.65 (0.1043)
2.35 (0.0925)
SEATING
PLANE
45°
8°
0°
1.27 (0.0500)
0.40 (0.0157)
0.33 (0.0130)
0.20 (0.0079)
032707-B
COMPLIANT TO JEDEC STANDARDS MS-013- AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 58. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body (RW-16)
S-Suffix
Dimensions shown in millimeters and (inches)
0.358 (9.09)
0.342 (8.69)
SQ
0.358
(9.09)
MAX
SQ
0.088 (2.24)
0.054 (1.37)
0.200 (5.08)
REF
0.100 (2.54) REF
0.015 (0.38)
MIN
0.075 (1.91)
REF
0.095 (2.41)
0.075 (1.90)
0.011 (0.28)
0.007 (0.18)
R TYP
0.075 (1.91)
REF
0.055 (1.40)
0.045 (1.14)
19
18
3
20
4
0.028 (0.71)
0.022 (0.56)
1
BOTTOM
VIEW
0.050 (1.27)
BSC
8
14
13
9
45° TYP
0.150 (3.81)
BSC
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
022106-A
0.100 (2.54)
0.064 (1.63)
Figure 59. 20-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-20-1) RC-Suffix
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model
OP467GP
OP467GPZ 1
OP467GS
OP467GS-REEL
OP467GSZ1
OP467GSZ-REEL1
OP467ARC/883C
OP467AY/883C
OP467GBC
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−55°C to +125°C
−55°C to +125°C
Package Description
14-Lead PDIP
14-Lead PDIP
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
16-Lead SOIC_W
20-Terminal LCC
14-Lead CERDIP
DIE
Z = RoHS Compliant Part.
Rev. F | Page 20 of 20
Package Option
N-14
N-14
RW-16
RW-16
RW-16
RW-16
E-20-1
Q-14