icm320-bus

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ICM 320
32 ISOLATED DIGITAL OUTPUTS
FEATURES
z
z
32 relay outputs
Contact types Breaking capacity:
"A" 1T A = 10VA/0.5A/100V
"C" 1RT C = 30VA/1.2A/220V
"S" 1T S = 10VA/0.25A/100V
z
Contact protection possible
z
Fast switching time: < 1ms max. type "S"
z
High reliability
z
Store and readback
z
Safety with fallback by coil control in two
groups
z
8 or 16-bit microprocessor transfers on I/O
z
Fully compatible MULTIBUS I
DESCRIPTION
The ICM 320 is a board with 32 digital outputs by relays fully compatible with the INTEL
MULTIBUS I standard.
It exists in 3 versions:
z
z
z
ICM 320 - A : 32 relay channels type A – 1T
ICM 320 - C : 32 relay channels type C – 1RT
ICM 320 - S : 32 solid-state relay channels – 1T
The state of the relays can be read back by means of the MULTIBUS I.
Hardware possibilities for testing correct operation of the relays.
Two safety loops by photocoupled controls provide a fallback possibility in industrial
processes.
9 rue Georges Besse – BP 47 – 78330 FONTENAY LE FLEURY – FRANCE
Tél.:(33) 1 30 58 90 09 - http://www.adas.fr - mail@adas.fr
ICM 320
SPECIFICATIONS
TYPE
MODEL
OUTPUTS
- Number of channels
- Contact type
BREAKING CAPACITY
- Power
- DC current
- DC voltage
- Withstand
- Rise time
- Release time
DC WITHSTAND
- Between contacts
- Contacts / coil
AC WITHSTAND
- Between contacts
- Contacts / coil
LIFETIME
- No-load
- On-load
SAFETIES
- Type
- Levels
MULTIBUS INTERFACE
- Transfers
POWER SUPPLY
- Voltage
PRESENTATION
- Format
- Dimensions in mm
- Front panel connectors
ENVIRONMENT
- Operating temperature
- Storage temperature
- Relative humidity
EUROPEAN NORMS
(t = 25°C)
ISOLATED DIGITAL OUTPUTS
ICM 320/A
ICM 320/S
ICM 320/C
32
1T
32
1T
32
1 RT
10W max.
0.5 A
100 V
0.2Ω max.
1.5 ms max.
1 ms
10W max.
0.25 A
100 V
10mΩ max.
1 ms max.
1 ms
30W max.
1.25 A
220 V
50mΩ max.
6 ms max.
3 ms
250 V
500 V
400 V
1,000 V
200 V
500 V
400 V
850 V
280 V
1,000 V
500 V
500 V
10 E8 op.
10 E7 op
10 E10 op
10 E9 op
10 E7 op
10 E6 op
Fallback system in two groups by photocoupled controls
From 6V to 48V AC or DC
8 or 16 bits in the I/O space with status readback
5V / 2A max.
MULTIBUS I / 1 slot
305 x 171. 5 x 10
2 x HE 10/50 pins
0°C to + 60°C
- 10°C to + 70°C
90 % (without condensation)
EMC - EN 61326 - EN 55011 Class A
CE Compliance
ROHS - 2002/95/EC
HOW TO ORDER?
ICM 320 / *
VERSIONS
A = 1 T - 10VA
C = 1 RT - 30VA
S = 1 T - 10VA
E.g. : ICM 320/S
ACCESSORIES
4
24/08
ADAS
DOCUMENT REVISION SHEET
--- Electronique --PRODUCT REFERENCE
:
ICM 320
DATE
NATURE OF MODIFICATION
AUTHOR
JANUARY 89
♦ Document creation
Edition 1 - Revision B
MARCH 93
♦ Documentation update
Edition 2 - Revision B
Ph. D
JULY 93
♦ Corrections
Edition 3 - Révision B
DP
ICM 320 - Rev. B - Edition 3 : July 1993
1
ICM 320
CONTENTS
A.
PRESENTATION ........................................................................................................ 3
B.
OPERATION................................................................................................................ 4
B.1.
RELAY OUTPUTS .......................................................................................................... 4
B.2.
READBACK .................................................................................................................... 5
B.3.
HARDWARE TEST ......................................................................................................... 5
B.4.
SAFETIES MODE ........................................................................................................... 5
B.5.
"STANDALONE" MODE ................................................................................................ 7
B.6.
CONTACT PROTECTION .............................................................................................. 7
B.7.
VOLTAGE TRANSMISSION........................................................................................... 7
B.8.
INTERRUPTS.................................................................................................................. 8
B.9.
MULTIBUS INTERFACE ................................................................................................ 8
C.
USE .............................................................................................................................. 13
C.1.
ADDRESS SELECTION ............................................................................................... 13
C.3.
CONNECTION TERMINALS......................................................................................... 14
D.
IMPLEMENTATION ................................................................................................. 15
D.1.
LOW ADDRESS SELECTION ...................................................................................... 15
D.2.
8/16-BIT TRANSFERS.................................................................................................. 15
D.3.
INTERRUPTS................................................................................................................ 15
D.4.
VOLTAGE TRANSMISSION......................................................................................... 15
D.5.
OPERATING MODES ................................................................................................... 16
D.6.
RELAY TESTS.............................................................................................................. 16
E.
EQUIPMENT LAYOUT ........................................................................................... 17
ICM 320 - Rev. B - Edition 3 : July 1993
2
A.
PRESENTATION
The ICM 320 is a MULTIBUS I format PCB enabling 32 relay type isolated digital
outputs to be managed.
The PCB can receive :
= electromechanical relays
= solid-state relays.
The product design is geared to industrial process control where safety and
dependability criteria are essential.
ICM 320 - Rev. B - Edition 3 : July 1993
3
B.
OPERATION
B.1.
RELAY OUTPUTS
The ICM 320 has 32 relay outputs.
For each channel, the following three contacts are available :
= normally open,
= normally closed,
= common.
That is if the relay selected allows this.
The breaking capacity depends on the relay selected in the data sheet.
The products supported by the ICM 320 are as follows :
= VERSION A :
D31 A2100
PG1 A05
831A-1
PRMA 1A 05
CELDUC
NEC
GORDOW
CLARE
= VERSION C :
TQ2 - 5V SDS
= VERSION S :
C46F - 1 TELEDYNE RELAYS
N.B. : See documents included hereafter.
When they are powered on, the relays are automatically set to break by the INIT signal.
Write of a 16-bit word at the addresses "low + 2" or "low + 4" is stored in the 74LS273
registers.
ULN 2800 power chips then perform control of the relays.
ICM 320 - Rev. B - Edition 3 : July 1993
4
B.2.
READBACK
The register output status can be read back at the respective addresses.
A "1" state, Data "n" at "1" corresponds to sticking of the relay involved.
Readback in no way affects the output status.
B.3.
HARDWARE TEST
Independently from all the other procedures, a relay test can be performed by pressing
the pushbuttons located on the PCB.
= Button S1 forces channels 0 to 15 to stick.
= Button S2 forces channels 16 to 31 to stick.
It is indispensable that the coils be supplied for this test to be carried out (refer to
chapter "SAFETIES MODE").
B.4.
SAFETIES MODE
The ICM 320 has two safety circuits in order to proceed with a HARDWARE fallback in
the event of a problem on the process.
The following concept is used :
= Supply of the relay coils is performed in two groups by means of two transistors :
T1 for channels 0 to 15,
T2 for channels 16 to 31
= The HCPL 3700 photocouplers (IC 36/IC 37) control the two above-mentioned
transistors.
= The resistors R8 and R10, mounted on studs, enable the sensitivity of the safety
loops to be adjusted in terms of the input level.
= The table below describes the values for the different voltages :
Rated voltage
5V
12V
24V
48V
R8 / R10 (KΩ)
0.010
1
4.7
10
ICM 320 - Rev. B - Edition 3 : July 1993
5
= The capacitors C3 and C4 perform input filtering.
= The signals may be AC or DC (the PCB is set in the factory for 24V).
= The 2A fuses F2 and F4 protect the 5V in the event of problems arising on the relay.
= To use the "safeties" function, the straps ST104 and ST105 have to be fitted in the
position BC.
= In this mode, to ensure sticking of the relays, the "Safeties" voltages will have to be
applied to the following terminals :
• 49 - 50 of J1 for relays 0 to 15
• 49 - 50 of J2 for relays 16 to 31
These two commands are galvanically isolated from one another and from the
system.
= A read at Low address + A enables the status of the safeties to be read, a "0"
corresponds to said presence.
D0 = Safety of channels 0 to 15,
D1 = Safety of channels 16 to 31.
ICM 320 - Rev. B - Edition 3 : July 1993
6
B.5.
"STANDALONE" MODE
In this mode, it is not necessary to supply the safeties to achieve operation of the
relays.
The straps ST104 and ST105 have to be fitted in the position AB.
On power up, the circuits 7474 IC22 set the outputs Q to "0" and turn the transistors T1
and T2 on supplying the output relay coils.
The output relays can be deactivated in this mode by a write at the Low address + A.
D0 = 1 results in deactivation of channels 0 to 15
D1 = 1 results in deactivation of channels 16 to 31
The effect of these commands can be read back at the same address.
B.6.
CONTACT PROTECTION
If the customer wishes, contact protection can be performed by varistors or by other
products.
The efficiency of these devices remains at the appreciation of the user.
In addition, the relays can easily be removed from the PCB for maintenance purposes.
B.7.
VOLTAGE TRANSMISSION
The ICM 320 enables a voltage to be transmitted from the pins of the connector P2.
Straps ST0 to ST15 for power supply from pins 40 and 42 of P2.
Straps ST16 to ST31 for power supply from pins 44 and 46 of P2.
These two sources can be joined to form a single source by means of the strap ST106.
ICM 320 - Rev. B - Edition 3 : July 1993
7
B.8.
INTERRUPTS
If the user desires, the two safety inputs can be used to generate an interrupt on the
MULTIBUS, in the event of their disappearing.
Read is performed at the PCB Low address.
D0 = 1 Safety of channels 0 to 15 has disappeared,
D1 = 1 Safety of channels 16 to 31 has disappeared.
Acknowledgement is by a read at Low address + A.
B.9.
MULTIBUS INTERFACE
The PCB can be used with 8 and 16-bit microprocessors.
The MULTIBUS interface is made up of three basic groups :
= Address decoding ;
= Bus drivers (DATAS) ;
= Control signals.
The table overleaf describes the signals used on "P1".
ICM 320 - Rev. B - Edition 3 : July 1993
8
- SIGNALS USED ON "P1" PIN
Power
supply
Control
bus
Interrupts
Addresses
DATAS
Power
supply
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
COMPONENTS SIDE
Mnemonic
GND
+ 5V
+ 5V
Description
Ground
GND
Ground
PIN
IORC/
XACK/
I/O Read cde
TFER acc.rec.
BHEN/
BYTE HIGH ENAB
CCLK/
CONSTANT CLOCK
INT 6/
INT 4/
INT 2/
INT 0/
ADR E/
ADR C/
ADR A/
ADR 8/
ADR 6/
ADR 4/
ADR 2/
ADR 0/
DAT E/
DAT C/
DAT A/
DAT 8/
DAT 6/
DAT 4/
DAT 2/
DAT 0/
GND
+ 5V
+ 5V
GND
Interrupt
requests //
address bus
DATA bus
Ground
Ground
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
CIRCUIT SIDE
Mnemonic
GND
+ 5V
+ 5V
Description
Ground
GND
INIT/
Ground
Initialisation
IOWC/
INT 7/
INT 5/
INT 3/
INT 1/
ADR F/
ADR D/
ADR B/
ADR 9/
ADR 7/
ADR 5/
ADR 3/
ADR 1/
DAT F/
DAT D/
DAT B/
DAT 9/
DAT 7/
DAT 5/
DAT 3/
DAT 1/
GND
+ 5V
+ 5V
GND
/: Active at low state
ICM 320 - Rev. B - Edition 3 : July 1993
9
I/O Write cde
Interrupt
requests //
address bus
DATA bus
Ground
Ground
CCLK/
Constant clock
Minimum period 100ns and 35 % to 65 % of duty cycle.
It is used to determine the inputs/outputs PCB access time.
IORC/
I/O read command
This signal appears 50ns minimum after selection of an inputs/outputs PCB and
indicates that the latter must present DATA on the MULTIBUS.
IOWC/
Write command
This signal indicates that the DATA has been available for at least 50ns on the
MULTIBUS and must be written at the inputs/outputs PCB address indicated.
N.B. :
The signals IORC/ and IOWC/ can be linked to the 8205 inputs E2 to
generate "chip selects" in read and write.
XACK/
Acknowledgement of receipt
This signal indicates that the "slave" PCB has performed its read or write
operation.
This time is programmable on the PCB from 0 to 8 CCLK/ pulses, i.e. from 0 to
800ns.
This is performed by an offset register.
The signal BHEN BL/ releases the clear of 74164 (U2) and the tristate of the
74 LS 368 (U11).
The information on A and B ("1") is then transferred by CCLK/ ; acceptance of
one of the offset register outputs determines the PCB access time.
INT 0/
INT 7/
8 parallel interrupt request levels
The interrupt logic uses 2 x 74S74 (U13; U14).
The interrupt request register outputs Q can be directed to one of the MULTIBUS
interrupt lines via an open collector 7406 (U15).
The interrupt register statuses are transferred to an interrupt status register
which can be read at the PCB low address.
DAT 0 then contains the interrupt brought about by INT REQUEST 0 and DAT 1
the interrupt of INT REQUEST 1.
Writing at the PCB low address RESETS the interrupt latches.
This method makes it possible to know where an interrupt comes from when
several PCBs are using the same priority line.
N.B. :
Only the PCBs which require interrupts use these lines.
ICM 320 - Rev. B - Edition 3 : July 1993
10
INIT/
Initialisation signal
Sets the inputs/outputs to "0" when the PCB is powered on.
ADR 0/
to
ADR F/
16 address lines
These lines enable the PCB to be addressed.
In the case of an 8-bit microprocessor, only the addresses ADR 0/ to ADR 7/
are used for decoding.
The PCB occupies a memory space of 16 addresses.
The microprocessor can therefore address 16 PCBs in the case of an 8-bit and
256 PCBs in the case of a 16-bit.
The addresses ADR 4/ to ADR F/ are decoded by the 74 LS 688s (U3; U4), which
generates "BASE ADDRESS SELECT" which activates the input E1 of the 8205s
(U18; U19; U20; U21).
The addresses ADR 1/, ADR 2/, ADR 3/ provide the even addressing.
The combination of ADR 0/ and BHEN/ by means of an "EXCLUSIVE OR"
contributes to selection of the 8 high bits which are selected by ADR 0/ in the case
of an 8-bit transfer and by BHEN/ in the case of a 16-bit transfer.
8 bits
16 bits
BHEN /
EVEN + ODD NON SELECT
EVEN
ODD
ADR 0
+
BHEN/
8 high bits selection
High byte available
This signal is used in 16-bit devices to indicate that the high bits (DAT 8/ - DAT F/)
can be transferred on the corresponding lines of the MULTIBUS.
ICM 320 - Rev. B - Edition 3 : July 1993
11
The table below illustrates the different transfer modes :
16-BIT DEVICES
LOW, EVEN
BYTES
MULTIBUS
BHEN/
ADR0/
H
H
MULTIBUS
TRANSFER
DATA PATH
DEVICE
BYTE
TRANSFERRED
DAT0/-DAT7/
8-BIT;
EVEN
DAT0/-DAT7/
HIGH, ODD
BYTES
DAT8/-DATF/
LOW, EVEN
BYTES
DAT0/-DAT7/
8-BIT;
H
ODD
L
DAT0/-DAT7/
HIGH, ODD
BYTES
DAT8/-DATF/
LOW, EVEN
BYTES
DAT0/-DAT7/
8-BIT;
H
H
DAT0/-DAT7/
HIGH, ODD
BYTES
EVEN
AND
ODD
DAT8/-DATF/
It should be noted that the condition BHEN/ and ADR 0/ = 0 leads to an erroneous
read.
In the 16-bit case, the DATA from 0 to F appears on the corresponding lines of the
MULTIBUS at the even addresses.
DAT 0/
DAT F/
16 bidirectional DATA lines
DAT F/ is the high bit for 16-bit transfers.
In 8-bit devices, only the lines DAT 0/ to DAT 7/ are used and DAT 7/ is the high
bit.
The buffers are performed by 8287s.
The circuit IC 610 acts as switching for the high BYTE in the 8 / 16 bits.
ICM 320 - Rev. B - Edition 3 : July 1993
12
C.
USE
C.1.
ADDRESS SELECTION
The PCB uses a 16-address space (XXX 0 to XXX F) in the I/O space.
The table below describes the space in 8 or 16-bit words (it should be noted that all the
space is not used) :
READ
WRITE
BYTE
D0
XXX0
XXX2
XXX3
XXX4
XXX5
XXXA
D0 = Safety 1 interrupt
D1 = Safety 2 interrupt
Channels 0 to 7
Channels 8 to 15
Channels 16 to 23
Channels 24 to 31
D0 = Cmd relays 0 to 15
D1 = Cmd relays 16 to 31
IT acknowledge
MOTS
D0
XXX0
D0 = Safety 1 interrupt
D1 = Safety 2 interrupt
Channels 0 à 15
Channels 16 à 31
D0 = Cmd relays 0 à 15
D1 = Cmd relays 16 à 31
IT acknowledge
XXX2
XXX4
XXXA
D7
DF
D0
D7
Channels 0 to 7
Channels 8 to 15
Channels 16 to 23
Channels 24 à 31
D0 = Cmd relays 0 à 15
D1 = Cmd relays 16 à 31
D0
DF
Channels 0 à 15
Channels 16 à 31
D0 = Cmd relays 0 à 15
D1 = Cmd relays 16 à 31
XXX = Base address from 000 to FFF.
ACCESS TIME :
On delivery, XACK/ is on the position from 3 to 4 CCLK/, i.e. a PCB access time of 300
to 400ns.
ICM 320 - Rev. B - Edition 3 : July 1993
13
C.3.
CONNECTION TERMINALS
The outputs are achieved by two 50-pin connectors for ribbon cable and socket
connector with anti-traction (HE 10 Standard).
E.g. : T and B 6095041
ANSLEY
The table below describes the outputs on J1 and J2 :
PIN
SIGNAL
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
Safety
NO
NC
COM
NO
NC
COM
NO
NC
COM
NO
NC
COM
NO
NC
COM
NO
NC
COM
NO
NC
COM
NO
NC
COM
J1
J2
Channels Channels
15
15
14
13
13
12
11
11
10
9
9
8
7
7
6
5
5
4
3
3
2
1
1
0
31
31
30
29
29
28
27
27
26
25
25
24
23
23
22
21
21
20
19
19
18
17
17
16
PIN
SIGNAL
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
Safety
COM
NO
NC
COM
NO
NC
COM
NO
NC
COM
NO
NC
COM
NO
NC
COM
NO
NC
COM
NO
NC
COM
NO
NC
J1
J2
Channels Channels
15
14
14
13
12
12
11
10
10
9
8
8
7
6
6
5
4
4
3
2
2
1
0
0
N.B. : In the case of type "A" relays, the terminals NO and NC are connected.
ICM 320 - Rev. B - Edition 3 : July 1993
14
31
30
30
29
28
28
27
26
26
25
24
24
23
22
22
21
20
20
19
18
18
17
16
16
D.
IMPLEMENTATION
D.1.
LOW ADDRESS SELECTION
The low address is selected by RC1, RC2 and RC3.
RC1 = MSB
E.g. :
D.2.
RC3 = LSB
F
⇓
RC1
8
⇓
RC2
0
⇓
RC3
X
⇓
Space taken by the PCB
8/16-BIT TRANSFERS
The ICM 320 has swapping in the case of use of an 8 or 16-bit microprocessor.
The I/O addressable space is :
8-bits = 256 bytes
16-bits = 64K.bytes
D.3.
ST103 = AB
ST103 = BC
INTERRUPTS
The safeties can send interrupts on the MULTIBUS.
ST 100 = Group 0 to 15
D0
ST 102 = Group 16 to 31
D1
ST 101 = MULTIBUS interrupt
D.4.
VOLTAGE TRANSMISSION
Straps ST 0 to ST15 for group 1.
Straps ST16 to ST31 for group 2.
ICM 320 - Rev. B - Edition 3 : July 1993
15
D.5.
OPERATING MODES
♦ SAFETY
ST104 and ST105 on BC
♦ STANDALONE
ST104 and ST105 on AB
D.6.
RELAY TESTS
The pushbuttons ST1 and ST2 serve the purpose of testing the relays.
S1 = Channels 0 to 15
S2 = Channels 16 to 31
ICM 320 - Rev. B - Edition 3 : July 1993
16
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