AT91SAM7X-EK
Evaluation Board
for AT91SAM7X and AT91SAM7XC
..............................................................................................
User Guide
2
6195E–ATARM–22-Mar-07
AT91SAM7X-EK Evaluation Board User Guide
Table of Contents
Section 1
Overview............................................................................................... 1-1
1.1
1.2
1.3
Scope........................................................................................................1-1
Deliverables ..............................................................................................1-1
The AT91SAM7X-EK Evaluation Board....................................................1-1
Section 2
Setting Up the AT91SAM7X-EK
Evaluation Board .................................................................................. 2-1
2.1
2.2
2.3
2.4
2.5
2.6
Electrostatic Warning ................................................................................2-1
Requirements............................................................................................2-1
Layout .......................................................................................................2-2
Powering Up the Board .............................................................................2-3
Getting Started..........................................................................................2-3
AT91SAM7X-EK Block Diagram ...............................................................2-4
Section 3
Board Description ................................................................................. 3-1
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
3.12
3.13
3.14
AT91SAM7X Microcontroller.....................................................................3-1
AT91SAM7X Block Diagram .....................................................................3-4
AT91SAM7XC Microcontroller ..................................................................3-5
AT91SAM7XC Export Regulations Statement ..........................................3-7
AT91SAM7XC Block Diagram ..................................................................3-8
Memory .....................................................................................................3-9
Clock Circuitry ...........................................................................................3-9
Reset Circuitry ..........................................................................................3-9
Power Supply Circuitry..............................................................................3-9
Remote Communication ...........................................................................3-9
Analog Interface ........................................................................................3-9
User Interface ...........................................................................................3-9
Debug Interface ......................................................................................3-10
Expansion Slot ........................................................................................3-10
Section 4
Configuration Straps ............................................................................. 4-1
4.1
Configuration Straps .................................................................................4-1
Section 5
Schematics ........................................................................................... 5-1
5.1
Schematics ...............................................................................................5-1
AT91SAM7X-EK Evaluation Board User Guide
i
6195E–ATARM–22-Mar-07
Section 6
Errata .................................................................................................... 6-1
6.1
Errata ........................................................................................................6-1
Section 7
Revision History.................................................................................... 7-1
7.1
ii
6195E–ATARM–22-Mar-07
Revision History ........................................................................................7-1
AT91SAM7X-EK Evaluation Board User Guide
Section 1
Overview
1.1
Scope
The AT91SAM7X-EK and the AT91SAM7XC-EK evaluation kits enable evaluation capabilities and code development of applications running on the AT91SAM7X or the
AT91SAM7XC microcontroller.
This guide focuses on the AT91SAM7X-EK board as a common evaluation platform for
the AT91SAM7X and AT91SAM7XC devices in a 100-lead LQFP package.
1.2
Deliverables
The package contains the following items:
! a board marked AT91SAM7X-EK
! one A/B-type USB cable
! one crossed serial RS232 cable
! one RJ45 crossed Ethernet cable
! universal input AC/DC power supply with US and EU plug adapter
! one DVD-ROM containing summary and full datasheets, datasheets with electrical
and mechanical characteristics, application notes and getting started documents for
all development boards and AT91 microcontrollers. An AT91 software package with C
and assembly listings is also provided. This allows the user to begin evaluating the
AT91 ARM® Thumb® 32-bit microcontroller quickly.
1.3
The AT91SAM7X- Depending on the model of the kit, the board is equipped with either an AT91SAM7X256
or an AT91SAM7XC256 (100-pin LQFP Green package) together with the following
EK Evaluation
interfaces:
Board
! USB device port
! DBGU serial communication port
! RS232 serial communication port with RTS/CTS
! JTAG/ICE debug interface connector
! serial CAN communication ports
! MII Ethernet 100-base TX with auto MDIX capability
! buffered analog input and PWM output
AT91SAM7X-EK Evaluation Board User Guide
1-1
6195E–ATARM–22-Mar-07
Overview
! Power LED and general-purpose LEDs
! DataFlash® card slot
! expansion connector
! Atmel® serial DataFlash
! One footprint for Atmel Serial EEPROM (MN11)
1-2
6195E–ATARM–22-Mar-07
AT91SAM7X-EK Evaluation Board User Guide
Section 2
Setting Up the AT91SAM7X-EK
Evaluation Board
2.1
Electrostatic
Warning
The AT91SAM7X-EK evaluation board is shipped in a protective anti-static package.
The board must not be subjected to high electrostatic potentials. A grounding strap or
similar protective device should be worn when handling the board. Avoid touching the
component pins or any other metallic element.
2.2
Requirements
In order to set up the AT91SAM7X-EK evaluation board, the following items are
required:
! the AT91SAM7X-EK evaluation board itself
! an A/B-type USB cable
or
! a DC USB power adapter (5V at 0.5 A) with USB A/B cable
Note:
The kit is not delivered with a JTAG/ICE interface which is required to start evaluating the device.
AT91SAM7X-EK Evaluation Board User Guide
2-1
6195E–ATARM–22-Mar-07
Setting Up the AT91SAM7X-EK Evaluation Board
2.3
Layout
Figure 2-1. Layout - Top View
2-2
6195E–ATARM–22-Mar-07
AT91SAM7X-EK Evaluation Board User Guide
Setting Up the AT91SAM7X-EK Evaluation Board
Figure 2-2. Layout - Bottom View
2.4
Powering Up the
Board
The AT91SAM7X-EK board is self-powered by the USB port or by a USB power adapter.
2.5
Getting Started
The AT91SAM7X-EK evaluation board is delivered with a DVD-ROM containing all necessary information and step-by-step procedures for working with the most common
development tool chains. Please refer to this DVD-ROM, or to the AT91 web site,
http://www.atmel.com/products/AT91/, for the most up-to-date information on getting
started with the evaluation kit.
AT91SAM7X-EK Evaluation Board User Guide
2-3
6195E–ATARM–22-Mar-07
Setting Up the AT91SAM7X-EK Evaluation Board
2.6
AT91SAM7X-EK
Block Diagram
Figure 2-3. Block Diagram
DATAFLASH CARD READER
DBGU
RS232
RS232
CANH
CANL
VBUS
USB DEVICE
ETHERNET 10/100
MDI/MDIX AUTO CROSSOVER
VBUS
RJ45
RXD
TXD
RXD
TXD
CTS
RTS
1
3V3
3V3
ETHERNET PHY
OUT
8 7 6 5 4 3 2 1 9
PIO A - PIO B EXPANSION CONNECTOR
IN
PWD
3V3
5V
3V3
NOT POPULATED
NRST
SERIAL
DATAFLASH
PIO
SCL - SDA
DDM
TWI
USB
EMAC
USART0
MII INTERFACE
1K5
PIO
DDP
CS
SPI0_NPCS1
SPI0
CAN
PIO
TST
NRST
ERASE
VDDIO
VDDIN
VDDCORE
VDDFLASH
VDDOUT
SPI0_NPCS0
LIGHTED WHEN POWER ON
MANUAL RESET
Serial
EEprom
RXD - TXD - RTS - CTS
PIO
DRXD - DTXD
POWER LED
DBGU
YELLOW
RS
VDDPLL
PIO A
PIO B
SYSTEM CONTROLLER
RF CONNECTORS
ZIGBEE AT86RF210 MODULE
ADC
PIO B
PIO A
PB22
RF CONNECTORS
AT86RF230 MODULE
PWM3
PB21
PWM2
PB19
PB20
PWM1
3
2
1
PWM0
PB30
GNDANA
PWM3
3.3VANA
PWM0..PWM3
AD5
JTAG/ICE
AD4
EXT CLK INPUT
NOT POPULATED
(LQFP100)
XIN
VDDANA
ADVREFP
GNDANA
18.432 MHz
AT91SAM7X256
AT91SAM7XC256
XOUT
RF CONNECTORS
ATR2406 MODULE
0 TO VREF
PWM VOLTAGE GEN.
3.00V +- 0.2%
EXTERNAL REF
0 TO VREF
EXTERNAL INPUT
J7
1
2
3
USER'S GREEN LED
4
5
6
USER'S TACT SWITCH
JTAG/ICE CONNECTOR
1
ANALOG INPUT
2-4
6195E–ATARM–22-Mar-07
AT91SAM7X-EK Evaluation Board User Guide
Section 3
Board Description
3.1
AT91SAM7X
Microcontroller
! Incorporates the ARM7TDMI® ARM® Thumb® Processor
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– EmbeddedICE™, Debug Communication Channel Support
! Internal High-speed Flash
– 256 Kbytes (AT91SAM7X256) Organized in 1024 Pages of 256 Bytes
– 128 Kbytes (AT91SAM7X128) Organized in 512 Pages of 256 Bytes
– Single Cycle Access at Up to 30 MHz in Worst Case Conditions
– Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
– Page Programming Time: 6 ms, Including Page Auto-erase,
Full Erase Time: 15 ms
– 10,000 Write Cycles, 10-year Data Retention Capability,
Sector Lock Capabilities, Flash Security Bit
– Fast Flash Programming Interface for High Volume Production
! Internal High-speed SRAM, Single-cycle Access at Maximum Speed
– 64 Kbytes (AT91SAM7X256)
– 32 Kbytes (AT91SAM7X128)
! Memory Controller (MC)
– Embedded Flash Controller, Abort Status and Misalignment Detection
! Reset Controller (RSTC)
– Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout
Detector
– Provides External Reset Signal Shaping and Reset Source Status
! Clock Generator (CKGR)
– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
! Power Management Controller (PMC)
AT91SAM7X-EK Evaluation Board User Guide
3-1
6195E–ATARM–22-Mar-07
Board Description
– Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz)
and Idle Mode
– Four Programmable External Clock Signals
! Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Two External Interrupt Sources and One Fast Interrupt Source, Spurious
Interrupt Protected
! Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel interrupt,
Programmable ICE Access Prevention
! Periodic Interval Timer (PIT)
– 20-bit Programmable Counter plus 12-bit Interval Counter
! Windowed Watchdog (WDT)
– 12-bit key-protected Programmable Counter
– Provides Reset or Interrupt Signals to the System
– Counter May Be Stopped While the Processor is in Debug State or in Idle
Mode
! Real-time Timer (RTT)
– 32-bit Free-running Counter with Alarm
– Runs Off the Internal RC Oscillator
! Two Parallel Input/Output Controllers (PIO)
– Sixty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous
Output
! Thirteen Peripheral DMA Controller (PDC) Channels
! One USB 2.0 Full Speed (12 Mbits per second) Device Port
– On-chip Transceiver, 1352-byte Configurable Integrated FIFOs
! One Ethernet MAC 10/100 base-T
– Media Independent Interface (MII) or Reduced Media Independent Interface
(RMII)
– Integrated 28-byte FIFOs and Dedicated DMA Channels for Transmit and
Receive
! One Part 2.0A and Part 2.0B Compliant CAN Controller
– Eight Fully-programmable Message Object Mailboxes, 16-bit Time Stamp
Counter
! One Synchronous Serial Controller (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and
Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
3-2
6195E–ATARM–22-Mar-07
AT91SAM7X-EK Evaluation Board User Guide
Board Description
! Two Universal Synchronous/Asynchronous Receiver Transmitters (USART)
– Individual Baud Rate Generator, IrDA® Infrared Modulation/Demodulation
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485
Support
– Full Modem Line Support on USART1
! Two Master/Slave Serial Peripheral Interfaces (SPI)
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
! One Three-channel 16-bit Timer/Counter (TC)
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
! One Four-channel 16-bit Power Width Modulation Controller (PWMC)
! One Two-wire Interface (TWI)
– Master Mode Support Only, All Two-wire Atmel EEPROMs Supported
! One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with
Digital I/Os
! SAM-BA™ Boot Assistance
– Default Boot program
– Interface with SAM-BA Graphic User Interface
! IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins
! 5V-tolerant I/Os, Including Four High-current Drive I/O lines, Up to 16 mA Each
! Power Supplies
– Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External
Components
– 3.3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash
Power Supply
– 1.8V VDDCORE Core Power Supply with Brownout Detector
! Fully Static Operation: Up to 55 MHz at 1.65V and 85° C Worst Case Conditions
! Available in a 100-lead LQFP Green Package
AT91SAM7X-EK Evaluation Board User Guide
3-3
6195E–ATARM–22-Mar-07
Board Description
3.2
AT91SAM7X
Block Diagram
Figure 3-1. Block Diagram
TDI
TDO
TMS
TCK
ICE
JTAG
SCAN
ARM7TDMI
Processor
JTAGSEL
1.8 V
Voltage
Regulator
System Controller
TST
FIQ
VDDCORE
AIC
DRXD
DTXD
VDDIO
Memory Controller
PIO
IRQ0-IRQ1
DBGU
VDDIN
GND
VDDOUT
PDC
SRAM
Embedded
Flash
Controller
Address
Decoder
Abort
Status
Misalignment
Detection
64/32 Kbytes
PDC
PCK0-PCK3
PLLRC
PLL
XIN
XOUT
OSC
VDDCORE
Peripheral Bridge
ROM
Peripheral DMA
Controller
BOD
POR
ERASE
256/128 Kbytes
PMC
RCOSC
VDDCORE
VDDFLASH
VDDFLASH
Flash
Reset
Controller
PGMRDY
PGMNVALID
PGMNOE
PGMCK
PGMM0-PGMM3
PGMD0-PGMD15
PGMNCMD
PGMEN0-PGMEN1
Fast Flash
Programming
Interface
13 Channels
NRST
PIT
APB
SAM-BA
WDT
RTT
DMA
FIFO
PIOB
PIO
PIOA
Ethernet MAC 10/100
PDC
USART0
PDC
PDC
USB Device
USART1
PDC
Transceiver
VDDFLASH
FIFO
PWMC
PDC
PIO
PDC
SPI0
SSC
PDC
PDC
PIO
RXD0
TXD0
SCK0
RTS0
CTS0
RXD1
TXD1
SCK1
RTS1
CTS1
DCD1
DSR1
DTR1
RI1
SPI0_NPCS0
SPI0_NPCS1
SPI0_NPCS2
SPI0_NPCS3
SPI0_MISO
SPI0_MOSI
SPI0_SPCK
SPI1_NPCS0
SPI1_NPCS1
SPI1_NPCS2
SPI1_NPCS3
SPI1_MISO
SPI1_MOSI
SPI1_SPCK
ADTRG
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
PDC
Timer Counter
SPI1
TC0
PDC
PDC
TC1
TC2
ADC
ETXCK-ERXCK-EREFCK
ETXEN-ETXER
ECRS-ECOL, ECRSDV
ERXER-ERXDV
ERX0-ERX3
ETX0-ETX3
EMDC
EMDIO
EF100
TWI
CAN
DDM
DDP
PWM0
PWM1
PWM2
PWM3
TF
TK
TD
RD
RK
RF
TCLK0
TCLK1
TCLK2
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
TWD
TWCK
CANRX
CANTX
ADVREF
3-4
6195E–ATARM–22-Mar-07
AT91SAM7X-EK Evaluation Board User Guide
Board Description
3.3
AT91SAM7XC
Microcontroller
! Incorporates the ARM7TDMI® ARM® Thumb® Processor
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– EmbeddedICE™, Debug Communication Channel Support
! Internal High-speed Flash
– 256 Kbytes (AT91SAM7XC256) Organized in 1024 Pages of 256 Bytes
– 128 Kbytes (AT91SAM7XC128) Organized in 512 Pages of 256 Bytes
– Single Cycle Access at Up to 30 MHz in Worst Case Conditions
– Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
– Page Programming Time: 6 ms, Including Page Auto-erase,
Full Erase Time: 15 ms
– 10,000 Write Cycles, 10-year Data Retention Capability,
Sector Lock Capabilities, Flash Security Bit
– Fast Flash Programming Interface for High Volume Production
! Internal High-speed SRAM, Single-cycle Access at Maximum Speed
– 64 Kbytes (AT91SAM7XC256)
– 32 Kbytes (AT91SAM7XC128)
! Memory Controller (MC)
– Embedded Flash Controller, Abort Status and Misalignment Detection
! Reset Controller (RSTC)
– Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout
Detector
– Provides External Reset Signal Shaping and Reset Source Status
! Clock Generator (CKGR)
– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
! Power Management Controller (PMC)
– Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz)
and Idle Mode
– Four Programmable External Clock Signals
! Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Two External Interrupt Sources and One Fast Interrupt Source, Spurious
Interrupt Protected
! Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel interrupt,
Programmable ICE Access Prevention
! Periodic Interval Timer (PIT)
– 20-bit Programmable Counter plus 12-bit Interval Counter
! Windowed Watchdog (WDT)
AT91SAM7X-EK Evaluation Board User Guide
3-5
6195E–ATARM–22-Mar-07
Board Description
– 12-bit key-protected Programmable Counter
– Provides Reset or Interrupt Signals to the System
– Counter May Be Stopped While the Processor is in Debug State or in Idle
Mode
! Real-time Timer (RTT)
– 32-bit Free-running Counter with Alarm
– Runs Off the Internal RC Oscillator
! Two Parallel Input/Output Controllers (PIO)
– Sixty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous
Output
! Seventeen Peripheral DMA Controller (PDC) Channels
! One Advanced Encryption System (AES)
– 128-bit Key Algorithm, Compliant with FIPS PUB 197 Specifications
– Buffer Encryption/Decryption Capabilities with PDC
! One Triple Data Encryption System (TDES)
– Two-key or Three-key Algorithms, Compliant with FIPS PUB 46-3
Specifications
– Optimized for Triple Data Encryption Capability
! One USB 2.0 Full Speed (12 Mbits per second) Device Port
– On-chip Transceiver, 1352-byte Configurable Integrated FIFOs
! One Ethernet MAC 10/100 base-T
– Media Independent Interface (MII) or Reduced Media Independent Interface
(RMII)
– Integrated 28-byte FIFOs and Dedicated DMA Channels for Transmit and
Receive
! One Part 2.0A and Part 2.0B Compliant CAN Controller
– Eight Fully-programmable Message Object Mailboxes, 16-bit Time Stamp
Counter
! One Synchronous Serial Controller (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and
Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
! Two Universal Synchronous/Asynchronous Receiver Transmitters (USART)
– Individual Baud Rate Generator, IrDA® Infrared Modulation/Demodulation
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485
Support
– Full Modem Line Support on USART1
! Two Master/Slave Serial Peripheral Interfaces (SPI)
3-6
6195E–ATARM–22-Mar-07
AT91SAM7X-EK Evaluation Board User Guide
Board Description
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
! One Three-channel 16-bit Timer/Counter (TC)
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
! One Four-channel 16-bit Power Width Modulation Controller (PWMC)
! One Two-wire Interface (TWI)
– Master Mode Support Only, All Two-wire Atmel EEPROMs Supported
! One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with
Digital I/Os
! SAM-BA™ Boot Assistance
– Default Boot program
– Interface with SAM-BA Graphic User Interface
! IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins
! 5V-tolerant I/Os, Including Four High-current Drive I/O lines, Up to 16 mA Each
! Power Supplies
– Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External
Components
– 3.3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash
Power Supply
– 1.8V VDDCORE Core Power Supply with Brownout Detector
! Fully Static Operation: Up to 55 MHz at 1.65V and 85° C Worst Case Conditions
! Available in a 100-lead LQFP Green Package
3.4
AT91SAM7XC
Export
Regulations
Statement
These commodities, technology or software will be exported from France and the applicable Export Administration Regulations will apply. French, United States and other
relevant laws, regulations and requirements regarding the export of products may
restrict sale, export and re-export of these products; please assure you conduct your
activities in accordance with the applicable relevant export regulations.
AT91SAM7X-EK Evaluation Board User Guide
3-7
6195E–ATARM–22-Mar-07
Board Description
3.5
AT91SAM7XC
Block Diagram
Figure 3-2. Block Diagram
TDI
TDO
TMS
TCK
ICE
JTAG
SCAN
ARM7TDMI
Processor
JTAGSEL
1.8 V
Voltage
Regulator
System Controller
TST
FIQ
VDDCORE
AIC
DRXD
DTXD
VDDIO
Memory Controller
PIO
IRQ0-IRQ1
DBGU
VDDIN
GND
VDDOUT
PDC
SRAM
Embedded
Flash
Controller
Address
Decoder
Abort
Status
Misalignment
Detection
64/32 Kbytes
PDC
PCK0-PCK3
PLLRC
PLL
XIN
XOUT
OSC
VDDCORE
Peripheral Bridge
ROM
Peripheral DMA
Controller
BOD
POR
ERASE
256/128 Kbytes
PMC
RCOSC
VDDCORE
VDDFLASH
VDDFLASH
Flash
Reset
Controller
PGMRDY
PGMNVALID
PGMNOE
PGMCK
PGMM0-PGMM3
PGMD0-PGMD15
PGMNCMD
PGMEN0-PGMEN1
Fast Flash
Programming
Interface
17 Channels
NRST
PIT
APB
SAM-BA
WDT
RTT
DMA
FIFO
PIOB
PIO
PIOA
Ethernet MAC 10/100
PDC
USART0
PDC
PDC
USB Device
USART1
PDC
Transceiver
VDDFLASH
FIFO
PWMC
PDC
PIO
PDC
SPI0
SSC
PDC
PDC
PIO
RXD0
TXD0
SCK0
RTS0
CTS0
RXD1
TXD1
SCK1
RTS1
CTS1
DCD1
DSR1
DTR1
RI1
SPI0_NPCS0
SPI0_NPCS1
SPI0_NPCS2
SPI0_NPCS3
SPI0_MISO
SPI0_MOSI
SPI0_SPCK
SPI1_NPCS0
SPI1_NPCS1
SPI1_NPCS2
SPI1_NPCS3
SPI1_MISO
SPI1_MOSI
SPI1_SPCK
ADTRG
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
ETXCK-ERXCK-EREFCK
ETXEN-ETXER
ECRS-ECOL, ECRSDV
ERXER-ERXDV
ERX0-ERX3
ETX0-ETX3
EMDC
EMDIO
EF100
PDC
Timer Counter
SPI1
TC0
PDC
PDC
TC1
TC2
TWI
ADC
CAN
DDM
DDP
PWM0
PWM1
PWM2
PWM3
TF
TK
TD
RD
RK
RF
TCLK0
TCLK1
TCLK2
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
TWD
TWCK
CANRX
CANTX
PDC
ADVREF
AES 128
PDC
PDC
TDES
PDC
3-8
6195E–ATARM–22-Mar-07
AT91SAM7X-EK Evaluation Board User Guide
Board Description
3.6
Memory
! 256 Kbytes of Internal High-speed Flash
! 64 Kbytes of Internal High-speed SRAM
! Atmel serial DataFlash®
! One footprint for Atmel Serial EEPROM memory. The user can fit an AT24C128AN or
AT24C256AN or AT24C512AN in 8S1 package as well as a cryptomemory
AT88C25616C-SI
3.7
Clock Circuitry
! 18.432 MHz standard crystal for the embedded oscillator
! 32 KHz internal RC oscillator
3.8
Reset Circuitry
! Internal reset controller with a bidirectional reset pin
! External reset pushbutton
3.9
Power Supply
Circuitry
! USB powered, the dynamic power consumption on VDDCORE is less than 90 mA at
full speed when running out of the Flash. The total current at power-up is less than
100 mA.
! External power can be applied via USB Power adapter 5V 0.5A with USB A/B cable
! On-chip embedded VDDCORE 1.8V regulator
! On-board 3.3V 400 mA linear regulator
3.10
Remote
Communication
! One Serial interface (DBGU COM Port) via RS-232 DB9 male socket
! One Serial interface (RS232 COM Port) via RS-232 DB9 male socket
! USB V2.0 Full-speed compliant, 12 Mbits per second (UDP)
! One CAN 2.0B communication port via the 3-position printed circuit terminal block
! One MII Ethernet 100-base TX (auto MDI/MDI-X crossover cable)
3.11
Analog Interface
! One selectable 0.2% 3.00V Vref or 3.3V ANA
! One 3-position printed circuit terminal block
! Two analog up to Vref inputs. One external user input and one back-looped with
buffered PWM3 output.
! One buffered PWM3 analog output (up to Vref)
3.12
User Interface
! One 5-way joystick (4 directions and push for confirmation)
! Four general-purpose buffered green user LEDs (PWM controlled)
AT91SAM7X-EK Evaluation Board User Guide
3-9
6195E–ATARM–22-Mar-07
Board Description
! One yellow power LED (can also be software controlled)
3.13
Debug Interface
! 20-pin JTAG/ICE interface connector
! DBGU serial RS232 COM Port
3.14
Expansion Slot
! One DataFlash card slot
! All I/Os of the AT91SAM7X and the AT91SAM7XC are routed to peripheral extension
connectors (J16). This allows the developer to check the integrity of the components
and to extend the features of the board by adding external hardware components or
boards.
3-10
6195E–ATARM–22-Mar-07
AT91SAM7X-EK Evaluation Board User Guide
Section 4
Configuration Straps
4.1
Configuration
Straps
Table 4-1. Configuration Jumpers and Straps
Designation
Default
Setting
J8
Opened
Erases all internal Flash memory when the board is
powered. To do that, the user will have to close the J8 at
least 200 ms.
J9
Opened
Do not use: Factory test mode. J9 is not populated
J10
Opened
Selects ICE mode or JTAG mode (Closed). J10 is not
populated.
J11
Closed
VDDIN Jumper (1)
J12
Closed
VDDFLASH Jumper(1)
J13
1-2
J14
Closed
VDDCORE Jumper (1)
J15
Closed
VDDIO Jumper (1)
J17
Opened
External XIN clock input.
S4 and S5 must be open.
J17 is not populated.
J18
Closed
VDDPLL Jumper (1)
J19
Closed
Enables the use of the NPCS00 (PA12).
J21
Closed
Enables 120 ohms CAN bus resistance termination.
J28
Closed
Enables Ethernet Auto MDIX control.
S1
Closed
Enables permanent pull up on USB DP.
S2
Closed
The System Reset signal (NRST) is connected to the
ICE/JTAG socket (J7, pin 15).
S3
Opened
Disables 5V (VUSB) power supply on J16 extension
connector.
AT91SAM7X-EK Evaluation Board User Guide
Feature
ADVREF Jumper select
1-2: 3.00V Voltage reference
2-3: VDDANA
4-1
6195E–ATARM–22-Mar-07
Configuration Straps
Table 4-1. Configuration Jumpers and Straps (Continued)
Designation
Default
Setting
S4 - S5
Closed
Enables the use of 18.432MHz crystal. Must be open if an
external clock is used.
S6
Closed
Enables the Power Led control (PB25).
S7
Opened
Disables Serial DataFlash write protect.
S8
Closed
Enables the use of the TXD CAN transceiver (PA20)
S9
Closed
Enables the use of the RXD CAN transceiver (PA19)
S10
Closed
Enables control of the Standby/Normal mode for CAN
transceivers (PA2)
S11
Opened
Enables control of the Standby/Normal mode for CAN
transceivers (PA2).
If S11 is closed, S10 must be open.
S12
Closed
Enables the use of PWM3 Analog Output (PB30)
S13
Closed
Enables the use of the TXD0 signal (PA1)
S14
Closed
Enables the use of the RTS0 signal (PA3)
S15
Closed
Enables the use of the RXD0 signal (PA0)
S16
Closed
Enables the use of the CTS0 signal (PA4)
S17
Closed
Enables the use of the User LED DS1 (PB19)
S18
Closed
Enables the use of the User LED DS2 (PB20)
S19
Closed
Enables the use of the User LED DS3 (PB21)
S20
Closed
Enables the use of the User LED DS4 (PB22)
S21
Closed
Enables the use of the DBGU TXD signal (PA28)
S22
Closed
Enables the use of the DBGU RXD signal (PA27)
S23
Opened
S24
Closed
S25
Opened
S26
Closed
S27
Opened
Reserved
S28
Closed
Enables the use of the SCL of MN11 (PA11)
S29
Closed
Enables the use of the SDA of MN11 (PA10)
TP1
N.A
GND Test point.
TP2
N.A
GND Test point.
Note:
4-2
6195E–ATARM–22-Mar-07
Feature
ETHERNET MII is the default mode. To evaluate the RMII
mode, the user change S23 to S26 configuration in the
following way: S23 Closed, S24 Opened, S25 Closed, S26
Opened
1. These jumpers are provided for measuring power consumption. By default, they are
closed. To use this feature, the user has to open the strap and insert an anmeter.
AT91SAM7X-EK Evaluation Board User Guide
Section 5
Schematics
5.1
Schematics
This section contains the following schematics:
! Processor Board
! I/O
! Ethernet
! RF modules
AT91SAM7X-EK Evaluation Board User Guide
5-1
6195E–ATARM–22-Mar-07
8
7
6
5
4
3
2
3V3
1
JTAG INTERFACE
MANUAL RESET
USB DEVICE INTERFACE
3V3
8
7
6
5
S1
Closed by 0R resistor
3V3
J6
BP2
6
RR1
100K
1
J7
1
2
3
4
USB B
1
2
4
3
5
D
6
2
3V3
4
5
3V3
J10
J9
J8
3
1
3
5
7
9
11
13
15
17
19
3V3
DNP
MN1
USBUF02W6
S2
3V3
2
4
6
8
10
12
14
16
18
20
D
3V3
NRST
J11
3V3_ADC
C2
100NF
10V
3
2
1
C1
10µF
J13
J12
EN
NR
J15
5
4
15
37
62
87
3V3
3V3
C14
C15
C16
C17
C18
C19 C20
1µF 1µF
100NF
100NF
100NF
100NF
100NF
C21
10NF
TP1
S4
C22 10pF
5V
J17
2
4
R4
470R
Y1
18.432MHz
C23 10pF
DS5
YELLOW
VDDOUT1V8
J18
C25
17
33
48
61
84
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
2
16
32
52
68
83
96
GND
GND
GND
GND
GND
GND
GND
98
XOUT
97
XIN
100
R5
1.5K
PLLRC
10NF
PB25
1
77
76
79
78
51
57
58
92
95
JTAGSEL
TDO
TCK
TMS
TDI
NRST
TST
ERASE
VDDFLASH
6
5
4
3
GND
2
C5
100NF
EN
3
R1
VIN
AT91SAM7X256
AT91SAM7XC256
3V3
0R
LM4120AIM5-3.0
GND_ADC
VREF
1K
AD7
AD6
RSSI
C13
10NF
AD5
AD4
12
11
10
9
72
71
70
69
67
66
65
64
63
36
53
35
29
30
39
45
44
27
28
38
31
34
54
43
42
41
40
C
5V
S3
PB30
PB29
PB28
PB27
PB26
PB25
PB24
PB23
PB22
PB21
PB20
PB19
PB18
PB17
PB16
PB15
PB14
PB13
PB12
PB11
PB10
PB9
PB8
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
RXD0
TXD0
SCK0
RTS0
CTS0
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
TWD
PA10
TWCK
PA11
SPI0_NPCS0 PA12
SPI0_NPCS1 PA13
PA14
PA15
SPI0_MISO PA16
SPI0_MOSI PA17
SPI0_SPCK PA18
PA19
PA20
TF
PA21
TK
PA22
TD
PA23
RD
PA24
RK
PA25
RF
PA26
PA27
PA28
PA29
IRQ0
PA30
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
TIOA0
TIOB0
PWM0
PWM1
PCK1
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
J16A
C1
C2
RXD0
C3
TXD0
C4
SCK0
C5
RTS0
C6
CTS0
C7
SPI0_MISO C8
SPI0_MOSI C9
SPI0_SPCK C10
SPI0_NPCS0C11
SPI0_NPCS1C12
TWD
C13
TWCK C14
TF
C15
TK
C16
TD
C17
RD
C18
RK
C19
RF
C20
TIOA0 C21
TIOB0 C22
PCK1 C23
IRQ0 C24
PWM0 C25
PWM1 C26
C27
GND_ADC
C28
AD6
C29
AD7
C30
C31
3V3
C32
J16B
TP2
USART
SPI
TWI
SCC
TIMER
PCK
IRQ
PWM
RESERVED
B
ADC
J16C
PB[0..30]
81
82
86
85
88
89
90
91
13
14
18
19
20
21
22
23
24
25
26
46
47
49
50
55
56
59
60
73
74
75
80
S6
POWER LED
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
2
AD7
AD6
AD5
AD4
AD3/PWM3/PCK2/PB30
AD2/PWM2/PCK1/PB29
AD1/PWM1/TIOB2/PB28
AD0/PWM0/TIOA2/PB27
RI1/TIOB1/PB26
DTR1/TIOA1/PB25
DSR1/TIOB0/PB24
DCD1/TIOA0/PB23
PCK2/PWM3/PB22
PCK1/PWM2/PB21
PCK0/PWM1/PB20
TCLK1/PWM0/PB19
ADTRG/EF100/PB18
SPI0_NPCS3/ERXCK/PB17
SPI1_NPCS3/ECOL/PB16
ERXDV/ECRSDV/PB15
SPI0_NPCS2/ERX3/PB14
SPI0_NPCS1/ERX2/PB13
TCLK0/ETXER/PB12
SPI1_NPCS2/ETX3/PB11
SPI1_NPCS1/ETX2/PB10
EMDIO/PB9
EMDC/PB8
ERXER/PB7
ERX1/PB6
ERX0/PB5
ECRS/PB4
ETX1/PB3
ETX0/PB2
ETXEN/PB1
PCK0/EREFCK_ETXCK/PB0
VDDPLL
R6
100K
3
1
1
R3
C24
100NF
99
ADVREF
VOUT REF
3V3_ADC
C6
GND_ADC 10µF
10V
C7
22NF
VDDCORE
VDDCORE
VDDCORE
VDDCORE
1NF
3V3
C26
Q1
Si2302BDS
VDDOUT
1
3
5
SMB
NOT POPULATED
B
S5
DDP
DDM
7
PA0/RXD0
PA1/TXD0
PA2/SCK0/SPI1_NPCS1
PA3/RTS0/SPI1_NPCS2
PA4/CTS0/SPI1_NPCS3
PA5/RXD1
PA6/TXD1
PA7/SCK1/SPI0_NPCS1
PA8/RTS1/SPI0_NPCS2
PA9/CTS1/SPI0_NPCS3
PA10/TWD
PA11/TWCK
PA12/SPI0_NPCS0
PA13/SPI0_NPCS1/PCK1
PA14/SPI0_NPCS2/IRQ1
PA15/SPI0_NPCS3/TCLK2
PA16/SPI0_MISO
PA17/SPI0_MOSI
PA18/SPI0_SPCK
PA19/CANRX
PA20/CANTX
PA21/TF/SPI1_NPCS0
PA22/TK/SPI1_SPCK
PA23/TD/SPI1_MOSI
PA24/RD/SPI1_MISO
PA25/RK/SPI1_NPCS1
PA26/RF/SPI1_NPCS2
PA27/DRXD/PCK3
PA28/DTXD
PA29/FIQ/SPI1_NPCS3
PA30/IRQ0/PCK2
G
GND
OUT
3
IN
2
1
C
VDDIN
6
J14
C8 10µF 10V
C9
100NF
C10 100NF
C11 100NF
C12 100NF
C4
22NF
4
MN4
TPS73633
R2
0R
94
93
8
VDDOUT1V8
C3
100NF
4.7µH
MN2
5
5V
L1
3V3_ADC
3.00V +- 0.2%
PA[0..30]
3V3
DATAFLASH CARD SOCKET
J30
8
7
6
5
4
3
2
1
9
ADHESIVE FEET
A
Z7
Z8
Z9
11.1
11.1
11.1
DATAFLASH MEMORY
Z10
11.1
SPI0_MISO
SPI0_SPCK
PA16
PA18
3V3
SPI0_MOSI
PA17
SPI0_NPCS1 PA13
SPI0_MISO
SPI0_MOSI
SPI0_SPCK
SPI0_NPCS0
R7
C63
100NF
8
1
2
4
SO
SI
SCK
CS
3
RESET
J19
3V3
FPS009
3V3
MN5
PA16
PA17
PA18
PA12
VCC
6
GND
7
WP
5
100K
NRST
C27
100NF
R38
10K
SERIAL EEPROM
R39
10K
MN11
1
2
3
7
A0
A1
NC
WP
SCL
SDA
6
5
VCC
8
GND
4
S28
A
PA11
PA10
S29
3V3
C
B
A INIT EDIT
C62
100NF
REV
S7
WRITE PROTECT
AT91SAM7X-EK
AT91SAM7XC-EK
NOT POPULATED
MODIF.
SCALE
JPG
JPG
JPG
14/12/05
30/09/05
13/09/05
DES.
DATE
1/1
PROCESSOR BOARD
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
8
7
6
5
4
3
2
1
VER.
DATE
REV.
SHEET
C
1
4
8
7
6
5
4
3
2
1
3V3
PA[0..30]
R40
100K
R41
10K
MN6
TXD
CAN
J20
7
R8
120
1
2
RXD
4
RS
8
VREF
5
VCC
3
CANH
S9
PA20
PA19
D
J21
3
6
S10
C29
10µF
10V
R42 0R
5V
S11
CANL
GND
PA2
3V3
2
R43
NOT POPULATED
TJA1050T
C28
100NF
GND_ADC
Q2
Si2301BDS
3
1
PB30
S12
16
C32
100NF
C
15
GND
2 V+
C34
100NF
RXD
RTS
TXD
CTS
1
C33
100NF
100K
C1C2+
3
4
C2-
5
1K
3 +
C31
1µF
1
2 -
GND_ADC
2
GND_ADC
C
C35
100NF
AD5
C36 100NF
C37
100NF
6 V14
T
7
T
13
R13
100K
R14
100K
11
TXD0
10
RTS0
RXD0
12
R
3V3_ADC
10
11
C1+
R11
Q3
Si2302BDS
1
3V3
RS232 COM PORT
1
6
2
7
3
8
4
9
5
VCC
MN7A
AD8030AR
1K
R10 6,20K 1%
R12
3V3
MN8
R9
PWM3
3
3V3
1µF
C30
VREF
2
D
S8
1
8
CTS0
9
R
S13
S14
S15
S16
GND_ADC
J26
PA1
PA3
AD4
MN7B
AD8030AR
7
PA0
C38
8
+
5
-
6
10µF
1
I/O ANALOG
2
R15 1K
4
CONNECTOR
3
C39
100NF
PA4
GND_ADC
GND_ADC
GND_ADC
J24
ADM3202ARN
PB[0..30]
MALE RIGHT ANGLED
3V3
S17
R16
180R
GREEN
DS1
PB19
B
B
PA24
PA21
S18
3V3
C40
100NF
SERIAL DEBUG PORT
1
6
2
7
3
8
4
9
5
VCC
C1+
GND
C1C2+
2 V+
1
6 V-
TXD
DS2
BP1
1
PA23 LEFT 2
PA25 PUSH 3
3
4
C43
100NF
S19
C2-
14
T
7
T
R19
180R
GREEN
DS3
PA22
5
DBGU_TXD
11
4 UP
5 RIGHT
6 DOWN
JOYSTICK
PB21
S21
PA28
10
S22
13
R
12
8
R
9
DBGU_RXD
S20
PA27
R20
180R
GREEN
DS4
PB22
10
11
GREEN
C41
100NF
R18
100K
C44
100NF
180R
3V3
15
C42
100NF
RXD
16
R17
PB20
MN9
USER INTERFACE
J25
ADM3202ARN
A
A
MALE RIGHT ANGLED
C
B
A INIT EDIT
REV
AT91SAM7X-EK
AT91SAM7XC-EK
MODIF.
SCALE
JPG
JPG
JPG
14/12/05
30/09/05
13/09/05
DES.
DATE
1/1
I/O
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
8
7
6
5
4
3
2
1
VER.
DATE
REV.
SHEET
C
2
4
8
7
6
5
4
3
2
1
3V3
3V3
R21
D
10K
Y2
1 OE
D
VDD 4
C45
100NF
50 MHz
2 VSS
OUT 3
MII Factory setting
SG-8002JC-50.0000M-PCB
C46
22PF
PB[0..30]
Closed by 0R resistor
Cut
S23
REF_CLK/XT2
17
18
19
20
21
22
TXD3
TXD2
TXD1
TXD0
TX_EN
TX_CLK/ISOLATE
ETX3
ETX2
ETX1
ETX0
ETXEN
PB14
PB13
PB6
PB5
ERX3
ERX2
ERX1
ERX0
26
27
28
29
RXD3/PHYAD3
RXD2/PHYAD2
RXD1/PHYAD1
RXD0/PHYAD0
PB17
PB15
ERXCK
ERXDV
34
37
RX_CLK/10BTSER
RX_DV/TESTMODE
PB12
PB7
ETXER
ERXER
16
38
TX_ER/TXD4
RX_ER/RXD4/RPTR
PB16
PB4
ECOL
ECRS
36
35
COL/RMII
CRS/PHYAD4
PB8
PB9
PB26
S26
EMDC
EMDIO
IRQ
R26
10K
3V3
24
25
32
MDC
MDIO
MDINTR
39
DISMDIX
R27 10K
C54
100NF
C55
100NF
C56
100NF
41
PB18
NRST
DVDD
DVDD
15
33
44
DGND
DGND
DGND
10
PWRDWN
40
RESET
J27
1 TD+
TX+
1
TX-
8
2 TD-
TX-
2
RX+
3
3 RD+
RX+
3
RX-
6
5 CT
RX-
4
AVDDR
1
AVDDR
2
6 RDL2
C49
100NF
C51
100NF
VCCA
AVDDT
9
AGND
AGND
AGND
5
6
46
BGRESG
47
BGRES
LEDMODE
LED0/OP0
LED1/OP1
LED2/OP2
CABLESTS/LINKSTS
48
31
11
12
13
14
N.C
45
NOT POPULATED
L3
R33 0R
7
R23
49R9
1%
742792093
VCCA
C50
10V
10µF
R24
49R9
1%
R25
49R9
1%
75
75
75
7 NC
4
5
1nF
C52
100NF
C53
100NF
75
8
7
8
J00-0061
RJ45 ETHERNET CONNECTOR
R28
6,80K 1%
23
C57
10µF
10V
TX+
R22
49R9
1%
C
DVDD
3V3
43
DM9161AE
30
B
XT1
4 CT
3V3
J28
100NF
16
42
PB11
PB10
PB3
PB2
PB1
Closed by 0R resistor
C48
2
MN10
Cut
REFCK
S25
C
1
S24
C47
22PF
15
PB0
Y3
25MHz
C58
100NF
R30 10K
DS6
YELLOW FULL DUPLEX
DS7
GREEN SPEED 100
R31 1K
3V3
DS8
GREEN
R32 1K
R29 1K
3V3
B
LINK&ACT
VCCA
4.7µH
C59
10µF
10V
C60
100NF
R34 0R
A
A
C
B
A INIT EDIT
REV
AT91SAM7X-EK
AT91SAM7XC-EK
MODIF.
SCALE
JPG
JPG
JPG
14/12/05
30/09/05
13/09/05
DES.
DATE
1/1
ETHERNET
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
8
7
6
5
4
3
2
1
VER.
DATE
REV.
SHEET
C
3
4
8
7
6
5
4
3
ATR2406 2.4 GHz RF CONNECTORS MODULE
2
1
USER'S GRID AERA
Y4 SG-8002JC-13.8240M-PCB
R35
10K
1 OE
D
3V3
3V3
VDD 4
5V
D
13.824 MHz
2 VSS
1.27 PITCH
C61
100NF
OUT 3
R36
0R
RSSI
R37
0R
3V3
PA[0..30]
5V
27
25 REF_CLK
23
21
19
17
15
13
11
9
7
5
3
1
S27
GPIO
SPI0_SPCK
GPIO
TXD1
GPIO
PA26
PA18
PA8
PA6
PA14
RX_ON
CLOCK
PU_TRX
TX_DATA
TX_ON
SPI0_NPCS3
SPI0_MOSI
GPIO
GPIO
SCK1
RXD1
GPIO/PCK2
PA15
PA17
PA29
PA9
PA7
PA5
PA30
ENABLE
DATA
nOLE
PU_REG
RX-CLOCK
RX_DATA
OSC REMOTE OR REF_CLK
2.54 PITCH
J29
28
26
24
22
20
18
16
14
12
10
8
6
4
2
3V3
C
C
NOT POPULATED
AT86RF210 ZIGBEE CONNECTORS MODULE
PA[0..30]
3V3
J5
J4
RX
PA26
GPIO
2
4
6
8
10
1
3
5
7
9
GPIO
PA14
SPI0_NPCS3PA15
SPI0_SPCK PA18
SPI0_MOSI PA17
SPI0_MISO PA16
TX
SEL
SCLK
SDI
SDO
CHIP_READY
RX_DATA_CLK
RX_DATA
TX_DATA
PA9
PA7
PA5
PA6
GPIO
SCK1
RXD1
TXD1
9
7
5
3
1
10
8
6
4
2
GPIO
GPIO
PA29
PA8
CCA
START
NOT POPULATED
B
B
AT86RF230 CONNECTORS MODULE
PA[0..30]
FIQ
SPI0_NPCS3
SPI0_MOSI
SPI0_MISO
SPI0_SPCK
GPIO
GPIO
PA29
PA15
PA17
PA16
PA18
PA8
PA9
IRQ
SEL
MOSI
MISO
SCLK
SLP_TR
RSTN
3V3
J31
27
25
23
21
19
17
15
13
11
9
7
5
3
1
C64
100NF
28
26
24
22
20
18
16
14
12
10
8
6
4
2
16 MHz CLOCK
3V3
3V3
3V3
C65
100NF
A
A
NOT POPULATED
C
B
A INIT EDIT
REV
AT91SAM7X-EK
AT91SAM7XC-EK
MODIF.
SCALE
JPG
JPG
JPG
14/12/05
30/09/05
13/09/05
DES.
DATE
1/1
RF MODULES
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
8
7
6
5
4
3
2
1
VER.
DATE
REV.
SHEET
C
4
4
Schematics
5-2
6195E–ATARM–22-Mar-07
AT91SAM7X-EK Evaluation Board User Guide
Section 6
Errata
6.1
DM9161A
Ethernet Phy
Connections
The Ethernet interface works as presented in the schematics, but the connections are
not in compliance with Davicom recommendations.
To comply with Davicom recommendations on connecting this device, J27-4 and J27-5
(RJ45 connector, CT) should be connected to the VCCA side of L2. In the current schematics (ETHERNET, Sheet 3/4), the VCCA side of L2 is connected to MN10-1 and
MN10-2 (DM9161A, AVDDR).
For additional information, refer to the Davicom datasheet for DM9161A and associated
Application Notes available on http://www.davicom.com.tw/.
6.2
TWI line pullups
for Fast Mode
operation
In order to use the TWI in Fast Mode (up to 400 Kbits/s), the default 10 KΩ resistors R38
and R39 should be replaced by smaller values (e.g., 2.2 KΩ).
Note that there is no need to change the pull-up resistors if the TWI is used in Standard
Mode (up to 100 Kbits/s).
AT91SAM7X-EK Evaluation Board User Guide
6-1
6195E–ATARM–22-Mar-07
Errata
6-2
6195E–ATARM–22-Mar-07
AT91SAM7X-EK Evaluation Board User Guide
Section 7
Revision History
7.1
Revision History
Table 7-1. Change History
Change Request
Ref.
Document
Comments
6195A
First issue.
6195B
Updated Figure 2-3 with new signal names. Updated document to show new product
functionalities. New board block diagram and schematics issued.
6195C
Updated document to contain new product AT91SAM7XC.
Added new section with Errata.
6195D
Removed references to 32 Mbit serial DataFlash (AT45DB321C-CNC) in Section 1.3
and in Section 3.6. Inserted new Figure 2-3 and new schematics in Section 5.
2862
6195E
Added Errata Section 6.2 ”TWI line pullups for Fast Mode operation”
4084
AT91SAM7X-EK Evaluation Board User Guide
05-430
7-1
6195E–ATARM–22-Mar-07
Revision History
7-2
6195E–ATARM–22-Mar-07
AT91SAM7X-EK Evaluation Board User Guide
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