AN AC CONVERTER WITH A SMALL DC LINK CAPACITOR FOR A 15KW
PERMANENT MAGNET SYNCHRONOUS INTEGRAL MOTOR
K Kretschmar, H-P Nee
KTH, Royal Institute of Technology, Sweden
Abstract An AC converter designed to feed a permanent magnet synchronous motor with a rated
power of 15 kW is investigated in this paper. The
converter consists of a diode rectifier, a small DC link
capacitor and an inverter, which is controlled by an
open loop pulse width modulation system (PWM).
The circuit is simulated and the simulation results
are analyzed and verified by measurements. Due to
the small capacitor, special emphasis is put on the
analysis of the DC link voltage. The paper also includes an analytical expression of the ripple of the
DC link voltage.
INTRODUCTION
Today the most frequently used electrical AC motor
in the industry is the standard induction motor, both
in number of units and installed kilowatts. Although
the market is still dominated by mains-connected
motors, the rapid development of power electronics
has created new possibilities to increase the number
of variable-speed drives. Inverter-fed AC motors are
the state of the art in the field of industrial drives.
Especially the introduction of Insulated Gate Bipolar Transistors (IGBT) for voltage source inverters
(VSI) has had an impact on the market. The reason
for this is the capability of converting power at both
high efficiency and high switching frequency.
The trend to an increased integration level leads
to the demand for very compact inverter solutions.
The aim is to design the converter in such a way, that
it can be integrated into the motor (integral motor).
A problem in this respect is the DC link capacitor in
an AC converter. Today’s mostly used electrolytic
capacitors are large, expensive and have a short expected life time in comparison to the semiconductors. Decreasing the capacitor size would lead to an
increase of the ripple current per unit volume. This
implies higher loss density and it may cause a breakdown of the capacitor. Foil capacitors might be a
reasonable alternative due to their low losses. Most
promising is however the metallized polypropylene
film (MKP) capacitor [2]. An MKP capacitor permits a much higher AC current component and thus
a smaller capacitor size is required. Another essential advantage of the MKP capacitor is the long life
expectancy compared to any other type of capacitor. The open question is how large the ripple in the
DC link voltage will be, depending on various design
parameters.
A permanent magnet motor can be designed to
have roughly half of the losses of an induction motor
mainly due to the removal of the active current in the
rotor [1]. Due to the reduced losses the motor can
also be made more compact in size. The combination
of a compact permanent magnet synchronous motor
and a compact inverter with almost no DC link is
therefore considered to be a very good choice.
SIMULATIONS
The converter system was simulated with the simulation software-package called PSCAD/EMTDC from
the Canadian company Manitoba HVDC Research
Centre.
The converter consists of a three phase line commutated diode rectifier, the DC bus and an inverter,
which is controlled by an open loop pulse width modulation system (PWM). The input of the rectifier is
connected to the mains and the inverter output is
connected to a series connection of an inductance
and an EMF, which represents the 15 kW permanent magnet motor. Special emphasis is put on the
examination of the DC link voltage characteristics.
The purpose is to find the smallest capacitor size,
which limits the ripple in this voltage to an acceptable deviation of the mean DC link voltage. Figure 1
shows the whole converter system as it is modelled
in EMTDC. The upper part of the figure displays
the converter itself whereas the lower part shows the
PWM system. The inductance of 100 µH between
the mains and the rectifier input simulates a three
phase cable with an approximate length of 300 m.
If the DC link current is continuous where U is the
RMS value of the line-to-line voltage of the mains the
mean value of the DC link voltage will become
√
3 2
U = 1.35 U .
(1)
Udc =
π
In order to obtain the desired pulses for the switches
of the inverter, a triangle wave with a frequency of
fSW = 6 kHz was compared with three sinusoidal
reference waves, one for each phase [3]. The modulaÛ
tion ratio m = Ûref erence was chosen to 0.9. Considtriangle
ering a sinusoidal three phase output, the root mean
square of the fundamental component of the line-toline output voltage of the inverter can be expressed
50
100E-9
D
0.001
B
0.001
C
D
G
D
G
D
G
D
D
0.0024
100E-6
10
A
100E-9
100E-6
0.0024
0.0024
100E-6
0.001
25
A
0.25
B
0.25
C
1
1
1
0.25
D
G
D
G
D
G
D
D
A
D
A
0
Comparator
B
-240
A
Phase
Mag
Freq
-25
A
A
Phase
72
Comparator
B
Comparator
B
Sin
-120
0.9
0.9
Mag
Sin
Freq
A
Phase
72
Comparator
B
Comparator
B
0
A
0.9
Mag
Sin
Comparator
B
Freq
-50
0.16
72
Royal Institute of Technology
conv10uFsyntest
Created:
Last Modified:
Printed On:
June 26, 1996 (es95-45)
March 17, 1998 (karsten)
March 17, 1998 (karsten)
0.167
0.174
0.181
0.188
0.195
s
SS 1
Figure 1: Schematic diagram of the considered system
Figure 3: Inverter output current
ANALYTICAL EVALUATION OF THE DC
LINK VOLTAGE
700
650
V
600
550
500
450
400
0.16
0.165
0.17
0.175
0.18
s
Figure 2: Typical simulated instantaneous value of
the DC link voltage.
fSW = 6 kHz, fout = 72 Hz
as
Ul−l
√
3 Udc
= m√
= 0.612 m Udc .
2 2
(2)
A typical simulated instantaneous value of the DC
link voltage is shown in Figure 2. The ripple consists of two components – one produced by the rectifier and one produced by the inverter which will be
discussed in the next Section. If the size of the capacitor is changed, the ripple in the DC link voltage
will be changed. The maximum peak-to-peak voltage has a substantial decrease between the capacitor
sizes 1 µF and 10 µF and remains almost constant
for larger capacitor values, which can be seen in Figure 5. Using a capacitor of 10µF leads to a peak to
peak voltage ripple of ∆Udc = 290 V.
The inverter output current is very close to the sinusoidal waveform, even though no closed loop control was used. A typical waveform of this current in
one phase is shown is Figure 3. It consists mainly
of the desired fundamental frequency (fout = 72 Hz),
superimposed with small ripples caused by the high
frequency inverter pulses.
The basic idea of this analysis originated from observation of the instantaneous DC link voltage (Figure 2) obtained from the simulations [4]. The voltage
is a composition of the rectifier output voltage having a dominant frequency of 6 · 50 = 300 Hz, superimposed with the ripple caused by the pulse width
modulation of the inverter.
The peak-to-peak ripple in the DC link voltage
caused by the rectifier can be calculated from,
r
√
3
∆UR = 2 U −
U
(3)
2
assuming that U is the line-to-line rectifier input
voltage [5].
To get an analytical expression of the DC link voltage ripple caused by the inverter, the instantaneous
power flowing into the DC link was compared with
the instantaneous power flowing out of it during one
switching interval. The phase output voltages of
the inverter consist only of two distinct levels, either + U2dc or − U2dc , with respect to the midpoint of
the DC link voltage. Ud is the mean DC link voltage, which is assumed to be constant in this analysis.
The duration of the pulse, where the phase voltage
has the negative value − U2dc , named tp , depends on
the instantaneous value of the sinusoidal reference
wave for each phase. The analytical relation between
tp and the desired instantaneous value of a certain
output phase voltage, ui , can be written as
¶
µ
2ui
TSW
.
(4)
1−
tpi =
2
Udc
From this point is is possible to calculate the energy drawn from the capacitor for each section of
one switching interval TSW . Calculating the energies
Wi over the whole switching interval and dividing by
TSW , yields an average power, which gives rise to an
equivalent continuous current drawn from the capacitor. This part is the DC-part of the instantaneous
60
caused by the inverter was found to be
·
P TSW
1
3 cos ϕ+
∆UI =
12 CUdc cos ϕ
¶
µ
1
−3 m cos ϕ cos ν + π +
3
µ
¶
µ
¶
1
1
−4 cos −ν + ϕ + π sin ν + π +
3
6
µ
¶
µ
¶¸
1
1
+4 cos −ν + ϕ + π cos ν + π
(6)
3
6
V
40
20
0
-20
-40
-60
T
t pc t pb
- SW 2
2
2
-
t pa
2
0
t pa
2
t pb t pc
2
2
T
SW
2
Figure 4: Analytically calculated instantaneous
value of the DC link capacitor voltage
during one switching interval TSW
output power and must be supplied by the rectifier.
Consequently the power in the capacitor is the difference between the power drawn from the inverter
and this average power, which will be called P .
Dividing the power of each section of one switching interval by the mean value of the DC link voltage gives a good approximation of the instantaneous
current through the DC link capacitor. In order to
obtain an analytical expression of the voltage deviation caused by this current, the current has to be integrated. Calculating these voltage deviations leads
to
where ϕ is the angle between the voltage and current
and ν denotes the phase angle.
Numerical solutions to find the maximum of Equation 6 show, that for machines having a cos ϕ ≥ 0.9,
which can be assumed for permanent magnet motors,
the extreme value of ∆UI can be assumed to be at
the phase angle ν = 0 or ν = π3 . In this case this
voltage is not depending on ϕ and Equation 6 can
be simplified to
∆UI =
m−2
P
8 fSW CUdc
where P is the motor power, fSW the switching frequency of the PWM system, C the capacitance, Udc
the mean value of the DC link voltage and m the
modulation ratio.
To obtain the total peak-to-peak voltage in the DC
link the voltages ∆UI and ∆UR have to be added.
Assuming that the switching frequency of the PWM
system fSW is much larger than the rectifier input
frequency and remembering that ∆UI can be both
positive and negative, the total worst case peak to
peak DC link voltage can be described as
∆U = ∆UR + 2 | ∆UI | .
U1
=
U2
=
U3
=
U4
=
P
2CUdc
1
2CUdc
1
2CUdc
P
2CUdc
(TSW
·
P−
·
P−
tpa .
− tpc )
¸
Udc
(ia + ib − ic ) (tpc − tpb )
2
¸
Udc
(ia − ib − ic ) (tpb − tpa )
2
(7)
(8)
Equation 8 together with Equations 6 and 3 yield
a good estimation of the capacitor size required to
limit the ripple in the DC link voltage to an acceptable deviation of the mean voltage. Figure 5 shows
the DC link peak to peak voltage for different capacitor sizes both for the simulations and the analytical
results.
(5)
In order to get the deviation from the origin, in this
case 0 V the voltages U1 through U4 must be added.
A typical voltage deviation caused by the inverter
can be seen in Figure 4. During the calculation it
turned out, that
deviation from the
¢
¡ the maximum
start point U − TSW
2 = 0 , was always the voltage
t
at t = − pb
2 . According to this fact the following
calculations consider this voltage to find the worst
case. Assuming sinusoidal output currents and using
Equations 5, the deviation in the DC link capacitor
EXPERIMENTS
The experiments were carried out on an inverter provided by Atlas Copco Controls (ACC). The basic
setup was comparable to the one used in the simulations. The inverter had a rated power of 10 kW and
the capacitors forming the DC link were replaced by
a 10 µF metallized paper capacitor.
The results were obtained for an inverter output
power of 7 kW. To get a better comparison to the
simulations, an inductance of 37 µH was installed between the converter and the mains. The current and
voltage waveforms were as expected from the simulations. The results for the DC link voltage and the
1400.0
1200.0
delta U [V]
1000.0
Simulation
Analytical
800.0
600.0
400.0
200.0
0.0
0.0
50.0
100.0
Capacitor size [uF]
150.0
Figure 5: Comparison of analytically calculated and
simulated values of the peak-to-peak voltage of the DC link capacitor
rectifier input current can be seen in Figure 6. A
Fourier Analysis of this phase current came to the
result, that it consists of the fundamental frequency
and the harmonics expected. The maximum DC link
voltage ripple size was ∆Udc = 185 V under this period. From Figure 6 it can also be seen, that the
average deviation from the mean DC link voltage is
much smaller than the extreme values.
A simulation, with the parameters corresponding
to the experiments gave a ripple size of 198 V. This
can be regarded as a good agreement between the
simulations and the experiments.
The results are very promising and indicate that:
1. the simulations agree (at least principally) with
reality
2. this system can be used in various applications
which do not require a bidirectional power flow.
CONCLUSIONS
An AC converter designed to feed a permanent magnet synchronous integral motor was investigated in
this paper. The results from the simulations show a
good agreement with the experiments. The AC component of the DC link current can be handled using
a 10 µF polypropylene capacitor. This can decrease
the converter size significantly and offers the possibility of an increased integration level between the
converter and the motor. The expected life time of
the converter is also longer than for a conventional
design.
The analytically evaluated maximum ripple of the
DC link voltage gives a good first estimation of the
capacitor size required to limit the ripple of the voltage to an acceptable deviation of the mean value.
Figure 6: DC link voltage and phase current with
a separate inductance between the mains
and the input converter
ACKNOWLEDGEMENTS
ABB Corporate Research, ABB Motors, Sabroe Refrigeration, Atlas Copco Controls, ELMO Industrier,
ITT Flygt and NUTEK are greatfully acknowledged
for the financial support of the work.
REFERENCES
[1] P. Thelin:
Utveckling av en 15kW PM-integralmotor
Master’s Thesis in Swedish, Dept. of Electric
Power Engineering, Stockholm 1996
[2] Film Capacitors, Edition 1995
Siemens Matsushita Components
[3] N. Mohan, T. M. Undeland, W. P. Robbins:
Power Electronics
John Wiley & Sons, Inc. 1995, ISBN 0-47158408-8
[4] K. Kretschmar:
Power Electronics for a Permanent Magnet Synchronous Motor
Master’s Thesis, Dept. of Electric Power Engineering, Stockholm 1996
[5] K. Thorborg:
Power Electronics – in Theory and Practice
Studentlitteratur, Lund 1993, ISBN 91–44–
38091–7