Special family of PWM-based sliding-mode voltage
controllers for basic DC–DC converters in
discontinuous conduction mode
S.-C. Tan, Y.M. Lai, C.K. Tse and L. Martinez-Salamero
Abstract: A family of fixed-frequency pulsewidth-modulation-based sliding-mode voltage
controllers for DC–DC converters operating in the discontinuous conduction mode is proposed.
The proposed topology is developed for buck, boost and buck–boost converters. Preliminary
verification and evaluation of these controllers are performed through computer simulations using
precise models of the systems.
1
Introduction
DC–DC converters can operate in either continuous
conduction mode (CCM) or discontinuous conduction
mode (DCM), depending on the choice of the switching
frequency, and the relative sizes of the load and the inductive
storage. In practice, DCM operation enjoys a faster transient
response at the expense of higher device stresses. It is still a
popular operating mode for low power applications and its
practical importance should not be overlooked.
Similar to CCM converters, the regulation of DCM
converters relies mainly on conventional PWM current or
voltage controllers with compensation networks designed
from the small-signal linearised models of the converters.
Naturally, being small-signal based, they inherit the drawback of being optimal only in regions within the specified
operating condition. In operating conditions that deviate
greatly from the specified point, poor control performance
is experienced. In the case of load deviation, such
degradation in performance is typically more prominent
in DCM converters than in their CCM counterparts. This is
because output load has a greater influence on the system’s
characteristics when the converter is operated in DCM.
Hence, unlike CCM converters whereby a relatively good
load regulation can be obtained for a wide range of
operating conditions using a fixed compensation network in
the controller, the same cannot be achieved in DCM
converters. In fact, the conventional practice of using a fixed
compensation network for the control of DCM converters
is, strictly speaking, inaccurate. It is necessary to consider the
output load into the computations of the controller if good
load regulation is desired. This can be achieved through
adaptive control means whereby the compensation network
of the controller changes with the variation of the output
load. However, discounting the drawback of requiring
r The Institution of Engineering and Technology 2007
doi:10.1049/iet-epa:20060067
Paper first received 20th February and in final revised form 24th May 2006
S.-C. Tan, Y.M. Lai and C.K. Tse are with the Department of Electronic and
Information Engineering, The Hong Kong Polytechnic University, Hong Kong,
People’s Republic of China
L. Martinez-Salamero is with the Department of Electrical, Electronic and
Automatic Control Engineering, Rovira i Virgili University, Taragona, Spain
E-mail: ensctan@polyu.edu.hk
64
additional current sensing, the implementation of such
schemes is still too computationally exhaustive to be feasible.
Hence, to truly benefit from the advantages of employing
converters operating in DCM without sacrificing the
regulation property, it is necessary to search for better
means of controlling these converters. One such alternative is
to adopt a nonlinear controller: the sliding-mode controller.
The sliding-mode (SM) controller is well known for its
robustness, stability and good regulation properties in a
wide range of operating conditions. It is also deemed to be a
better candidate than other nonlinear controllers for its
relative ease of implementation [1–4]. In particular, the fixedfrequency pulsewidth-modulation (PWM)-based SM controllers, which are basically pulsewidth modulators that
employ control signals derived from SM control technique,
are found to be more suited for practical implementation in
power converters [1, 5–10]. However, the results presented in
these papers are only valid for converters in CCM operation.
As with conventional hysteresis modulation (HM)-based
SM controllers, the proposed PWM-based SM controllers
are not applicable to DC–DC converters operating in DCM
because of the fundamental difference in the dynamic
properties between the two operations. Thus, if PWM-based
SM controllers are to be adopted for DC–DC converters in
DCM operation, the system models and control laws have
to be redeveloped with consideration of these properties.
In this paper, a family of fixed-frequency pulsewidthmodulation-based sliding-mode voltage controllers is developed for basic DC–DC converters operating in discontinuous
conduction mode. The methods of deriving the system
models and control laws are illustrated. Computer simulations of the precise systems model have been used for
evaluation and verification purposes. Furthermore, it is also
worth mentioning that the proposed approach to deriving
these controllers can be used for the design of multi-switches/
multi-structured converter systems, e.g. power factor correction (PFC) and parallel-connected converters in either CCM
or DCM operation.
2 State-space model of DC–DC converters
under DCM
Naturally, the state-space model of the converters required
in the controller development in this work must be that of
IET Electr. Power Appl., Vol. 1, No. 1, January 2007
iL
iL
uL = 1
uL = 1
diLf
diLr
dt
uB = 1
dt
0
Fig. 1
uB = 0
diLf
diLr
dt
u =1
uL = 0
dt
uB = 1
dT
u=0
t
T
t
u=0
u =1
0
dT
(d+d2 )T
T
Typical inductor current behaviour of DC–DC converter in CCM (left) and DCM operations (right)
Table 1: State-space model of buck, boost, and buck–boost converters in DCM
Type of converter
diLr
dt
diLf
dt
Buck
vi vo
L
vo
L
1
L
Boost
vi
L
vi vo
L
1
L
Buck–boost
vi
L
vo
L
1
L
iL
a DCM converter. The difference between this model and
the model of a CCM converter is the addition of the zeroinductor-current stage. In this work, we develop the DCM
converter models by introducing additional terms, known
as the virtual switching components, into the model. It
should be noted that such an analogy is only a theoretical
representation. No additional physical switch is added to
the converter circuit.
For the cases of buck, boost and buck–boost converters,
the virtual switching components uL and uB, on top of the
actual physical switching component u where logic 1 and 0
represent the ‘ON’ and ‘OFF’ stages of the actual power
switch, are introduced into the models:
uL ¼
1 ¼ ‘ON’ when iL 40
1 ¼ ‘OFF’ when iL ¼ 0
ð1Þ
and
uB ¼
1 ¼ ‘ON’ when iL 40 and u ¼ 0
1 ¼ ‘OFF’ when iL ¼ 0 and u ¼ 0
ð2Þ
Here, condition (1) infers that uL inherits a logic state 1
whenever inductor current iL is conducting, and condition
(2) infers that uB inherits a logic state 1 only when inductor
current is conducting and the power switch is off (u ¼ 0).
Figure 1 shows the typical inductor current behaviour
of a DC–DC converter in both CCM and DCM operation. The respective rate of change of inductor currents
(i.e. diLr/dt and diLf/dt) and state space inductor current iL
descriptions for the buck, boost and buck–boost converters
are given in Table 1. It can be seen that, in CCM operation,
u. Thus, a model
uB is always 1 whenever u ¼ 0, i.e. uB ¼ derived for the DCM operation, which consists of uB, can
be easily transformed to a model for the CCM operation,
u.
through the substitution of the condition uB ¼ The relationship between the converters’ state-space
output voltage vo, inductor current iL, switching signal
u/
u, and load current ir are also given in Table 1.
IET Electr. Power Appl., Vol. 1, No. 1, January 2007
3
vo
Z
Z
Z
½vi u vo uL dt
1
C
½vi u þ ðvi vo ÞuB dt
1
C
½vi u vo uB dt
1
C
Z
Z
Z
½iL ir dt
½iL u ir dt
½iL u ir dt
Proposed controllers
This Section outlines the modelling method and describes
the detailed procedures for deriving the proposed family of
PWM-based SM controllers for DC–DC converters in
DCM operation.
3.1
System modelling
Figure 2 shows the schematic diagrams of the three PID
sliding-mode voltage-controlled (SMVC) DC–DC converters to be discussed in this paper in the conventional HM
configuration. Here, C, L and rL denote the capacitance,
inductance and instantaneous load resistance of the
converters, respectively, iC, iL and ir denote the instantaneous capacitor, inductor and load currents, respectively;
Vref, vi and vo denote the reference, instantaneous input and
instantaneous output voltages, respectively; b denotes the
feedback network ratio; and u ¼ 0 or 1 is the switching state
of power switch SW and u ¼ 1 u is the inverse logic of u.
In the case of PID SMVC converters, the control
variables x may be expressed in the form:
2
3
Vref bvo
2 3
x1
6 dðV bv Þ 7
6
7
ref
o
ð3Þ
x ¼ 4 x2 5 ¼ 6
7
4
5
dt
x3
R
ðVref bvo Þdt
where x1, x2 and x3 represents the voltage error, the voltage
error dynamics (or the rate of change of voltage error), and
the integral of voltage error, respectively.
Substitution of the converters’ behavioural models under
DCM (in Table 1) into (3) produces the following control
variable descriptions: xbuck, xboost and xbuck–boost for buck,
boost and buck–boost converters, respectively.
3
2
x1 ¼ Vref bvo
Z
7
6
6 x ¼ bvo þ bðvo uL vi uÞ dt 7
7
6 2
ð4Þ
xbuck ¼ 6
LC
rL C
7
7
6
Z
5
4
x3 ¼
x1 dt
65
iL
L
SW
ir
iC
Vi
+
D
R1
Vo
C
rL
R2
α 3x 3
S
u
α 3 ⋅ ∫ dt
β Vo
+ α1x1
α1
+
+
α 2 x2
d
α2⋅
Sliding Mode Controller
−
x1
+
For the boost converter:
2
3
2
3
0
1
0 2 3
2 3
0
x
x_ 1
1
6
7
6
7
1
76 7 6
7
6 7 6
u
4 x_ 2 5 ¼ 6 0 0 74 x2 5 þ 6 bvo uB bvi uB 7
4
5
4
rL C
LC
LC 5
x_ 3
x3
0
1
0
0
ð8Þ
Vref
dt
a
iL
L
D
iD
ir
iC
+
SW
Vi
R1
Vo
C
rL
R2
α 3x 3
βVo
+ α1x 1
α1
+
+
α 2x 2
d
S
u
α 3 ⋅ ∫ dt
α 2⋅
Sliding Mode Controller
−
x1
+
For the buck converter:
2
3
2
3
2
3
2 3
0
0
0
1
0 2 3
x_ 1
6
7 x1
6
7
6
7
74 x2 5 þ 6 bvi 7u þ 6 bvo u 7
4 x_ 2 5 ¼ 6 0 1
0
L5
4
5
4
5
4
rL C
LC
LC
x3
x_ 3
1
0
0
0
0
ð7Þ
For the buck–boost converter:
2
3
2
3
0
1
0 2 3
2 3
0
x_ 1
6
7 x1
6
7
74 x2 5 þ 6 bvo u 7
4 x_ 2 5 ¼ 6 0 1
0
B 5u
4
5
4
rL C
LC
x3
x_ 3
0
1
0
0
Vref
Rearrangement of the state-space descriptions (7), (8) and
(9) into the standard form gives
dt
x_ ¼ Ax þ Bv þ D
b
D
SW
iD
ir
iL
iC
L
Vi
R2
C
+
Vo
rL
R1
α 3x 3
S
u
α 3 ⋅ ∫ dt
+ α1x1
α1
+
+
α 2x 2
d
α2 ⋅
Sliding Mode Controller
β Vo
x1
−
+
Vref
Schematic diagrams of PID SMVC converters
xboost
where S is the instantaneous state variable’s trajectory, and
is described as
3
x1 ¼ Vref bvo
Z
6
u 7
6 x ¼ bvo þ bðvo uB vi uB Þ
dt 7
7
6 2
¼6
LC
rL C
7
7
6
Z
5
4
x3 ¼
x1 dt
3
x1 ¼ Vref bvo
Z
7
6
bvo uB u 7
6 x2 ¼ bvo
dt 7
þ
6
¼6
7
LC
rL C
7
6
Z
5
4
x3 ¼ x1 dt
Controller derivation and design
Having obtained the state-space descriptions, the next stage
is the derivation and design of the controller. For these
systems, it is appropriate to have a general SM control law
that adopts a switching function such as
1 when S40
u¼
ð11Þ
0 when So0
a SMVC buck converter
b SMVC boost–converter
c SMVC buck–boost converter
2
ð10Þ
where v ¼ u or u (depending on topology). Results are
summarised in Table 2.
An inspection of the equations verified the presence of
the three state-space structures (trilinear structure) in each
converter. In the case of the buck converter, one structure
exists when u ¼ 1 and uL ¼ 1, another exists when u ¼ 0 and
uL ¼ 1, and the third exists when u ¼ 0 and uL ¼ 0. For the
boost and buck–boost converters, one structure exists when
u ¼ 1 and uB ¼ 0, another exists when u ¼ 0 and uB ¼ 1, and
the third exists when u ¼ 0 and uB ¼ 0.
3.2
dt
c
Fig. 2
ð9Þ
S ¼ a1 x1 þ a2 x2 þ a3 x3 ¼ J T x
ð5Þ
2
ð12Þ
T
with J ¼ [a1 a2 a3] and a1, a2, and a3 representing the
control parameters, termed as sliding coefficients. Equations
(11) and (12) describe the control equations needed for
implementing the SM controller in conventional HM form.
For implementation in the PWM form, the control
equations must be translated.
ð6Þ
3.2.1 Derivation of control equations for
PWM-based controller: The implementation of
Next, the time differentiation of (4), (5) and (6) produces
the state-space descriptions required for the controller
design of the respective converter.
PWM-based controllers is possible by first translating the
SM control law to obtain its equivalent control function.
This function is then mapped onto the duty cycle function
of the pulse-width modulator [10]. The equivalent control
signal ueq can be formulated using the invariance conditions
by setting the time differentiation of (12) as dS/dt ¼ 0 [2].
xbuckboost
66
IET Electr. Power Appl., Vol. 1, No. 1, January 2007
Table 2: Matrix description of SMVC buck, boost and buck–boost converters in DCM
Type of converter
Buck
A
B
2
2
0
1
6
60 1
4
rL C
1
0
2
Boost
0
1
6
60 1
4
rL C
1
0
2
Buck–boost
0
1
6
60 1
4
rL C
1
0
0
3
0
v
3
0
6
7
6 bvo 7
6
7
4 LC uL 5
0
2 3
0
405
0
0
2
3
0
6 bvo
7
bvi
6
7
4 LC uB LC uB 5
3
7
07
5
u
u
0
0
0
2
0
6
7
6 bvi 7
6
7
4 LC 5
7
07
5
0
D
3
2
3
0
2 3
0
405
0
3
6 bvo
7
6
7
4 LC uB 5
7
07
5
u
0
0
(i) Buck converter
and ramp signal ^vramp :
T
T
T
Equating dS/dt ¼ J Ax+J Bueq+J D ¼ 0
equivalent control function
yields
a1
1
a3
vc ¼ ueq ¼ bL
iC þ
a2 r L C
a2
the
ueq ¼ ½J T B1 J T ½Ax þ D
bL a1
1
a3 LC
vo
ðVref bvo Þ þ uLeq
¼
iC þ
bvi a2 rL C
a2 bvi
vi
LCðVref bvo Þ þ bvo uLeq
ð18Þ
and
^vramp ¼ bvi
ð19Þ
ð13Þ
where both ueq and uLeq are continuous and bounded by 0
and 1. Specifically, the equivalent control function ueq is a
smooth function of the discrete input function u, uLeq is the
result equivalent component of the discrete virtual switching
component uL.
We first derive the equivalent control function by
substituting (13) into 0 o ueq o 1 and multiplying by bvi
to give
a1
1
0oueq ¼ bL
iC
a2 r L C
a3
ð14Þ
þ LC ðVref bvo Þ þ bvo uLeq obvi
a2
Next, the function uLeq can be approximated from wellestablished mathematical models of the buck converter.
First, for the buck converter in DCM, the duty cycle is
described as
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
v2o
2L
ð15Þ
DDCM ¼
vi ðvi vo Þ rL T
Additionally, the duty cycle for the turn-off period in DCM
operation is
rffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
vi vo
vi vo 2L
D2 ¼
DDCM ¼
ð16Þ
vo
vi r L T
Since the maximum time duration that uL ¼ 1 can exist is T
(during CCM operation), and in DCM operation uL ¼ 1 is
applied for the time duration (DDCM+D2)T, the equivalent
virtual switching component applied to the system in DCM
operation can be described as
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
ðDDCM þ D2 ÞT
vi
2L
¼
ð17Þ
uLeq ¼
T
vi vo r L T
Finally, the mapping of the equivalent control function (14)
onto the duty ratio control D, where 0 o D ¼ vc =^vramp o 1,
gives the following relationships for the control signal vc
IET Electr. Power Appl., Vol. 1, No. 1, January 2007
(ii) Boost converter
Equating dS/dt ¼ JTAx+JTB ueq ¼ 0 yields the equivalent
control function
ueq ¼ ½J T B1 J T Ax
bL
a1
1
¼
iC
bðvo vi ÞuBeq a2 rL C
a3 LC
ðVref bvo Þ
a2 bðvo vi ÞuBeq
ð20Þ
where both ueq and uBeq are continuous and bounded by 0
and 1. Here, the equivalent control function ueq is a smooth
function of the discrete input function u, and uBeq is the
resulted equivalent component of the discrete virtual
switching component uB.
Using the same approach, the equivalent control function
can be derived as
a1
1
a3
0oueq ¼ bL
iC þ LC ðVref bvo Þ
a2 r L C
a2
þ bðvo vi ÞuBeq oðbðvo vi ÞuBeq
ð21Þ
Next, the function uBeq can be approximated from wellestablished mathematical models of the boost converter.
First, for the boost converter in CCM, the duty cycle is
described as
vi
ð22Þ
DCCM ¼ 1 vo
and in DCM, the duty cycle is described as
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
vo vo
2L
ð23Þ
1
DDCM ¼
rL T
vi vi
Additionally, the duty cycle for the turn-off period in DCM
operation is given as
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
vi
vo 2L
D2 ¼
ð24Þ
DDCM ¼
vo vi
vo vi rL T
67
Since the maximum time duration that uB ¼ 1 can exist is
D2maxT ¼ (1 DCCM)T (during CCM operation), and in
DCM operation, uB ¼ 1 is applied for the time duration
D2 T, the equivalent virtual switching component applied to
the system in DCM operation can be described as
sffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
D2 T
vo
vo 2L
¼
uBeq ¼
ð25Þ
D2 max T
vi vo vi rL T
Since the maximum time duration that uB ¼ 1 can exist is
D2maxT ¼ (1 DCCM)T (during CCM operation), and in
DCM operation, uB ¼ 1 is applied for the time duration
D2 T, the equivalent virtual switching component applied to
the system in DCM operation can be described as
rffiffiffiffiffiffiffiffi
D2 T
vo
2L
¼ 1þ
uBeq ¼
ð33Þ
D2 max T
rL T
vi
Finally, the mapping of the equivalent control function (21)
onto the duty ratio control D, where 0oD ¼
ðvc =^vramp Þo1, gives the following relationships for the
control signal vc and ramp signal ^vramp :
a1
1
vc ¼ ueq ¼ bL
iC
a2 r L C
a3
þ LC ðVref bvo Þ þ bðvo vi ÞuBeq ð26Þ
a2
and
^vramp ¼ bðvo vi ÞuBeq
ð27Þ
Finally, the mapping of the equivalent control function (29)
onto the duty ratio control D, where 0oD ¼
ðvL =^vramp Þo1, gives the following relationships for the
control signal vc and ramp signal ^vramp :
a1
1
vc ¼ ueq ¼ bL
iC
a2 r L C
a3
þ LC ðVref bvo Þ þ bvo uBeq
ð34Þ
a2
(iii) Buck–boost converter
Equating dS/dt ¼ JTAx+JTB ueq ¼ 0 yields the equivalent
control function
ueq ¼ ½J T B1 J T Ax
bL
a1
1
a3 LC
ðVref bvo Þ
¼
iC bvo uBeq a2 rL C
a2 bvo uBeq
ð28Þ
where both ueq and uBeq are continuous and bounded by 0
and 1. The equivalent control function is derived as
a1
1
0oueq ¼ bL
iC
a2 r L C
a3
þ LC ðVref bvo Þ þ bvo uBeq obvo uBeq ð29Þ
a2
Similarly, the function uBeq can be approximated from wellestablished mathematical models of the buck–boost converter. First, for the buck–boost converter in CCM, the
duty cycle is described as
vo
ð30Þ
DCCM ¼
vo þ vi
and in DCM, the duty cycle is described as
rffiffiffiffiffiffiffiffi
vo 2L
DDCM ¼
ð31Þ
vi rL T
Additionally, the duty cycle for the turn-off period in DCM
operation is given as
rffiffiffiffiffiffiffiffi
vi
2L
ð32Þ
D2 ¼ DDCM ¼
rL T
vo
and
^vramp ¼ bvo uBeq
ð35Þ
The simplified control equations required for the implementation of the respective PWM-based SMVC converter
operating in DCM are given in Table 3. The representation
takes into consideration that rL ¼ vo/ir.
Figure 3 shows the schematic diagrams of the respectivePWM-based SMVC converters for DCM operation. The
controllers are modelled from the equations illustrated in
Table 3. It is interesting to note that these controllers are
highly nonlinear, requiring various square root, division,
multiplier, addition and subtraction operators in their
computations. This reflects the true nature of the DCM
converter system, showing the large amount of nonlinearity
actually required in processing the information needed for
the robust control of such converters. It also revealed how
overly simplified the existing PWM controllers apparently
are, in their applications in DCM converters. This explains
the inevitable poor performances resulting from DCM
converters using such controllers.
In essence, the proposed controllers accurately represent the
sort of nonlinear controllers truly required for providing good
control to DCM converters operating over a wide variation of
input/load range. Despite its architectural complexity and
requirement for more state-variable sensing than in conventional PWM controllers, the application of this special family
of PWM-based SM voltage controllers to DCM converters
requiring tight regulation is well justified in circumstance
whereby conventional PWM controllers fail for the purpose.
Finally, it should also be pointed out that the
implementation of the proposed controllers in Fig. 3 does
not automatically qualify them as SM controllers. They
need to comply with the three necessary conditions of SM
operation: the hitting condition, existence condition, and
stability condition, to make them SM controllers. The
hitting condition has been satisfied by the control law in
Table 3: Control equation of PWM-based SMVC buck, boost and buck–boost converters operating in DCM
Type of converter
Buck
Boost
Buck–boost
vc
qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
vi vo ir
vi vo
vo pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
Kp1 iC þ Kp2 ðVref bvo Þ þ Kp3
ir ðvo vi Þ
vi
!
vo pffiffiffiffiffiffiffiffi
vo ir
Kp1 iC þ Kp2 ðVref bvo Þ þ Kp3 1 þ
vi
Kp1 iC þ Kp2 ðVref bvo Þ þ Kp3
v^ramp
bvi
vo pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
ir ðvo vi Þ
vi
vo pffiffiffiffi
v o ir
Kp3 1 þ
vi
Kp3
pffiffiffiffiffiffiffiffiffiffiffi
*Kp1, Kp2, and Kp3 are fixed parameters calculated using Kp1 ¼ bLðða1 =a2 Þ ð1=rLðminÞ CÞÞ; Kp2 ¼ ða3 =a2 ÞLC; and Kp3 ¼ b 2L=T
68
IET Electr. Power Appl., Vol. 1, No. 1, January 2007
(11) [11]. This ensures that regardless the initial condition of
the converter, the controller will always make control
decisions that bring the state trajectory to a point within the
local vicinity of the sliding surface. Once the trajectory
comes within such vicinity, the pre-satisfaction of the
existence condition will take over to ensure that the state
trajectory is maintained within this vicinity while being
concurrently directed towards the equilibrium. Clearly, if
the controller design satisfies the stability condition, which
checks if the equilibrium point on the sliding surface is
stable, a stable steady-state regulation will be expected from
the converter. The following Section discusses the derivation
vi
ir
iL
L
SW
vo
ir
iC
vi
+
D
vo
C
rL
iC
1
− K p1iC
− K p1
X
β vo
iC
0
u
Kp2 x1
+
K p2
+
+
vC
+
PWM
−
vramp
β vi
−
x1
+
Vref
Sliding Mode Controller
4
Existence and stability conditions
4.1
Complying to existence conditions
The method of ensuring the existence of SM operation for
the DCM converter system is basically similar to the case of
the CCM converter system, despite the structural difference
in the composition of their state variable trajectory S.
Figure 4 show the difference between the state variable
trajectory behaviour in CCM and DCM operations.
Typically, for SM controlled CCM converters, all the
structures of the state variable trajectory must comply with
the local reachability condition limS-0 S (dS/dt) o 0 under
their respective configurations to ensure that the trajectory
is moving within a small vicinity from the sliding plane
towards the equilibrium, i.e. complying with the existence
condition [2]. However, for DCM converters, which have a
trilinear structure trajectory, the abidance of the local
reachability condition by the first two structures of the
trajectory provides a sufficient condition for the compliance
of the existence condition. It is unnecessary for the third
structure also to meet the local reachability condition. This
is graphically illustrated in Figs. 5a and b. Here, it is shown
that as long as structure 1 and structure 2 meet the local
vo
vi
ir
vi voir
vi − vo
K p3
of the existence and the stability conditions necessary for
completing the requirement.
x3
a
vi
ir
iL
L
iD
D
vo
sliding plane
ir
iC
+
SW
vi
converging
the origin
vo
C
rL
x1
trajectory within
small vicinity of
sliding plane
iC
1
− K p1iC
− K p1
X
Kp2x1
+
Kp2
+
+
vC
−
PWM
+
u
vramp
v
K p3 o
vi
Sliding Mode Controller
βvo
iC
0
−
x1
+
bilinear
structure
trajectory
Vref
a
vo
vi
ir
ir (vo − vi )
x3
b
vi
sliding plane
ir
D
SW
iD
ir
iL
vi
C
+
1
− K p1iC
0
−
+
u
vC
PWM
− Kp1
K p2x1
+
K p2
+
+
vramp
K p3
Sliding Mode Controller
vo
vo
iC
X
iC
x1
v
1+ o
vi
rL
β vo
−
+
Vref
voir
vo
vi
ir
trilinear
structure
trajectory
O
x2
b
Fig. 3 Schematic diagrams of PWM-based PID SMVC converters for DCM operation
IET Electr. Power Appl., Vol. 1, No. 1, January 2007
x1
diverging
structure
c
a SMVC buck converter
b SMVC boost converter
c SMVC buck–boost-converter
converging
the origin
trajectory within
small vicinity of
sliding plane
iC
L
x2
O
Fig. 4 Graphical representations of state variable trajectory
behaviour in SM control process
a Trajectory behaviour in CCM operationFillustrating how bilinear
structure trajectory is maintained within a small vicinity from the
sliding plane
b Trajectory behaviour in DCM operationFillustrating how trilinear
structure trajectory is maintained within a small vicinity from the
sliding plane, even though one of its structures is not directing the
trajectory towards the sliding plane
69
Structure 3
(i L = 0, converging)
Structure 1
(u = 1)
O
sliding plane
Structure 2
(u = 0)
converging
the origin
a
Structure 3
(i L = 0, diverging)
Structure 1
(u = 1)
O
sliding plane
Structure 2
(u = 0)
converging
the origin
b
Fig. 5 Graphical representations of the two possible scenarios of
state variables’ trajectory’s behaviour during DCM operation
a Structure 3 converges to sliding plane
b Structure 3 diverges from sliding plane
reachability condition, the direction in which structure 3 of
the state trajectory travels will not affect the overall
existence of the SM operation, whereby the trajectory is
maintained within the vicinity of the sliding plane and is
moving towards the equilibrium.
Intuitively, the local reachability conditions of structure 1
and structure 2 in the DCM converter systems are identical
to the local reachability conditions derived for both the
bilinear structures of the CCM converter systems [10],
which in the proposed system can be expressed as
9
dS
>
>
¼ J T Ax þ J T BvS!0þ þ J T Do0 >
=
dt S!0þ
ð36Þ
>
>
dS
T
T
T
>
¼ J Ax þ J BvS!0 þ J D40 ;
dt S!0
Hence, the overall existence conditions of the SMVC buck,
boost and buck–boost converters in DCM operations can
be recalled from the previous case of CCM operations [10].
The results are given in Table 4. For the detail of the
mathematical derivation, readers are referred to [10].
The selection of sliding coefficients for the controller of each
converter must comply with its stated inequalities. We have
taken into account the complete ranges of operating
conditions (minimum and maximum input voltages, i.e. vi(min)
and vi(max), and minimum and maximum load resistances, i.e.
rL(min) and rL(max). This ensures the compliance of the existence
condition for the full operating ranges of the converters.
Additionally, for SM controller with a static sliding surface, a
practical approach is to design the sliding coefficients to meet
Table 4: Existence condition of buck, boost and buck–boost
converters operating in DCM
Buck
Boost
Buck–boost
70
0o Kp1 iCðSSÞ þ Kp2 Vref bvoðSSÞ
þbvoðSSÞ obviðminÞ
0oKp1 iCðSSÞ Kp2 Vref bvoðSSÞ ob voðSSÞ viðmaxÞ
0oKp1 iCðSSÞ Kp2 Vref bvoðSSÞ obvoðSSÞ
the existence conditions for steady-state operation [10, 12].
Under such consideration, the state variables iC and vo can be
substituted with their expected steady-state parameters, i.e.
iC(SS) and vo(SS), which can be derived from the design
specification. This ensures the compliance of the existence
condition at least in the small region of the origin.
Remarks: Note that by inspecting the reachability
condition of structure 3 for the respective converters, it
was found that the SMVC buck converter can be designed
to have both converging and diverging structure 3, as shown
in Figs. 5a and b, respectively. However, structure 3 of the
SMVC boost and buck–boost converters can only be of
diverging type, as shown in Fig. 5b. This is because structure
3 in both these converters are of opposing directions to
structure 1. Hence, the necessary compliance of the reachability condition for structure 1 leads to the breaching of the
reachability condition for structure 3. Yet, as emphasised,
the direction in which structure 3 travels will not affect the
overall existence of the SM operation. However, having one
structure of its trajectory moving in an opposing direction to
the origin will significantly prolong the overall settling time
of the converters as compared to the CCM converters,
which have both the structures of the trajectory moving
towards the origin. This is evidenced in the simulation
results illustrated in the later part of the paper.
4.2
Complying to stability conditions
The method of assuring the stability of the SMVC DCM
converters is the same as in the case of CCM converters.
For the proposed family of controllers, the same method
of selecting the sliding coefficients based on the desired
dynamic properties to automatically arrive at a stable
equilibrium as in [9, 10, 13], is adopted. This is a direct
approach to assuring stability, whereby the same objective of
making the eigenvalues of the Jacobian matrix of the system
in SM operation contain negative real parts is achieved.
In our proposed system, the stability condition is easily
satisfied by selecting the sliding coefficients for a specific type
of dynamic response using one of the following equations:
(i) Under-damped response:
a1 10
¼
a2 Ts
and
a3
25
¼ 2
a2 z Ts2
ð37Þ
where Ts denotes the settling time and the damping ratio is
vffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
u 2
u
Mp
u
ln
u
100
ð38Þ
z¼u
2 o1
u
t 2
Mp
p þ ln
100
where Mp is the percentage of the peak overshoot.
(ii) Critically-damped response:
a1 10
¼
a2 T s
and
a3 25
¼
a2 Ts2
ð39Þ
(iii) Over-damped response:
a1
¼
a2
10
sffiffiffiffiffiffiffiffiffiffiffiffiffi!
1
1 1 2 Ts
z
and
a3
25
pffiffiffiffiffiffiffiffiffiffiffiffiffi
¼
a2 ðz z2 1ÞT 2
s
ð40Þ
where z 4 1.
IET Electr. Power Appl., Vol. 1, No. 1, January 2007
The mathematical derivations for (38), (39), and (40) can
be found in [9, 10]. Thus, the design of the sliding
coefficients is now dependent on the desired settling time
and the type and amount of damping required in the
response of the ideal sliding operation, in conjunction with
the existence condition of the respective PWM-based
controllers.
5
Simulation results and discussions
The derived PWM-based controller’s equations in Table 3
have been verified through computer simulation. The
simulation was performed using Matlab/Simulink. The step
size taken for all simulations is 10 ns.
5.1
simulation are
vc ¼ 1:15iC þ 52:1103ðVref bvo Þ
rffiffiffiffiffiffiffiffiffiffiffiffiffiffi
vi vo ir
þ 0:6179
and ^vramp ¼ bvi
vi vo
ð41Þ
Figure 6 shows the steady-state behaviour of the SMVC
buck converter.
Figure 7a shows a plot of the DC output voltage against
the different operating load resistances. The results show
good load regulation property for the load range
Buck converter
Table 5 shows the specification of the buck converter used
in the simulation. The PWM-based SM voltage controller is
designed to give a critically-damped response with a
bandwidth of fBW ¼ 20 kHz (i.e. first-order response time
constant t20 kHz ¼ 7.956 ms settling time Ts(20 kHz) ¼
39.780 ms). Assuming that the controller is designed for
maximum load current (i.e. minimum load resistance rL(min),
the reference voltage is chosen as Vref ¼ 2.5 V, and the
ratio of the voltage divider network b ¼ 0.208; the
sliding coefficients are calculated as a1/a2 ¼ 251327 and
a3/a2 ¼ 15791367040. Finally, the control parameters are
determined as Kp1 ¼ bL ((a1/a2) (1/r
pL(min)
ffiffiffiffiffiffiffiffiffiffiffiC)) ¼ 1.15,
Kp2 ¼ (a3/a2) LC ¼ 52.1103, and Kp3 ¼ b 2L=T ¼ 0.6179.
Therefore, the control equations implemented in the
Table 5: Specification of buck converter
Description
Parameter
Nominal value
Input voltage
vi
24 V
Capacitance
C
150 mF
Capacitor ESR
Cr
21 mO
Inductance
L
22 mH
Inductor resistance
lr
0.12 O
Switching frequency
fS
200 kHz
Minimum load resistance
rL(min)
17.5 O
Maximum load resistance
rL(max)
120 O
Desired output voltage
Vod
12 V
Fig. 7 Steady-state and dynamic performances of SMVC buck
converter operating in DCM
Fig. 6 Waveforms of control signal vc, input ramp vramp, generated gate pulse u (left), and inductor current iL and output voltage ripple vo
(right) for PWM-based SMVC buck converter operating in DCM at vi ¼ 24 V and rL ¼ 30 O
IET Electr. Power Appl., Vol. 1, No. 1, January 2007
71
5.2
Assuming that the controller is designed for maximum load
current (i.e. minimum load resistance rL(min), the reference
voltage is chosen as Vref ¼ 8 V, and the ratio of the voltage
divider network b ¼ 0.1667, the sliding coefficients are
calculated as a1/a2 ¼ 25132.7 and a3/a2 ¼ 157913670.
Finally, the control parameters are determined as
48.5
48.4
Discontinous Conduction Mode (DCM)
48.3
Output Voltage Vo (V)
17.5 O r rL r 120 O with only a 0.036 V deviation in vo (i.e.
about 0.3% of vo(17.5 O)).
Figure 7b shows the output voltage ripple waveforms of
the system at dynamic load condition. The step change
responses are critically damped, which conform to the
designed behaviour. The settling times of the system are
400 ms (load resistance changes from 30 to 120 O) and 260 ms
(load resistance changes from 120 to 30 O). These settling
times are much longer than the ideal SM settling time of
around Ts(20 kHz) ¼ 40 ms. There are two reasons for this.
First, the presence of excessive excursion of the state
trajectory within the vicinity of the sliding surface (created
by the finiteness of the switching frequency) lengthens the
actual settling time of the system as compared to the ideal
case where the state trajectory travels exactly on the sliding
surface. Secondly, as explained earlier, structure 3 of the
trajectory in DCM converters, which moves on an opposing
direction to the origin, will significantly prolong the overall
settling time of the converters. Yet, it must be emphasised
that even though (38), (39) and (40) do not accurately reflect
the true nature of the overall response time of the physical
converter, they do provide the general design guidelines for
a stable system with the desired type (damping) of secondorder dynamical response in a most simplified form.
Critical resistance
at RL = 430 Ω
48.2
48.1
48.0
47.9
47.8
400
450
500
550
600
650
700
750
800
850
Load Resistance RL (Ω)
a
Boost converter
Table 6 shows the specification of the boost converter used
in the simulation. The PWM-based SM voltage controller is
designed to give a critically-damped response with a
bandwidth of fBW ¼ 2 kHz (i.e. first-order response time
constant t2 kHz ¼ 79.56 ms settling time Ts(2 kHz) ¼ 397.8 ms).
48.45
48.40
48.35
Output Voltage Vo (V)
Table 6: Specification of boost converter
48.50
48.30
48.25
48.20
Description
Parameter
Nominal value
Input voltage
vi
12 V
Capacitance
C
1000 mF
Capacitor ESR
Cr
36 mO
48.05
Inductance
L
50 mH
48.00
Inductor resistance
lr
0.14 O
Switching frequency
fS
200 kHz
Minimum load resistance
rL(min)
430 O
Maximum load resistance
rL(max)
800 O
Desired output voltage
Vod
48 V
48.15
48.10
83 ms
48 ms
0 10 20 30 40 50 60 70 80 90 100 110120130140150160170180190200210
Time (ms)
b
Fig. 9 Steady-state and dynamic performances of the SMVC
boost converter operating in DCM
a Output voltage vo against load resistance rL
b vo at step load changes alternating between 480 and 800 O
Fig. 8 Waveforms of control signal vc, input ramp vramp, generated gate pulse u (left) and inductor current iL and output voltage ripple vo
(right) for the PWM-based SMVC boost converter operating in DCM at vi ¼ 12 V and rL ¼ 480 O
72
IET Electr. Power Appl., Vol. 1, No. 1, January 2007
Kp1 ¼ 0.209, Kp2 ¼ 7.896 and Kp3 ¼ 0.745. Therefore, the
control equations implemented in the simulation are
vo pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
i r ð vo vi Þ
vc ¼ 0:209iC þ 7:896ðVref bvo Þ þ 0:745
vi
and
^vramp ¼ 0:745
vo pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi
i r ð vo vi Þ
vi
ð42Þ
conversion. The PWM-based SM voltage controller is
designed to give a critically-damped response with a
bandwidth of fBW ¼ 2.5 kHz (i.e. first-order response
time constant t2.5 kHz ¼ 63.62 ms, settling time Ts(2.5 kHz) ¼
318.3 ms). Assuming that the controller is designed for
maximum load current (i.e. minimum load resistance
rL(min)) the reference voltage is chosen as Vref ¼ 6 V, and
the ratio of the voltage divider network b ¼ 0.1667; the
sliding coefficients are calculated as a1/a2 ¼ 31416 and
Figure 8 shows the steady-state behaviour of the SMVC
boost converter. It should be noted that the peak magnitude
of the ramp signal will change adaptively with the changes
in load resistance. This is due to the equivalent virtual
component term in the ^vramp computation (see (27)).
Figure 9a shows a plot of the DC output voltage against
the different operating load resistances. The results show
how good the load regulation property is for the load range
430 O r rL r 800 O with only a 0.376 V deviation in vo
(i.e. about 0.78% of vo(430 O)).
Figure 9b show the output voltage ripple waveforms of
the system at dynamic load condition. The step change
responses are critically damped, which conform to the
designed behaviour. The settling times of the system are
83 ms (load resistance changes from 480 to 800 O) and
48 ms (load resistance changes from 800 to 480 O). Again,
these settling times are much longer than the ideal SM
settling time of around Ts(2 kHz) ¼ 0.4 ms.
5.3
Buck–boost converter
Table 7 shows the specification of the buck–boost converter
used in the simulation. The converter operates for step-up
Table 7: Specification of buck–boost converter
Description
Parameter
Nominal value
Input voltage
vi
24 V
Capacitance
C
1000 mF
Capacitor ESR
Cr
36 mO
Inductance
L
25 mH
Inductor resistance
lr
0.12 O
Switching frequency
fS
200 kHz
Minimum load resistance
rL(min)
150 O
Maximum load resistance
rL(max)
700 O
Desired output voltage
Vod
36 V
Fig. 11 Steady-state and dynamic performances of the SMVC
buck–boost converter operating in DCM
a Output voltage vo against load resistance rL
b vo at step load changes alternating between 150 and 600 O
Fig. 10 Waveforms of control signal vc, input ramp vramp, generated gate pulse u (left), and inductor current iL and output voltage ripple vo
(right) for PWM-based SMVC buck–boost converter operating in DCM at vi ¼ 24 V and rL ¼ 180 O
IET Electr. Power Appl., Vol. 1, No. 1, January 2007
73
a3/a2 ¼ 246740000. Finally, the control parameters are
determined as Kp1 ¼ 0.131, Kp2 ¼ 6.169 and Kp3 ¼ 0.527.
Therefore, the control equations implemented in the
simulation are
7
vc ¼ 0:131iC þ 6:169 ðVref bvo Þ
vo pffiffiffiffiffiffiffiffi
þ 0:527 1 þ
vo i r
vi
and
^vramp
vo pffiffiffiffiffiffiffiffi
¼ 0:527 1 þ
vo i r
vi
ð43Þ
Figure 10 shows the steady-state behaviour of the SMVC
buck–boost converter. Similar to that of boost converter,
the peak magnitude of the ramp signal also changes with
load resistance (35).
Figure 11a shows DC output voltage against different
operating load resistances. The results show good load
regulation property for the load range 63 O r rL r 700 O
with only a 0.615 V deviation in vo (i.e. about 1.6%
of vo(63 O)). Figure 11b shows the output voltage ripple
waveforms of the system at dynamic load condition.
The settling times of the system are 13.5 ms (load resistance changes from 150 to 600 O) and 7 ms (load resistance
changes from 600 to 150 O). Again, these settling times are
much longer than the ideal SM settling time of around
Ts(2.5 kHz) ¼ 0.32 ms.
6
Conclusions
This paper has proposed a family of fixed-frequency PWMbased SM voltage controllers for basic DC–DC converters
operating in discontinuous conduction mode. A method of
developing the state-space models of these converters in
DCM operation required for the controller design is
described. Simple control equations for implementation of
the PWM based SM voltage controllers for the different
converters are derived and verified through computer
74
simulations. The results show that the proposed controllers
are capable of offering good control performance for the
respective converters.
References
!
1 Venkataramanan, R., Sabanovic, A., and Cuk,
S.: ‘Sliding mode
control of DC-to-DC converters’. Proc. IEEE Conf. on Industrial
Electronics, Control and Instrumentations (IECON), 1985, pp. 251–
258
2 Utkin, V., Guldner, J., and Shi, J.X.: ‘Sliding mode control in
electromechanical systems’ (Taylor and Francis, London, UK, 1999)
3 Mattavelli, P., Rossetto, L., Spiazzi, G., and Tenti, P.: ‘Generalpurpose sliding-mode controller for DC/DC converter applications’.
IEEE Power Electronics Specialists Conf. Record (PESC), June 1993,
pp. 609–615
4 Alarcon, E., Romero, A., Poveda, A., Porta, S., and MartinezSalamero, L.: ‘Current-mode analogue integrated circuit for slidingmode control of switching power converters’, Electron. Lett., 2002, 38,
(3), pp. 104–106
5 Nguyen, V.M., and Lee, C.Q.: ‘Indirect implementations of slidingmode control law in buck-type converters’. Proc. IEEE Applied Power
Electronics Conf. and Exp. (APEC), March 1996, Vol. 1, pp. 111–115
6 Mahdavi, J., Emadi, A., and Toliyat, H.A.: ‘Application of state space
averaging method to sliding mode control of PWM DC/DC
converters’. Proc. IEEE Conf. on Industry Applications (IAS),
October 1997, Vol. 2, pp. 820–827
7 Wu, C.C., and Young, C.M.: ‘A new PWM control strategy for the
buck converter’. Proc. IEEE Conf. on Industrial Electronics Society
(IECON), 1999, pp. 157–162
8 Mazumder, S.K., and Kamisetty, S.L.: ‘Experimental validation of a
novel multiphase nonlinear VRM controller’. IEEE Power Electronics
Specialists Conf. Record (PESC), June 2004, pp. 2114–2120
9 Tan, S.C., Lai, Y.M., Tse, C.K., and Cheung, M.K.H.: ‘A fixedfrequency pulse-width-modulation based quasi-sliding mode controller
for buck converters’, IEEE Trans. Power Electron., 2005, 20, (6),
pp. 1379–1392
10 Tan, S.C., Lai, Y.M., Tse, C.K.: ‘A unified approach to the design of
PWM based sliding mode voltage controller for basic DC–DC
converters in continuous conduction mode’, IEEE Trans. Circuits
Syst. I: Fundam. Theory Appl. 2006, 53,(8), pp 1816–1827
11 Tan, S.C., Lai, Y.M., Tse, C.K.: ‘General design issues of sliding mode
controllers in DC–DC converters’, IEEE Trans. Ind. Electron. (to be
published 2007)
12 Martinez-Salamero, L., Calvente, J., Giral, R., Poveda, A., and
!
Fossas, E.: ‘Analysis of a bidirectional coupled-inductor Cuk
converter operating in sliding mode’, IEEE Trans. Circuits Syst.
I: Fundam. Theory Appl., 1998, 45, (4), pp. 355–363
13 Ackermann, J., and Utkin, V.: ‘Sliding mode control design based on
Ackermanns formula’, IEEE Trans. Autom. Control, 1998, 43, (2),
pp. 234–237
IET Electr. Power Appl., Vol. 1, No. 1, January 2007