IEICE TRANS. COMMUN., VOL.E91–B, NO.1 JANUARY 2008
388
LETTER
A Full Wave Voltage Multiplier for RFID Transponders
Shiho KIM†a) , Member, Jung-Hyun CHO† , and Suk-Kyung HONG†† , Nonmembers
SUMMARY
A full wave voltage multiplier for passive RFID transponders is presented. The current driving capability of the proposed rectifier
is remarkably improved at the cost of only a small increase in layout area
compared to the widely used conventional half wave voltage multiplier.
The communication distance of RFID systems can be extended due to the
improved RF carrier to DC power conversion capability of the proposed
voltage multiplier.
key words: RFID transponders, voltage multiplier, RFID
1.
Introduction
There is a great interest in design of passive RFID tags operating UHF frequency due to a large number of application
in the field of supply chain managements, access controls,
airport baggage, express parcel logistics, and wireless passive sensors [1]–[3] etc. The passive RFID tag relies on the
incoming RF signal from the reader for both command data
and power. The key specification of RFID systems is the
maximum communication distance between reader and tag,
which is limited chiefly by the capacity of the power supply
generation from RF carrier. One of the most important challenges in realizing batteryless RFID transponder is design of
efficient RF to DC conversion circuit by a multistage voltage
multiplier to achieve a reasonable DC output voltage level.
In this letter, a full wave parallel voltage multiplier for RFID
transponders having improved current driving capability is
proposed. The merit of the proposed wave rectifier circuit
is that the current driving capability is remarkably improved
compared to the widely used conventional half wave voltage multiplier. The communication distance of RFID systems can be extended due to the improved power generation
capability of the proposed voltage multiplier. This paper focuses on passive RFID tags operating in UHF range from
860 to 960 MHz.
2.
Proposed Voltage Multiplier
The most widely used type of voltage multiplier in passive UHF RFID tags is the half-wave series multiplier [1]–
Manuscript received May 10, 2007.
Manuscript revised July 27, 2007.
†
The authors are with the School of Electrical and Computer
Engineering, Chungbuk National University, Cheongju, 361-763,
Korea.
††
The author is with Hynix Semiconductor, San 136-1, Ami-Ri,
Icheon-si, Kyoungki-do, 467-701, Korea.
a) E-mail: shiho@chungbuk.ac.kr
DOI: 10.1093/ietcom/e91–b.1.388
Fig. 1 Half wave parallel voltage multiplier commonly used in Passive
RFID tags.
[6]. The half wave voltage multiplier consists of Schottky diodes and pumping Capacitors (C p ) and stage-voltagestorage capacitors (C s ) shown in Fig. 1. In a negative half
cycle of the input sinusoidal signal, the pumping capacitors are precharged in parallel, and next positive half cycle charged pumping capacitors deliver current to the storage capacitors and output capacitor (CL ) connected to the
ground node. Input current from the received RF carrier enters to the diodes only half period of the signal in the half
wave voltage multiplier.
The maximum charging voltage of pumping Capacitor
in n-th stage is (2n − 1)(V p − 2Vd ). Where V p is peak voltage of RF input signal, and Vd is voltage drop in diodes.
The peak input voltage amplitude of multiplier (V p ) with
received power from the antenna (PAV ) and radiation resistance of tag antenna (RANT ) and input impedance (RIN ) is
calculated as [1], [4],
Vp =
RIN
8PAV RANT
RANT + RIN
(1)
Huge variation in the rectified voltage output of the
multiplier happens depending on the received power from
tag antenna, and sudden change in load current of a
transponder circuits. For the robust operation of passive
RFID tags, high current driving capability of RF to DC voltage generator is required on the top of the ability of voltage
generation [5]. Full wave structure of voltage multiplying
circuit has an advantage in stability of supply voltage because of higher current driving capability. The Cockcroft-
c 2008 The Institute of Electronics, Information and Communication Engineers
Copyright LETTER
389
Walton full wave series voltage multiplier used in high voltage generating circuit [7] can be applicable to the voltage
multiplier of RFID transponders.
More stages produce higher voltages and lower current
in series type multiplier, since the pumping (C p ) capacitors
are charged in parallel and discharged in series. An advantage of the Cockcroft-Walton full wave series voltage multiplier is uniform voltage stress on the diodes and capacitors.
Hence, this configuration is recommended when generating
very high voltages at low load currents for X-ray tubes or
particle accelerators [7]. The Parallel type full wave voltage
multiplier can be constructed by parallel connection of the
antenna terminal and pumping capacitor of each stage of the
multiplier as shown in Fig. 3.
Full wave parallel type multiplier has better power generation capability, since the pumping (C p ) capacitors are
charged and discharged in parallel. In a negative half cycle of the input sinusoidal signal, the pumping capacitors
connected to Ant (+) terminal and stage-storage capacitor
(C s ) are charged in parallel, and next positive half cycle
the pumping capacitors connected to Ant (−) terminal and
stage-storage capacitor (Cs) are charged in parallel. Both
for positive and negative cycles, pumping capacitors deliver
current to the storage and output capacitor (CL ) connected
to the ground node. The maximum voltage stress on stagestorage capacitors (C s ) in all of the stages is 2 Vp. The maximum charging voltage of pumping capacitor in n-th stage is
(2n − 1)(V p − 2Vd ). The maximum voltage stress on pumping capacitor is almost equal to the conventional half wave
circuit. In the steady state, the output voltage of the voltage
multiplier can be expressed as 2N(V p −2Vd )−VLOAD , where
Fig. 2
N is number of cascade stages, and VLOAD is the drop in the
output voltage when the multiplier is supplying output load
current.
3.
Simulation, Experimental Results and Discussions
Test chips with 6 stages was designed in full custom and fabricated by using a 0.25 µm double poly CMOS process with
additional Schottky-diode Step. The layout area of the half
wave multiplier and proposed full wave parallel multiplier
is 0.114 mm2 (278 µm × 410 µm) and 0.165 mm2 (371 µm
× 445 µm), respectively. For both of the fabricated half and
full wave multiplier test chips, the capacitance of pumping
(C p ) and storage capacitor (C s ) is 1 pF, and load capacitance
(CL ) is 300 pF, respectively. The capacitors were formed by
a poly-insulator-poly structure.
Figure 4 shows measured and SPICE simulated results for dc output voltage versus output load current of
the 6-stage half-wave and proposed full wave parallel voltage multiplier. The measurement results were obtained
from 3 different fabricated sample chips. For the simulation and measurement, antenna with radiation resistance of
400 ohm was used. The amplitude of 915 MHz RF input signal was set to 400 mV, which is corresponding to receiving
power of −7 dBm from 400 ohm antenna with matched input
impedance. The measured DC output voltage versus load
current characteristics show that current driving capability
of the proposed full wave multiplier is higher than conventional one.
Full wave structure effectively doubles the number of
charging cycles per second, and thus cuts down the voltage
drop and ripple factor. DC output drop very rapidly when
load current is increasing. Typical operating voltage of the
RFID tag is about 1.5 V, and minimum voltage of operating
Cockcroft-Walton full wave series voltage multiplier.
Fig. 3 Schematic of proposed full wave parallel voltage multiplier for
passive RFID tags.
Fig. 4 Measured (solid lines) and simulated (dashed lines) output voltage
of the half-wave and proposed full wave parallel voltage multiplier.
IEICE TRANS. COMMUN., VOL.E91–B, NO.1 JANUARY 2008
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Fig. 5 Measured (solid lines) and simulated (dashed lines) output power
of the half-wave and proposed full wave parallel voltage multiplier.
Fig. 7
Layout drawing of fabricated the 6-stage voltage multipliers.
tion results is caused by the improved load current supplying
capability. There is a small amount of increment of layout
area of the proposed multiplier because unit stage of the proposed one consists of 4 diodes and 3 capacitors. The conventional one has 2-diode with 2-capacitor per stage. The
net increment of the layout area in the fabricated test chip
shown in Fig. 7 is about 0.05 mm2 , which is not a considerable amount compared to the total chip area of 0.55 mm2 of
the recently reported tag chip using a 0.18 µm CMOS process [6].
4.
Fig. 6
Simulated power conversion efficiency of the rectifiers.
is about 1.2 V [5], [6]. When input signal amplitude is 0.4 V,
the maximum load current for operating power of 1.2 V is
less than 40 µA for the conventional half wave multiplier.
Whereas, maximum load current for 1.2 V DC output of
the full wave one is larger than 80 µA. Overall power efficiency of RF voltage rectifier is the ratio between DC output
power and incident RF power of the receiving antenna [2],
[4]. In the experiment using a RFID reader and tag system,
the measurement of incident RF power of the tag antenna
is very difficult. Simulation of power conversion efficiency
(PCE) of the RF rectifier for the RFID transponder was comprehensively studied in [8].
The PCE is the ratio of DC output power to load versus input power from the input AC source. Figure 6 shows
the simulated power conversion efficiency of the full wave
and half wave voltage multiplier having the same value of
pumping and step storage capacitance with the fabricated
chips. The conversion efficiency is depending on the input
power, device size and output load of the rectifiers. The better efficiency of proposed full wave rectifier in the simula-
Conclusions
A full wave voltage multiplier for passive RFID transponder has been presented. The presented multiplier is modified version of the Cockcroft-Walton full wave series voltage
multiplier used in very high voltage generators. The simulation and measurement results show that the current driving
capability of the proposed rectifier is remarkably improved
at the cost of only a small increase in layout area compared
to the widely used conventional half wave voltage multiplier. The communication distance of RFID systems can be
extended due to the improved power generation capability
of the proposed voltage multiplier.
Acknowledgment
This work was supported by Hynix semiconductor Ltd. under a grant from the System IC 2010 national projects. The
authors would like to appreciate IDEC for supporting EDA
tools.
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