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REFERENCES
[1]
Arman, M.F., and Darwish, M.K., 2009, “Critical Review of Cascaded
H-Bridge Multilevel Inverter Topologies,” International Review of
Electrical Engineering, 4(5), pp. 730-743.
[2]
Angulo, M., Lezana, P., Kouro, S., Rodriguez, J., and Wu, B., 2007,
“Level-Shifted PWM for Cascaded Multilevel Inverters with Even
Power Distribution,” Proc. IEEE Power Electron. Spec. Conf., pp.
2373–2378.
[3]
Baker, R. H., and Bannister, L. H., 1975, “Electric Power Converter,”
U.S. Patent 3 867 643.
[4]
Brahim, L.B., and Tadakuma, S., 2006, “A Novel Multilevel CarrierBased PWM Control Method for GTO Inverter in Low Index
Modulation Region,” IEEE Trans. Ind. Applicat., 42(1), pp.121-127.
[5]
Bhagwat, P. M., and Stefanovic, V.R., 1983, “Generalized Structure of
a Multilevel PWM Inverter,” IEEE Trans. Ind. Applicat., 19(IA),
pp. 1057–1069.
[6]
Busquets-Monge, S., Alepuz, S., Bordonau, J., and Peracaula, J., 2008,
“Voltage Balancing Control of Diode Clamped Multilevel Converters
with Passive Front-Ends,” IEEE Trans. Power Electron., 23(4),
pp. 1751–1758.
[7]
Bowes, S.R., and Holliday, D., 2007, “Optimal Regular-Sampled
PWM Inverter Control Techniques,” IEEE Trans. Ind. Electron., 54(3),
pp. 1547–1559.
[8]
Boost M.A., and Ziogas, P.D., 1988, “State-of-the-art Carrier PWM
Techniques: A Critical Evaluation,” IEEE Trans. Ind. Appl., 24(2),
pp. 271–280.
135
[9]
Bansal S.C., and Rao, U.M., 1978, “Evaluation of PWM Inverter
Schemes,” Proc. Inst. Elect. Eng., 125(4), pp. 328–334.
[10]
Corzine, K.A, and Familiant, Y., 2002, “A New Cascaded Multilevel
H-Bridge Drive,” IEEE Trans. Power Electron., 17(1), pp.125-131.
[11]
Corzine, K.A., Wielebski, M.W., Peng, F.Z., and Wang, J., 2004,
“Control of Cascaded Multilevel Inverters,” IEEE Trans. Power
Electron., 19(3), pp.732-738.
[12]
Carrara, G., Gardella, S., Marchesoni, M., Salutari, R., and Sciutto, G.,
1992, “A New Multilevel PWM Method: A Theoretical Analysis,”
IEEE Trans.Power Electron., 7(3), pp. 497-505.
[13]
Chiasson, J.N., Tolbert, L.M., and McKenzie, K.J., 2003, “Control of a
multilevel Converter Using Resultant Theory,” IEEE Trans. Control
Systems Tech., 11(3), pp.345-354.
[14]
Chinnaiyan, V.K., Jerome, J., and Karpagam, J., 2009, “An FPGA
Based Control Algorithm for Cascaded Multilevel Inverters,” IACSIT
International Journal of Engg and Tech., 1(5), pp.430-434.
[15]
Celanovic, N., and Boroyevich, D., 2000, “Acomprehensive Study of
Neutral Point Voltage Balancing Problem in Three Level Neutral Point
Clamped Voltage Source PWM Inverters,” IEEE Trans. Power
Electron., 15(2), pp. 242–249.
[16]
Corzine, K.A., Baker, J.R., 2002, “Multilevel Voltage-Source DutyCycle Modulation: Analysis and Implementation”, IEEE Trans.Ind.
Electron.,49(5), pp. 1009-1016.
[17]
Chinnaiyan, V.K., Jerome, J., and Karpagam, J., 2010, “Design and
Realization of a Three Phase Cascaded Multilevel Inverter for
Industrial Drives with Reduced Power Quality Issues VSI,”
International Review of Electrical Engineering, 5(4), pp. 1364-1369.
[18]
Choi, N.S., Cho, J.G., and Cho, G.H., 1991, “A General Circuit
Topology of Multilevel Inverter,” Proc. IEEE Power Electron. Spec.
Conf., pp. 96–103.
136
[19]
Carpaneto, M., Marchesoni, M., and Vaccaro, L., 2007, “A New
Cascaded Multilevel Converter Based on NPC Cells,” Proc. IEEE
ISIE, pp. 1033–1038.
[20]
Cheng Z., and Wu, B., 2007, “A Novel Switching Sequence Design
for Five-Level NPC/H-Bridge Inverters with Improved Output Voltage
Spectrum and Minimized Device Switching Frequency,” IEEE Trans.
Power Electron., 22(6), pp. 2138–2145.
[21]
De, S., Banerjee, D., Siva kumar, K., Gopakumar, K., Ramchand, R.,
and Patel, C., 2011, “Multilevel Inverters for Low-Power Application,”
IET Power Electron., 4(4), pp. 384–392.
[22]
Enjeti, P.N., Ziogas, P.D., and Lindsay, J.F., 1990, “Programmed
PWM Techniques to Eliminate Harmonics: A Critical Evaluation,”
IEEE Trans. Ind. Appl., 26(2), pp. 302–316.
[23]
Franquelo, L.G., Rodriguez, J., Leon, J.I., Kouro, S., Portillo, R., and
Prats, M.A.M., 2008, “The Age of Multilevel Converters Arrives,”
IEEE Ind. Electron. Mag., 2(2), pp. 28–39.
[24]
Gateau, G., Llor, A., and Regnier. J., 2010, “VHDL Code Generation
for FPGA Implementation of Digital Control with Co-Simulation
Step,” Proc. International Conference on Industrial Technology.
[25]
Govindaraju, C., and Baskaran, K., 2011, “Efficient Sequential
Switching Hybrid Modulation Techniques for Cascaded Multilevel
Inverters,” IEEE Trans. Power Electron., 26(6), pp. 1639-1648.
[26]
Govindaraju, C., and Baskaran, K., 2010, “Performance Analysis of
Cascaded Multilevel Inverter with Hybrid Phase Shifted Carrier
Modulation,” Aust. J. Electr. Electron. Eng., 7(2), pp. 121–132.
[27]
Grigoletto, F.B., Pinheiro, H., 2011, “Generalised Pulse Width
Modulation Approach for DC Capacitor Voltage Balancing in Diode
Clamped Multilevel Converters,” IET Power Electron., 4(1), pp. 89–100.
[28]
Gupta, R., and Ghosh, A., 2008, “Switching Characterization of
Cascaded Multilevel Inverter Controlled Systems,” IEEE Trans. Ind.
Electron., 55(3), pp.1047-1058.
137
[29]
Gui-Jia Su, 2005, “ Multilevel DC-Link Inverter,” IEEE Trans.Ind.
Applicat., 41(3), pp.848-854.
[30]
Holtz, J., 1992. “Pulse Width Modulation – A Survey,” IEEE Trans.
Ind. Electron., 30(5), pp. 410 – 420.
[31]
Holmes, D.G., and Lipo, T.A., 2003, Pulse Width Modulation for
Power Converters Principles and Practice. Hoboken, NJ: Wiley.
[32]
Haiwen, L., Tolbert, L.M., Khomfoi, S., Ozpineci, B., and Zhong, D.,
2008, “Hybrid Cascaded Multilevel Inverter with PWM Control
Method,” Proc. Power Electron. Spec. Conf., pp. 162–166.
[33]
Huang, J., and Corzine, K.A., 2006, “Extended Operation of Flying
Capacitor Multilevel Inverters,” IEEE Trans. Power Electron., 21(1),
pp. 140–147.
[34]
Hagiwara, M., and Akagi, H., 2009, “Control And Experiment of Pulse
Width Modulated Modular Multilevel Converters,” IEEE Trans. Power
Electron., 24(7), pp. 1737–1746.
[35]
Hammond, P.W., 1997, “A New Approach to Enhance Power Quality
for Medium Voltage AC Drives,” IEEE Trans. Ind. Appl., 33(1), pp.
202–208.
[36]
Hagiwara, M., and Akagi, H., 2008, “PWM Control and Experiment of
Modular Multilevel Converters,” Proc. IEEE Power Electron. Spec.
Conf., pp. 154–161.
[37]
Jing Zhao, Xiangning He, and Rongxiang Zhao, 2010, “A Novel PWM
Control Method for Hybrid-Clamped Multilevel Inverters,” IEEE
Trans. Ind. Electron., 57(7), pp. 2365-2373.
[38]
Kang, D.W., Lee, B.K., Jeon, J.H., Kim, T.J., and Hyun, D.S., 2005,
“A Symmetric Carrier Technique of CRPWM for Voltage Balance
Method of Flying-Capacitor Multilevel Inverter,” IEEE Trans. Ind.
Electron., 52(3), pp.879-888.
[39]
Kouro, S., Lezana, P., Angulo, M., and Rodríguez, J., 2008,
“Multicarrier PWM with DC-Link Ripple Feedforward Compensation
for Multilevel Inverters,” IEEE Trans. Power Electron., 23(1), pp.52-59.
138
[40]
Karuppanan, P., and Mahapatra, K.K., 2010, “FPGA based Cascaded
Multilevel Pulse Width Modulation for Single-phase Inverter” Proc.
IEEE International Conference on Environment and Electrical
Engineering, Poland, pp. 273-276.
[41]
Khomfoi, S., 2008, “A Reconfiguration Technique for Cascaded HBridge Multilevel Inverter Drives,” Proc. 5th Int. Conf. ECTI-CON,
Krabi, Thailand,. 2, pp. 993–1006.
[42]
Kouro, S., Malinowski, M., Gopakumar, K., Pou, J., Franquelo, L.,
Wu, B., Rodríguez, J., Perez, M.,
and Leon, J., 2010, “Recent
Advances and Industrial Applications of Multilevel Converters,” IEEE
Trans. Ind. Electron., 57(8), pp. 2553–2580.
[43]
Koutroulis, E., Dollas, A., and Kalaitzakis, K., 2006, “High-Frequency
Pulse Width Modulation Implementation using FPGA and CPLD ICs”,
Journal of Systems Architecture, 52, pp. 332–344.
[44]
Kou, X., Corzine, K.A., and Wielebski, M.W., 2006, “Overdistention
Operation of Cascaded Multilevel Inverters,” IEEE Trans. Ind. Appl.,
42(3), pp. 817–824.
[45]
Lai, J.S., and Peng, F.Z., 1996, “Multilevel Converters - A new Breed
of Power Converters,” IEEE Trans. Ind. Applicat., 32, pp. 509-517.
[46]
Lau, W.H., Zhou, B., and Chung, S.H., 2004, “Compact Analytical
Solutions for Determining the Spectral Characteristics of Multicarrier
Based Multilevel PWM,’ IEEE Trans. Circuits and Systems-I, 51(8),
pp.1577-1585.
[47]
Liu, Y., Hong, H., and Huang, A.Q., 2009, “Real-Time Calculation of
Switching Angles Minimizing THD for Multilevel Inverters with Step
Modulation,” IEEE Trans. Ind. Electron., 56(2), pp.285-293.
[48]
Leon, J.I., Vazquez, S., Watson, A.J., Tranquillo, L.G., Wheeler, P.W.,
and Carrasco, J.M., 2009, “Feed-Forward Space Vector Modulation for
Single-Phase Multilevel Cascaded Converters with any DC Voltage
Ratio,” IEEE Trans. Ind. Electron., 56(2), pp. 315–325.
[49]
Liu, H., Tolbert, L.M., Khomfoi, S., Ozpineci, B., and Du, Z., 2008,
“Hybrid cascaded multilevel inverter with PWM control method,”
Proc. IEEE Power Electron. Spec. Conf., pp. 162–166.
139
[50]
Meynard, T.A., and Foch, H., 1992, “Multi-Level Conversion: High
Voltage Choppers and Voltage-Source Inverters,” Proc. IEEE Power
Electronics Specialists Conference, pp. 397-403.
[51]
McGrath, B.P., and Holmes, D.G., 2001, “Opportunities for harmonic
Cancellation with Carrier-Based PWM for Two-Level and Multilevel
Cascaded Inverters,” IEEE Trans. Ind. Applicat., 37(2), pp. 574-582.
[52]
McGrath, B.P., and Holmes, D.G., 2002, “An Analytical Technique for
the Determination of Spectral Components of Multilevel Carrier-Based
PWM Methods,” IEEE Trans. Ind. Electron., 49(4), pp. 847-857.
[53]
McGrath, B.P., and Holmes, D.G., 2002, “Multicarrier PWM
Strategies for Multilevel Inverters,” IEEE Trans. Ind. Electron., 49(4),
pp. 858-867.
[54]
McGrath, B.P., and Holmes, D.G., and Meynard, T., 2006, “Reduced
PWM Harmonic Distortion for Multilevel Inverters Operating over a
Wide Modulation Range,” IEEE Trans. Power Electron., 21(4),
pp.941-949.
[55]
Malinowski, M., Gopakumar, K., Rodriguez, J., and Perez, M.A.,
2010, “A Survey on Cascaded Multilevel Inverters,” IEEE Trans. Ind.
Electron., 57(7), pp.2197-2206.
[56]
Moonmasson, E., and Cristea, M.N., 2007, “FPGA Design
Methodology for Industrial Control Systems – A Review,” IEEE
Trans. Ind. Electron., 54(4), pp.1824-1842.
[57]
MATLAB, Simulink User Guide, Math Works Inc., 2007.
[58]
Mekhilef, S., and Masaoud, 2006, “Xilinx FPGA Based Multilevel
PWM Single Phase Inverter” Engineering e-Transaction, 1(2), pp 40-45.
[59]
Marchesoni, M., and Mazzucchelli, M., 1993, “Multilevel Converter
for High Power AC Drives: A Review,” Proc. IEEE Int. Symp.
Industrial Electronics, pp. 38–43.
[60]
Malinowski, M., and Stynski, S., 2007, “Simulation of Single Phase
Cascaded Multilevel PWM Converters,” in Proc. Int. Conf. Comput.
Tool, EUROCON, pp. 1524–1529.
140
[61]
Meynard, T.A., Foch, H., Forest, F., Turpin, C., Richardeau, F.,
Delmas, L., Gateau, G., and Lefeuvre, E., 2002, “Multicell Converters:
Derived Topologies,” IEEE Trans. Ind. Electron., 49(5), pp. 978–987.
[62]
Meynard, T.A., Foch, H., Thomas, P., Courault, J., Jakob, R., and
Nahrstaedt, M., 2002, “Multicell Converters: Basic Concepts and
Industry Applications,” IEEE Trans. Ind. Electron., 49(5), 5, pp. 955–964.
[63]
Nabae, A., Takahashi, I., and Akagi, H., 1981, “A New Neutral-point
Clamped PWM inverter,” IEEE Trans. Ind. Applicat., 17(IA), pp.518-523.
[64]
Naderi, R., and Rahmati, A., 2008, “Phase-Shifted Carrier PWM
Technique for General Cascaded Inverters,” IEEE Trans. Power
Electron., 23(3), pp.1257-1269.
[65]
Naga Bhaskar Reddy, V., Nagaraja Rao S., and Sai Babu, C., 2010,
“Advanced Modulating Techniques for Multilevel Inverters by Using
FPGA,” International Review of Electrical Engineering, 5(34),
pp. 842-848.
[66]
Peng, F.Z., 2001, “A Generalized Multilevel Inverter Topology with
Self Voltage Balancing,” IEEE Trans. Ind. Applicat., 37(2), pp.611-618.
[67]
Peng, F.Z., Lai, J.S., McKeever, J., and VanCoevering, J., 1995, “A
Multilevel Voltage-Source Converter System with Balanced DC
Voltages,” Proc. IEEE PESC., pp. 1144–1150.
[68]
Peng, F.Z., and Lai, J.S., 1997, “Multilevel Cascade Voltage Source
Inverter with Separate DC Sources,” Patent U.S. 5,642,275.
[69]
Pandey, A., Singh, B., Singh, B.N., Chandra, A., Al-Haddad, K., and
Kothari, D.P., 2006, “A Review of Multilevel Power Converters,”
Institute of Engineers Journal, 86, pp. 220-231.
[70]
Park, Y.M., Yoo, H.S., Lee, H.W., Jung, M.G., Lee, S.H., Lee, C.D.,
Lee, S.B., and Yoo, J.Y., 2006, “A Simple and Reliable PWM
Synchronization and Phase-Shift Method for Cascaded H-Bridge
Multilevel Inverters Based on a Standard Serial Communication
Protocol,” Proc. 41st IEEE IAS Annual Meeting, 2, pp. 988–994.
[71]
Rodriguez, J., and Lai, J.S., 2002, “Multilevel Inverters: A Survey of
Topologies, Controls, and Applications,” IEEE Trans. Ind. Applicat.,
49(4), pp. 724-738.
141
[72]
Rech, C., and Pinheiro, J.R., 2007, “Impact of Hybrid Multilevel
Modulation Strategies on Input and Output Harmonic Performances,
‘IEEE Trans. Power Electron., 22(3), pp.967-977.
[73]
Ricci, F., and Hoang, L.H., 2003, “Modeling and Simulation of FPGA
Based Variable Speed Drives Using Simulink,” Elsevier, Mathematics
and Computers in Simulation, 63, pp.183-195.
[74]
Rashid, M.H., 2001, Power Electronics Handbook. Florida, Academic
Press.
[75]
Rodriguez, J.J., Moure, M.J., and Valdes, M.D., 2007, “Features,
Design Tools, and Application Domains of FPGAs”, IEEE Trans. Ind.
Electron., 54(4), pp.1810 – 1823.
[76]
Rajendra, R., Chitra, A., Meenakshi, T., 2010, “Digital Implementation
of FPGA Based PWM Generator for Cascade H-Bridge Multilevel
Inverter,” Proc. of Int. Conf. on Control, Communication and Power
Engineering, pp. 177-180.
[77]
Rufer, A., 1995, “An Aid in the Teaching of Multilevel Inverters for
High Power Applications,” Proc. Rec. IEEE PESC’95, pp. 347 – 352.
[78]
Rahim, N.A., and Selvaraj, J., 2010, “Multi-String Five-Level Inverter
with Novel PWM Control Scheme for PV Application,” IEEE Trans.
Ind. Electron., 57(6), pp. 2111–2121.
[79]
Rodriguez, J., Franquelo, L.G., Kouro, S., Leon, J.I., Portillo, R.C.,
Prats, M.A.M., and Perez, M.A., 2009, “Multilevel Converters: An
Enabling Technology for High-Power Applications,” Proc. IEEE,
97(11), pp. 1786–1817.
[80]
Rodriguez, J., Bernet, S., Steimer, P.K., and Lizama, I.E., 2010, “A
Survey On Neutral-Point-Clamped Inverters,” IEEE Trans. Ind.
Electron., 57(7), pp. 2219–2230.
[81]
Radan, A., Shahirinia, A.H., and Falahi, M., 2007, “Evaluation of
Carrier-Based PWM Methods for Multi-Level Inverters,” Proc. IEEE
Int. Symp. Indust. Electron., pp. 389–394.
[82]
Rashid, M.H., 2007, Power Electronics: Circuits, Devices, and
Applications, 3rd ed. Englewood Cliffs, NJ: Prentice-Hall.
142
[83]
Rodríguez, J., Bernet, S., Wu, B., Pontt, J.O., and Kouro, S., 2007,
“Multilevel Voltage-Source-Converter Topologies for Industrial
Medium-Voltage Drives,” IEEE Trans. Ind. Electron., 54(6),
pp. 2930–2945.
[84]
Spartan-3 FPGA Family, Data sheet Xilinx, Inc.DS099 December
2009.
[85]
Sridharan, K., and Priya, T., 2005, “The Design of a Hardware
Accelerator for Real Time Complete Visibility Graph Construction and
Efficient FPGA Implementation,” IEEE Trans. Ind. Electron., 52 (4),
pp. 1185 – 1187.
[86]
Su, G.J., 2005, “Multilevel DC-Link Inverter,” IEEE Trans. Ind. Appl.,
41(3), pp. 848–854.
[87]
Teodorescu, R., Blaabjerg, F., Pedersen, J.K., Cengelci, E., and Enjeti,
P.N., 2002, “Multilevel Inverter by Cascading Industrial VSI,” IEEE
Trans. Ind. Electron., 49(4), No. 4, pp.832-838.
[88]
Tolbert, L.M., and Habetler, T.G., 1999, “Novel Multilevel Inverter
Carrier-Based PWM Method,” IEEE Trans. Ind. Applica., 25(5), pp.
1098-1107.
[89]
Tolbert, L.M., Peng, F.Z., and Habetler, T.G., 2000, “Multilevel
PWM Methods at Low Modulation Indices,” IEEE Trans. Power
Electron., 15(4), pp. 719-725.
[90]
Wen, J., and Smedley, K.M., 2008, “Synthesis of Multilevel
Converters Based on Single and/or Three-Phase Converter Building
Blocks,” IEEE Trans. Power Electron., 23(3), pp. 1247–1255.
[91]
Yuan, X., and Ivo Barbi, 2000, “Fundamentals of a New Diode
Clamping Multilevel Inverter,” IEEE Trans. Power Electron., 15(4),
pp. 711-718.
[92]
Zen, P.F., and Ming, Q.Z., 2003, “Applications of Cascaded Multilevel
Inverters” Journals of Zhejiang University Science, 4(6), pp.658-665.
[93]
Zaragoza, J., Pou, J., Ceballos, S., Robles, E., Jaen, C., and Corbalan,
M., 2009, “Voltage-Balance Compensator for a Carrier-Based
Modulation in the Neutral-Point-Clamped Converter,” IEEE Trans.
Ind. Electron., 56(2),
pp. 305–314.
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