USC Ming Hsieh Department of Electrical Engineering

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University of Southern California
Ming Hsieh Department of Electrical Engineering
EE 202L - Linear Circuits
Concept Inventory
Spring 2009 - 37 Responses
100 %
1. A parallel 6-Ω and 3-Ω combination connects in series with 12 Ω and 4 Ω.
The equivalent resistance is:
(a) 25 Ω
(b) 27/12 Ω
(c) 18 Ω
(d) 6/5 Ω
51.5 %
2. A circuit features fewer node equations than mesh equations when:
(a) the number of current sources is greater the number of voltage sources
(b) the number of current sources is equal to the number of voltage sources
(c) the number of current sources is less than the number of voltage sources
(d) dependent sources are present.
83.8 %
3. When applying superposition to a resistive circuit:
(a) a turned-off independent voltage source is an open circuit
(b) a turned-off independent current source is a short circuit
(c) only one dependent source can be turned off at at time
(d) none of the above apply
97.3 %
4. When applying independent-source substitutions to a resistive circuit:
(a) a voltage source with parallel resistance becomes a current source with
series resistance
(b) a voltage source with series resistance becomes a current source with
parallel resistance
(c) dependent voltage sources are always affected
(d) dependent voltage sources are never affected
64.9 %
5. When seeking the Thevenin equivalent of an arbitrary resistive circuit,
which of the following measurements is sometimes inappropriate:
(a) the open-circuit voltage
(b) the short-circuit current
(c) the voltage subject to a non-zero load resistance
(d) the resistance of the network with all sources turned off
86.5 %
6. A student connects the two leads from a “meter” to two separate nodes.
This is:
(a) unacceptable for an ammeter because it has large Thevenin resistance
(b) unacceptable for an ammeter because it has small Thevenin resistance
(c) unacceptable for a voltmeter because it has large Thevenin resistance
(d) unacceptable for a voltmeter because it has small Thevenin resistance
13.5 %
7. In a resistive circuit, the power delivered to a load is maximum when:
(a) the adjustable Thevenin resistance is zero
(b) the load and non-adjustable Thevenin resistances dissipate equal power
(c) the load and non-adjustable Thevenin resistances are equal
(d) any of the above apply
70. 3 %
8. An op-amp is likely to promote poor circuit performance when it has:
(a) small series output conductance
(b) large differential voltage gain
(c) negligible input currents
(d) power-supply currents less than 0.25 mA
24.3 % 9. Feedback in a non-inverting op-amp amplifier circuit:
(a) increases the available amplifier voltage gain
(b) has no effect on the available amplifier voltage gain
(c) decreases the available amplifier voltage gain
(d) is applied to the positive op-amp input
40.5 % 10. The generally slowest type of analog-to-digital converter is the:
(a) integrating converter
(b) successive-approximation converter
(c) flash converter
(d) pipeline converter
86.5 % 11. An unconstrained voltage in a first-order circuit varies in response to the
closure of a switch. The time variation is:
(a) linear
(b) logarithmic
(c) exponential
(d) sinusoidal
83.8 % 12. A step voltage is applied to a circuit containing resistors, capacitors, and
inductors. At t = 0+ :
(a) the capacitor voltages are continuous
(b) the capacitor voltages are zero
(c) the resistor currents are never continuous
(d) the inductor currents are discontinuous
91.9 %
13. A step voltage is applied to a circuit containing resistors, capacitors, and
inductors. As t ∞ :
(a) capacitors behave like short circuits
(b) capacitors behave like open circuits
(c) inductors have zero current
(d) resistors dissipate more power
8.1 %
14. A step voltage is applied to an arbitrary series RLC circuit combination.
The resistor voltage:
(a) always settles to zero
(b) is equal to the input voltage at t = 0+
(c) exhibits purely exponential time dependence
(d) exhibits damped sinusoidal time dependence
48.6 %
15. An RLC circuit with no dependent sources:
(a) has an equal number of poles and zeros
(b) has poles and zeros exclusively in the left-half “s” plane
(c) has poles and zeros distributed throughout the “s” plane
(d) has complex-conjugate pole pairs
86.5 %
16. The unit step response of a linear circuit has been determined. To find
the unit impulse response:
(a) one integrates the step response
(b) one differentiates the step response
(c) one scales the step response downward by a factor of two
(d) no all-purpose method is available
91.9 %
17. Given a linear circuit in the sinusoidal steady state:
(a) the input and output frequencies are the same
(b) inductor voltages are phase-shifted by +90 in relation to currents
(c) capacitor voltages are phase-shifted by -90 in relation to currents
(d) all of the above are true
35.1 %
18. In an RLC circuit, the useful power delivered to a load impedance is
maximum when:
(a) the load impedance is equal to the complex conjugate of the Thevenin
impedance
(b) the load impedance is equal to the Thevenin impedance
(c) the load impedance is real
(d) the load impedance is purely imaginary
21.6 %
19. In the sinusoidal steady state, a series RLC circuit with large
Q:
(a) has in-phase inductor and capacitor voltages
(b) has potentially large resistor voltage
(c) has potentially large capacitor and inductor voltages
(d) has potentially large capacitor or inductor voltages
75.7 %
20. A filter has +45
phase shift at its cutoff frequency. The filter type is:
(a) first-order low pass
(b) second-order low pass
(c) first-order high pass
(d) second-order high pass
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